27C256 256K (32K x 8) CMOS EPROM PACKAGE TYPES TSOP OE A11 A9 A8 A13 A14 VCC 1 2 3 4 5 6 7 VPP A12 A7 A6 A5 A4 A3 8 9 10 11 12 13 14 27C256 A10 CE D7 D6 D5 D4 D3 21 20 19 18 17 16 15 VSS D2 D1 D0 A0 A1 A2 30 31 1 32 2 A7 A12 VPP NU Vcc A14 A13 3 4 29 6 28 7 27 8 9 10 11 26 25 24 23 A8 A9 A11 NC OE A10 CE O7 O6 20 19 18 17 21 16 22 13 15 12 DIP/SOIC VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 27C256 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 VSOP OE A11 A9 A8 A13 A14 VCC VPP A12 A7 A6 A5 A4 A3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 1996 Microchip Technology Inc. 27C256 A complete family of packages is offered to provide the most flexibility in applications. For surface mount applications, PLCC, SOIC, VSOP or TSOP packaging is available. Tape and reel packaging is also available for PLCC or SOIC packages. 5 14 A6 A5 A4 A3 A2 A1 A0 NC O0 DESCRIPTION The Microchip Technology Inc. 27C256 is a CMOS 256K bit electrically Programmable Read Only Memory (EPROM). The device is organized as 32K words by 8 bits (32K bytes). Accessing individual bytes from an address transition or from power-up (chip enable pin going low) is accomplished in less than 90 ns. This very high speed device allows the most sophisticated microprocessors to run at full speed without the need for WAIT states. CMOS design and processing enables this part to be used in systems where reduced power consumption and reliability are requirements. 28 27 26 25 24 23 22 PLCC 27C256 * High speed performance - 90 ns access time available * CMOS Technology for low power consumption - 20 mA Active current - 100 A Standby current * Factory programming available * Auto-insertion-compatible plastic packages * Auto ID aids automated programming * Separate chip enable and output enable controls * High speed "express" programming algorithm * Organized 32K x 8: JEDEC standard pinouts - 28-pin Dual-in-line package - 32-pin PLCC Package - 28-pin SOIC package - 28-pin Thin Small Outline Package (TSOP) - 28-pin Very Small Outline Package (VSOP) - Tape and reel * Data Retention > 200 years * Available for the following temperature ranges: - Commercial: 0C to +70C - Industrial: -40C to +85C - Automotive: -40C to +125C O1 O2 VSS NU O3 O4 O5 FEATURES 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE O7 O6 O5 O4 O3 VSS O2 O1 O0 A0 A1 A2 DS11001L-page 1 This document was created with FrameMaker 4 0 4 27C256 1.0 ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* TABLE 1-1: PIN FUNCTION TABLE Name Function VCC and input voltages w.r.t. VSS ........ -0.6V to +7.25V A0-A14 VPP voltage w.r.t. VSS during programming ....................................... -0.6V to +14.0V CE Chip Enable OE Output Enable Output voltage w.r.t. VSS ............... -0.6V to VCC +1.0V VPP Programming Voltage Storage temperature .......................... -65C to +150C O0 - O7 Ambient temp. with power applied ..... -65C to +125C VCC +5V Power Supply *Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. VSS Ground NC No Connection; No Internal Connection NU Not Used; No External Connection Is Allowed Voltage on A9 w.r.t. VSS ...................... -0.6V to +13.5V TABLE 1-2: Address Inputs Data Output READ OPERATION DC CHARACTERISTICS VCC = +5V (10%) Commercial: Industrial: Extended (Automotive): Parameter Tamb = 0C to +70C Tamb = -40C to +85C Tamb = -40C to +125C Part* Status Symbol Min. Max. Units Conditions Input Voltages all Logic "1" Logic "0" VIH VIL 2.0 -0.5 VCC+1 0.8 V V Input Leakage all -- ILI -10 10 A VIN = 0 to VCC Output Voltages all Logic "1" Logic "0" VOH VOL 2.4 0.45 V V IOH = -400 A IOL = 2.1 mA Output Leakage all -- ILO -10 10 A VOUT = 0V to VCC Input Capacitance all -- CIN -- 6 pF VIN = 0V; Tamb = 25C; f = 1 MHz Output Capacitance all -- COUT -- 12 pF VOUT = 0V; Tamb = 25C; f = 1 MHz Power Supply Current, Active C I,E TTL input TTL input ICC1 ICC2 -- -- 20 25 mA mA VCC = 5.5V; VPP = VCC f = 1 MHz; OE = CE = VIL; IOUT = 0 mA; VIL = -0.1 to 0.8V; VIH = 2.0 to VCC; Note 1 Power Supply Current, Standby C I, E all TTL input TTL input CMOS input ICC(S) -- 2 3 100 mA mA A all all Read Mode Read Mode IPP VPP 100 VCC A V IPP Read Current VPP Read Voltage VCC-0.7 CE = VCC 0.2V VPP = 5.5V * Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges. DS11001L-page 2 1996 Microchip Technology Inc. 27C256 TABLE 1-3: READ OPERATION AC CHARACTERISTICS AC Testing Waveform: Output Load: Input Rise and Fall Times: Ambient Temperature: VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V 1 TTL Load + 100 pF 10 ns Commercial: Tamb = 0C to +70C Industrial: Tamb = -40C to +85C Automotive: Tamb = -40C to +125C 27C256-90* 27C256-10* 27C256-12 27C256-15 27C256-20 Parameter Sym Units Conditions Min Max Min Max Min Max Min Max Min Max Address to Output Delay tACC -- 90 -- 100 -- 120 -- 150 -- 200 ns CE=OE =VIL CE to Output Delay tCE -- 90 -- 100 -- 120 -- 150 -- 200 ns OE = VIL OE to Output Delay tOE -- 40 -- 45 -- 55 -- 65 -- 75 ns CE = VIL CE or OE to O/P High Impedance tOFF 0 30 0 30 0 35 0 50 0 55 ns Output Hold from Address CE or OE, whichever goes first tOH 0 -- 0 -- 0 -- 0 -- 0 -- ns * -10, -90 AC Testing Waveform: VIH = 2.4V and VIL = .45V; VOH = 1.5V and VOL = 1.5V Output Load: 1 TTL Load + 30pF FIGURE 1-1: READ WAVEFORMS VIH Address Valid Address VIL VIH CE VIL t CE(2) VIH OE VIL Outputs O0 - O7 VOH t OFF(1,3) t OH t OE(2) High Z Valid Output High Z VOL t ACC Notes: (1) tOFF is specified for OE or CE, whichever occurs first (2) OE may be delayed up to t CE - t OE after the falling edge of CE without impact on tCE (3) This parameter is sampled and is not 100% tested. 1996 Microchip Technology Inc. DS11001L-page 3 27C256 TABLE 1-4: PROGRAMMING DC CHARACTERISTICS Ambient Temperature: Tamb = 25C 5C VCC = 6.5V 0.25V, VPP = VH = 13.0V 0.25V Parameter Status Symbol Min Max. Units Input Voltages Logic"1" Logic"0" VIH VIL 2.0 -0.1 VCC+1 0.8 V V Input Leakage -- ILI -10 10 A VIN = 0V to VCC Logic"1" Logic"0" VOH VOL 2.4 0.45 V V IOH = -400 A IOL = 2.1 mA VCC Current, program & verify -- ICC2 -- 20 mA Note 1 VPP Current, program -- IPP2 -- 25 mA Note 1 A9 Product Identification -- VH 11.5 12.5 V Output Voltages Conditions Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP TABLE 1-5: PROGRAMMING AC CHARACTERISTICS for Program, Program Verify and Program Inhibit Modes Parameter AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V Output Load: 1 TTL Load + 100pF Ambient Temperature: Tamb=25C 5C VCC= 6.5V 0.25V, VPP = VH = 13.0V 0.25V Symbol Min. Max. Units Address Set-Up Time tAS 2 -- s Data Set-Up Time tDS 2 -- s Data Hold Time tDH 2 -- s Address Hold Time tAH 0 -- s Float Delay (2) tDF 0 130 ns VCC Set-Up Time tVCS 2 -- s Program Pulse Width (1) tPW 95 105 s CE Set-Up Time tCES 2 -- s OE Set-Up Time tOES 2 -- s VPP Set-Up Time tVPS 2 -- s Data Valid from OE tOE -- 100 ns Remarks 100 s typical Note 1: For express algorithm, initial programming width tolerance is 100 s 5%. 2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no longer driven (see timing diagram). DS11001L-page 4 1996 Microchip Technology Inc. 27C256 FIGURE 1-2: PROGRAMMING WAVEFORMS Program Verify VIH Address Address Stable VIL t AS t AH VIH High Z Data Data Stable VIL t DS Data Out Valid t DF (1) t DH 13.0V(2) VPP tVPS 5.0V 6.5V(2) VCC tVCS 5.0V VIH CE VIL t OES t PW VIH OE t OE (1) VIL Notes: TABLE 1-6: (1) t DF and tOE are characteristics of the device but must be accommodated by the programmer (2) VCC = 6.5 V 0.25V, VPP = V H = 13.0V 0.25V for express algorithm MODES Operation Mode CE OE VPP A9 O0 - O7 Read VIL VIL VCC X DOUT Program VIL VIH VH X DIN Program Verify VIH VIL VH X DOUT Program Inhibit VIH VIH VH X High Z Standby VIH X VCC X High Z Output Disable VIL VIH VCC X High Z Identity VIL VIL VCC VH Identity Code X = Don't Care 1.2 Read Mode (See Timing Diagrams and AC Characteristics) Read Mode is accessed when: a) b) For Read operations, if the addresses are stable, the address access time (tACC) is equal to the delay from CE to output (tCE). Data is transferred to the output after a delay from the falling edge of OE (tOE). the CE pin is low to power up (enable) the chip the OE pin is low to gate the data to the output pins 1996 Microchip Technology Inc. DS11001L-page 5 27C256 1.3 Standby Mode The standby mode is defined when the CE pin is high (VIH) and a program mode is not defined. When these conditions are met, the supply current will drop from 20 mA to 100 A. 1.4 Output Enable This feature eliminates bus contention in multiple bus microprocessor systems and the outputs go to a high impedance when the following condition is true: * The OE pin is high and the program mode is not defined. 1.5 Erase Mode (U.V. Windowed Versions) Windowed products offer the ability to erase the memory array. The memory matrix is erased to the all 1's state when exposed to ultraviolet light. To ensure complete erasure, a dose of 15 watt-second/cm2 is required. This means that the device window must be placed within one inch and directly underneath an ultraviolet lamp with a wavelength of 2537 Angstroms, intensity of 12,000W/cm2 for approximately 20 minutes. 1.6 Programming Mode The Express Algorithm has been developed to improve on the programming throughput times in a production environment. Up to ten 100-microsecond pulses are applied until the byte is verified. No overprogramming is required. A flowchart of the express algorithm is shown in Figure 1-3. 1.7 Verify After the array has been programmed it must be verified to ensure all the bits have been correctly programmed. This mode is entered when all the following conditions are met: a) b) c) d) VCC is at the proper level, VPP is at the proper VH level, the CE line is high, and the OE line is low. 1.8 Inhibit When programming multiple devices in parallel with different data, only CE need be under separate control to each device. By pulsing the CE line low on a particular device, that device will be programmed; all other devices with CE held high will not be programmed with the data, although address and data will be available on their input pins. 1.9 Identity Mode In this mode specific data is output which identifies the manufacturer as Microchip Technology Inc. and device type. This mode is entered when Pin A9 is taken to VH (11.5V to 12.5V). The CE and OE lines must be at VIL. A0 is used to access any of the two non-erasable bytes whose data appears on O0 through O7. Pin Identity Programming takes place when: a) b) c) d) VCC is brought to the proper voltage, VPP is brought to the proper VH level, the OE pin is high, and the CE pin is low. Manufacturer Device Type* Input Output H e x A0 0 O O O O O O O 7 6 5 4 3 2 1 0 VIL VIH 0 0 1 0 1 0 0 1 29 1 0 0 0 1 1 0 0 8C * Code subject to change Since the erased state is "1" in the array, programming of "0" is required. The address to be programmed is set via pins A0-A14 and the data to be programmed is presented to pins O0-O7. When data and address are stable, a low going pulse on the CE line programs that location. DS11001L-page 6 1996 Microchip Technology Inc. 27C256 FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM Conditions: Tamb = 25C 5C VCC = 6.5 0.25V VPP = 13.0 0.25V Start ADDR = First Location VCC = 6.5V VPP = 13.0V X=0 Program one 100 s pulse Increment X Verify Byte Pass Fail No X = 10 ? Last Address? Yes Device Failed Yes No Increment Address VCC = VPP = 4.5V, 5.5V Device Passed 1996 Microchip Technology Inc. Yes All bytes = original data? No Device Failed DS11001L-page 7 27C256 NOTES: DS11001L-page 8 1996 Microchip Technology Inc. 27C256 NOTES: 1996 Microchip Technology Inc. DS11001L-page 9 27C256 NOTES: DS11001L-page 10 1996 Microchip Technology Inc. 27C256 27C256 Product Identification System To order or to obtain information (e.g., on pricing or delivery), please use listed part numbers, and refer to factory or listed sales offices. 27C256 - 90 I /TS Package: Temperature Range: Access Time: Device 1996 Microchip Technology Inc. L P SO TS VS = = = = = Plastic Leaded Chip Carrier Plastic DIP (Mil 600) Plastic SOIC (Mil 300) Thin Small Outline Package (TSOP) 8x20mm Very Small Outline Package (VSOP) 8x13.4mm Blank = 0C to +70C I = -40C to +85C E = -40C to +125C 90 10 12 15 20 27C256 = = = = = 90 ns 100 ns 120 ns 150 ns 200 ns 256K (32K x 8) CMOS EPROM DS11001L-page 11 WORLDWIDE SALES & SERVICE AMERICAS ASIA/PACIFIC EUROPE Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602 786-7200 Fax: 602 786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770 640-0034 Fax: 770 640-0307 Boston Microchip Technology Inc. 5 Mount Royal Avenue Marlborough, MA 01752 Tel: 508 480-9990 Fax: 508 480-8575 Chicago Microchip Technology Inc. 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 708 285-0071 Fax: 708 285-0075 Dallas Microchip Technology Inc. 14651 Dallas Parkway, Suite 816 Dallas, TX 75240-8809 Tel: 972 991-7177 Fax: 972 991-8588 Dayton Microchip Technology Inc. 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Unit 6, The Courtyard Meadow Bank, Furlong Road Bourne End, Buckinghamshire SL8 5AJ Tel: 44 1628 850303 Fax: 44 1628 850178 France Arizona Microchip Technology SARL Zone Industrielle de la Bonde 2 Rue du Buisson aux Fraises 91300 Massy - France Tel: 33 1 69 53 63 20 Fax: 33 1 69 30 90 79 Germany Arizona Microchip Technology GmbH Gustav-Heinemann-Ring 125 D-81739 Muenchen, Germany Tel: 49 89 627 144 0 Fax: 49 89 627 144 44 Italy Arizona Microchip Technology SRL Centro Direzionale Colleone Pas Taurus 1 Viale Colleoni 1 20041 Agrate Brianza Milan Italy Tel: 39 39 6899939 Fax: 39 39 689 9883 JAPAN Microchip Technology Intl. Inc. Benex S-1 6F 3-18-20, Shin Yokohama Kohoku-Ku, Yokohama Kanagawa 222 Japan Tel: 81 45 471 6166 Fax: 81 45 471 6122 9/3/96 All rights reserved. 1996, Microchip Technology Incorporated, USA. 9/96 Printed on recycled paper. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. DS11001L-page 12 1996 Microchip Technology Inc.