©1992 Burr-Brown Corporation PDS-1169B Printed in U.S.A. October, 1993
INA115
Precision
INSTRUMENTATION AMPLIFIER
A
1
A
2
A
3
12
11
10
25kΩ25kΩ
25kΩ25kΩ
13
7
5
4
V
IN
V
IN
R
G
V+
V–
INA115
Ref
V
O
G = 1 + 50kΩ
R
G
–
+
Over-Voltage
Protection
25kΩ
25kΩ
Over-Voltage
Protection
Feedback
15
14
3
2
8
V
O2
V
O1
1
FEATURES
●LOW OFFSET VOLTAGE: 50µV max
●LOW DRIFT: 0.25µV/°C max
●LOW INPUT BIAS CURRENT: 2nA max
●HIGH COMMON-MODE REJECTION:
115dB min
●INPUT OVER-VOLTAGE PROTECTION:
±40V
●WIDE SUPPLY RANGE: ±2.25 TO ±18V
●LOW QUIESCENT CURRENT: 3mA max
●SOL-16 SURFACE-MOUNT PACKAGE
APPLICATIONS
●SWITCHED-GAIN AMPLIFIER
●BRIDGE AMPLIFIER
●THERMOCOUPLE AMPLIFIER
●RTD SENSOR AMPLIFIER
●MEDICAL INSTRUMENTATION
●DATA ACQUISITION
DESCRIPTION
The INA115 is a low cost, general purpose instrumen-
tation amplifier offering excellent accuracy. Its versa-
tile three-op amp design and small size make it ideal
for a wide range of applications. Similar to the model
INA114, the INA115 provides additional connections
to the input op amps, A1 and A2, which improve gain
accuracy in high gains and are useful in forming
switched-gain amplifiers.
A single external resistor sets any gain from 1 to
10,000. Internal input protection can withstand up to
±40V without damage.
The INA115 is laser trimmed for very low offset
voltage (50µV), drift (0.25µV/˚C) and high common-
mode rejection (115dB at G=1000). It operates with
power supplies as low as ±2.25V, allowing use in
battery operated and single 5V supply systems. Quies-
cent current is 3mA maximum.
The INA115 is available in the SOL-16 surface-mount
package, specified for the –40°C to +85°C tempera-
ture range.
®
INA115
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
SBOS021
2
®
INA115
SPECIFICATIONS
ELECTRICAL
At T
A
= +25°C, V
S
= ±15V, R
L
= 2kΩ unless otherwise noted.
✻ Specification same as INA115BU.
NOTE: (1) Temperature coefficient of the “50kΩ” term in the gain equation. (2) Output specifications are for output amplifier, A3. A1 and A2 provide the same output
voltage swing but have less output current drive. A1 and A2 can drive external loads of 25kΩ || 200pF.
INA115BU INA115AU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
INPUT
Offset Voltage, RTI
Initial TA = +25°C±10 + 20/G ±50 + 100/G ±25 + 30/G ±125 + 500/G µV
vs Temperature TA = TMIN to TMAX ±0.1 + 0.5/G ±0.25 + 5/G ±0.25 + 5/G ±1 + 10/G µV/°C
vs Power Supply VS = ±2.25V to ±18V 0.5 + 2/G 3 + 10/G ✻✻µV/V
Long-Term Stability ±0.2 + 0.5/G ✻µV/mo
Impedance, Differential 1010 || 6 ✻Ω || pF
Common-Mode 1010 || 6 ✻Ω || pF
Input Common-Mode Range ±11 ±13.5 ✻✻ V
Safe Input Voltage ±40 ✻V
Common-Mode Rejection VCM = ±10V, ∆RS = 1kΩ
G = 1 80 96 75 90 dB
G = 10 96 115 90 106 dB
G = 100 110 120 106 110 dB
G = 1000 115 120 106 110 dB
BIAS CURRENT ±0.5 ±2✻±5nA
vs Temperature ±8✻pA/°C
OFFSET CURRENT ±0.5 ±2✻±5nA
vs Temperature ±8✻pA/°C
NOISE VOLTAGE, RTI G = 1000, RS = 0Ω
f = 10Hz 15 ✻nV/√Hz
f = 100Hz 11 ✻nV/√Hz
f = 1kHz 11 ✻nV/√Hz
fB = 0.1Hz to 10Hz 0.4 ✻µVp-p
Noise Current
f=10Hz 0.4 ✻pA/√Hz
f=1kHz 0.2 ✻pA/√Hz
fB = 0.1Hz to 10Hz 18 ✻pAp-p
GAIN
Gain Equation 1 + (50kΩ/RG)✻V/V
Range of Gain 1 10000 ✻✻V/V
Gain Error G = 1 ±0.01 ±0.05 ✻✻%
G = 10 ±0.02 ±0.4 ✻±0.5 %
G = 100 ±0.05 ±0.5 ✻±0.7 %
G = 1000 ±0.5 ±1✻±2%
Gain vs Temperature G = 1 ±2±10 ✻±10 ppm/°C
50kΩ Resistance(1) ±25 ±100 ✻✻ppm/°C
Nonlinearity G = 1 ±0.0001 ±0.001 ✻±0.002 % of FSR
G = 10 ±0.0005 ±0.002 ✻±0.004 % of FSR
G = 100 ±0.0005 ±0.002 ✻±0.004 % of FSR
G = 1000 ±0.002 ±0.01 ✻±0.02 % of FSR
OUTPUT(2)
Voltage IO = 5mA, TMIN to TMAX ±13.5 ±13.7 ✻✻ V
V
S = ±11.4V, RL = 2kΩ±10 ±10.5 ✻✻ V
V
S = ±2.25V, RL = 2kΩ±1±1.5 ✻✻ V
Load Capacitance Stability 1000 ✻pF
Short Circuit Current +20/–15 ✻mA
FREQUENCY RESPONSE
Bandwidth, –3dB G = 1 1 ✻MHz
G = 10 100 ✻kHz
G = 100 10 ✻kHz
G = 1000 1 ✻kHz
Slew Rate VO = ±10V, G = 10 0.3 0.6 ✻✻ V/µs
Settling Time, 0.01% G = 1 18 ✻µs
G = 10 20 ✻µs
G = 100 120 ✻µs
G = 1000 1100 ✻µs
Overload Recovery 50% Overdrive 20 ✻µs
POWER SUPPLY
Voltage Range ±2.25 ±15 ±18 ✻✻ ✻V
Current VIN = 0V ±2.2 ±3✻✻mA
TEMPERATURE RANGE
Specification –40 +85 ✻✻°C
Operating –40 +125 ✻✻°C
θ
JA 80 ✻°C/W
3
®
INA115
PIN CONFIGURATIONS ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
V
O1
Gain Sense
1
R
G
V
–IN
V
+IN
NC
V–
V
O2
NC
Gain Sense
2
R
G
V+
Feedback
V
O
Ref
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
U Package SOL-16 Surface-Mount
Top View
PACKAGE
DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER(1) RANGE
INA115AU SOL-16 Surface-Mount 211 –40°C to +85°C
INA115BU SOL-16 Surface-Mount 211 –40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
Supply Voltage .................................................................................. ±18V
Input Voltage Range.......................................................................... ±40V
Output Short-Circuit (to ground).............................................. Continuous
Operating Temperature ................................................. –40°C to +125°C
Storage Temperature ..................................................... –40°C to +125°C
Junction Temperature.................................................................... +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
ABSOLUTE MAXIMUM RATINGS
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
4
®
INA115
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, unless otherwise noted.
INPUT COMMON-MODE VOLTAGE RANGE
vs OUTPUT VOLTAGE
Output Voltage (V)
Common-Mode Voltage (V)
–15 –10 0 5 15–5
15
10
5
0
–5
–10
–15 10
Limited by A
1
+ Output Swing
A
3
– Output
Swing Limit A
3
+ Output
Swing Limit
Limited by A
2
– Output Swing
Limited by A
1
– Output Swing
Limited by A
2
+ Output Swing
V
D/2
–
+
–
+
VCM
VO
(Any Gain)
V
D/2
POSITIVE POWER SUPPLY REJECTION
vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
10 100 10k 1M1k
140
120
100
80
60
40
20
0100k
G = 1
G = 10
G = 100
G = 1000
NEGATIVE POWER SUPPLY REJECTION
vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
10 100 10k 1M1k
140
120
100
80
60
40
20
0100k
G = 1
G = 10
G = 100 G = 1000
INPUT- REFERRED NOISE VOLTAGE
vs FREQUENCY
Frequency (Hz)
Input-Referred Noise Voltage (nV/√ Hz)
110 1k100
1k
100
10
110k
G = 1
G = 10
G = 100, 1000
G = 1000
BW Limit
GAIN vs FREQUENCY
Frequency (Hz)
Gain (V/V)
10 100 10k 100k 1M1k
1k
100
10
1V
O1
connected to Gain Sense
1
and
V
O2
connected to Gain Sense
2
. See text.
COMMON-MODE REJECTION vs FREQUENCY
Frequency (Hz)
Common-Mode Rejection (dB)
10 100 10k 100k 1M1k
140
120
100
80
60
40
20
0
G = 1k
G = 100
G = 10
G = 1
G = 100, 1k
G = 10
5
®
INA115
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
SETTLING TIME vs GAIN
Gain (V/V)
Settling Time (µs)
1 100 100010
1200
1000
800
600
400
200
0
0.01%
0.1%
OFFSET VOLTAGE WARM-UP vs TIME
Time from Power Supply Turn-on (s)
Offset Voltage Change (µV)
0
6
4
2
0
–2
–4
–6 15 30 45 60 75 90 105 120
G 100
>
MAXIMUM OUTPUT SWING vs FREQUENCY
Peak to Peak Amplitude (V)
10
32
28
24
20
16
12
8
4
0100 10k 1M
Frequency (Hz)
100k1k
G = 100
G = 1, 10
G = 1000
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
Temperature (°C)
Input Bias and Input Offset Current (nA)
–40
2
1
0
–1
–2 –15 10 35 60 85
±IB
IOS
INPUT BIAS CURRENT
vs DIFFERENTIAL INPUT VOLTAGE
Differential Overload Voltage (V)
Input Bias Current (mA)
–45
3
2
1
0
–1
–2
–3 –30 –15 0 15 30 45
G = 1
G = 10
G = 1000
G = 100
INPUT BIAS CURRENT
vs COMMON-MODE INPUT VOLTAGE
Input Bias Current (mA)
–45
3
2
1
0
–1
–2
–3 –30 –15 0 15 30 45
|Ib1| + |Ib2|
Common-Mode Voltage (V)
Normal
Operation
Over-Voltage
Protection
Over-Voltage
Protection
One Input
Both Inputs
Both Inputs
One Input
6
®
INA115
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
SLEW RATE vs TEMPERATURE
Slew Rate (V/µs)
–75
1.0
0.8
0.6
0.4
0.2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
OUTPUT CURRENT LIMIT vs TEMPERATURE
Short Circuit Current (mA)
–40
30
25
20
15
10 85
Temperature (°C)
–15 10 35 60
+|I
CL
|
–|I
CL
|
QUIESCENT CURRENT vs TEMPERATURE
Quiescent Current (mA)
–75
2.8
2.6
2.4
2.2
2.0
1.8 125
Temperature (°C)
–50 –25 0 25 50 75 100
QUIESCENT CURRENT AND POWER DISSIPATION
vs POWER SUPPLY VOLTAGE
Quiescent Current (mA)
0
2.6
2.5
2.4
2.3
2.2
2.1
2.0
Power Supply Voltage (V)
±3 ±6 ±9 ±12 ±15 ±18
120
100
80
60
40
20
0
Power Dissipation (mW)
Power Dissipation
Quiescent Current
POSITIVE SIGNAL SWING
vs TEMPERATURE (R
L
= 2kΩ)
Output Voltage (V)
–75
16
14
12
10
8
6
4
2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
V
S
= ±15V
V
S
= ±11.4V
V
S
= ±2.25V
NEGATIVE SIGNAL SWING
vs TEMPERATURE (R
L
= 2kΩ)
Output Voltage (V)
–75
–16
–14
–12
–10
–8
–6
–4
–2
0125
Temperature (°C)
–50 –25 0 25 50 75 100
V
S
= ±15V
V
S
= ±11.4V
V
S
= ±2.25V
7
®
INA115
LARGE SIGNAL RESPONSE, G = 1
TYPICAL PERFORMANCE CURVES (CONT)
At T
A
= +25°C, V
S
= ±15V, unless otherwise noted.
SMALL SIGNAL RESPONSE, G = 1
LARGE SIGNAL RESPONSE, G = 1000 SMALL SIGNAL RESPONSE, G = 1000
INPUT-REFERRED NOISE, 0.1 to 10Hz
1 s/div
VO1 connected to Gain Sense1 and
VO2 connected to Gain Sense2
0
+10V
–10V
0
+200mV
0
+200mV
+100mV
0
–200mV
0.1µV/div
–10V
+10V
8
®
INA115
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation of
the INA115. Applications with noisy or high impedance
power supplies may require decoupling capacitors close to the
device pins as shown.
The output is referred to the output reference (Ref) terminal
which is normally grounded. This must be a low-impedance
connection to assure good common-mode rejection. A resis-
tance of 5Ω in series with the Ref pin will cause a typical
device to degrade to approximately 80dB CMR (G=1).
The INA115 has a separate output sense feedback connection
(pin 12). Pin 12 must be connected (normally to the output
terminal, pin 11) for proper operation. The output sense
connection can be used to sense the output voltage directly at
the load for best accuracy.
SETTING THE GAIN
Gain of the INA115 is set by connecting a single external
resistor, RG:
FIGURE 1. Basic Connections.
DESIRED RGNEAREST 1% RG
GAIN (Ω)(Ω)
1 No Connection No Connection
2 50.00k 49.9k
5 12.50k 12.4k
10 5.556k 5.62k
20 2.632k 2.61k
50 1.02k 1.02k
100 505.1 511
200 251.3 249
500 100.2 100
1000 50.05 49.9
2000 25.01 24.9
5000 10.00 10
10000 5.001 4.99
G=1+50 kΩ
R
G
(1)
Commonly used gains and resistor values are shown in
Figure 1.
For G=1, no resistor is required, but connect pins 2-3 and
connect pins 14-15. Gain peaking in G=1 can be reduced by
shorting the internal 25kΩ feedback resistors (see typical
performance curve Gain vs Frequency). To do this, connect
pins 1-2-3 and connect pins 8-14-15.
The 50kΩ term in equation 1 comes from the sum of the two
internal feedback resistors. These are on-chip metal film
resistors which are laser trimmed to accurate absolute values.
The accuracy and temperature coefficient of these resistors
are included in the gain accuracy and drift specifications of the
INA115.
The stability and temperature drift of the external gain setting
resistor, RG, also affects gain. RG’s contribution to gain error
and drift can be directly inferred from the gain equation (1).
Low resistor values required for high gain can make wiring
resistance important. The “force and sense” type connections
illustrated in Figure 1 help reduce the effect of interconnection
resistance.
A
1
A
2
A
3
12
11
10
25kΩ25kΩ
25kΩ25kΩ
13
7
5
4
V
IN
V
IN
R
G
V+
V–
INA115
–
+
Over-Voltage
Protection
25kΩ
25kΩ
Over-Voltage
Protection
15
14
3
2
8
V
O2
V
O1
1
Load
G = 1 + 50kΩ
R
G
V
O
= G • (V
IN
– V
IN
)
0.1µF
0.1µF
+
–
V
O
Also drawn in simplified form:
Ref
INA115
V
IN
V
IN
R
G
–
+
V
O
V
O2
V
O1
9
®
INA115
FIGURE 2. Switched-Gain Instrumentation Amplifier (minimum components).
SWITCHED GAIN
Figure 2 shows a circuit for digital selection of four gains.
Multiplexer “on” resistance does not significantly affect gain.
The resistor values required for some commonly used gain
steps are shown. This circuit uses the internal 25kΩ feedback
resistors, so the resistor values shown cannot be scaled to a
different impedance level.
Figure 3 shows an alternative switchable gain configuration.
This circuit does not use the internal 25kΩ feedback resistors,
so the nominal values shown can be scaled to other impedance
levels. This circuit is ideal for use with a precision resistor
network to achieve excellent gain accuracy and lowest gain
drift.
NOISE PERFORMANCE
The INA115 provides very low noise in most applications. For
differential source impedances less than 1kΩ, the INA103
may provide lower noise. For source impedances greater than
50kΩ, the INA111 FET-Input Instrumentation Amplifier may
provide lower noise.
Low frequency noise of the INA115 is approximately
0.4µVp-p measured from 0.1 to 10Hz. This is approximately
one-tenth the noise of “low noise” chopper-stabilized ampli-
fiers.
OFFSET TRIMMING
The INA115 is laser trimmed for very low offset voltage and
drift. Most applications require no external offset adjustment.
Figure 4 shows an optional circuit for trimming the output
offset voltage. The voltage applied to Ref terminal is summed
at the output. Low impedance must be maintained at this node
to assure good common-mode rejection. This is achieved by
buffering the trim voltage with an op amp as shown.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA115 is extremely high—
approximately 1010Ω. However, a path must be provided for
the input bias current of both inputs. This input bias current is
typically less than ±1nA (it can be either polarity due to
cancellation circuitry). High input impedance means that this
input bias current changes very little with varying input
voltage.
Input circuitry must provide a path for this input bias current
if the INA115 is to operate properly. Figure 5 shows various
provisions for an input bias current path. Without a bias
current return path, the inputs will float to a potential which
exceeds the common-mode range of the INA115 and the input
amplifiers will saturate. If the differential source resistance is
low, a bias current return path can be connected to one input
(see thermocouple example in Figure 5). With higher source
impedance, using two resistors provides a balanced input with
possible advantages of lower input offset voltage due bias
current and better common-mode rejection.
A0A1Gain
LL 1
HL
LH
H H Highest
R1R2R3R4
GAIN STEPS (Ω)(Ω)(Ω)(Ω)
1, 10, 100, 1000 2.5k 55.6 500 2.5k
1, 2, 4, 8 12.5k 12.5k 12.5k 12.5k
1, 2, 5, 10 15k 10k 10k 15k
0, +3, +6, +9dB 17.7k 60.3k 25k 17.7k
A
1
A
2
A
3
12
11
10
25kΩ25kΩ
25kΩ25kΩ
5
4
V
IN
V
IN
INA115
V
O
–
+
Over-Voltage
Protection
25kΩ
25kΩ
Over-Voltage
Protection
Feedback
15
14
3
2
8
1
HI-509
–15V
+15V
16
1
2
14
3
15
8
9
4
5
6
7
10
11
12
13
R
1
R
2
R
3
R
4
A
1
A
0
Enable
10
®
INA115
FIGURE 5. Providing an Input Common-Mode Current Path.
FIGURE 4. Optional Trimming of Output Offset Voltage.
47kΩ47kΩ
10kΩ
Microphone,
Hydrophone
etc.
Thermocouple
Center-tap provides
bias current return.
INA115
INA115
INA115
INA115
V
IN
V
IN
R
G
–
+
10kΩ
V
O
OPA177
Ref
±10mV
Adjustment Range
100Ω
100Ω
100µA
1/2 REF200
100µA
1/2 REF200
V+
V–
FIGURE 3. Switched-Gain Instrumentation Amplifier (improved gain drift).
R1R2R3R4R5R6R7
GAIN STEPS ( Ω)(Ω)(Ω)(Ω)(Ω)(Ω)(Ω)
1, 10, 100, 1000V/V 18k 1.8k 180 40 180 1.8k 18k
1, 2, 4, 8V/V 18k 9k 4.5k 9k 4.5k 9k 18k
1, 2, 5, 10V/V 18k 10.8k 3.6k 7.2k 3.6k 10.8k 18k
0, +3, +6, +9dB 18k 12.74k 9.02k 43.7k 9.02k 12.74k 18k
A0A1Gain
LL 1
HL
LH
H H Highest
A
1
A
2
A
3
12
11
10
25kΩ25kΩ
25kΩ25kΩ
13
7
5
4
V
IN
V
IN
INA115
V
O
–
+
Over-Voltage
Protection
25kΩ
25kΩ
Over-Voltage
Protection
Feedback
15
14
3
2
8
1
NC
NC
HI-509
–15V
+15V
16
1
2
14
3
15
8
9
4
5
6
7
10
11
12
13 R
1
R
2
R
3
R
4
R
5
R
6
R
7
A
1
A
0
Enable
11
®
INA115
FIGURE 7. ECG Amplifier with Right Leg Drive.
INPUT COMMON-MODE RANGE
The linear common-mode range of the input op amps of the
INA115 is approximately ±13.75V (or 1.25V from the power
supplies). As the output voltage increases, however, the linear
input range will be limited by the output voltage swing of the
input amplifiers, A1 and A2. The common-mode range is
related to the output voltage of the complete amplifier—see
performance curve “Input Common-Mode Range vs Output
Voltage.”
A combination of common-mode and differential input sig-
nals can cause the output of A1 or A2 to saturate. Figure 6
shows the output voltage swing of A1 and A2 expressed in
terms of a common-mode and differential input voltages.
Output swing capability of the input amplifiers, A1 and A2 is
the same as the output amplifier, A3. For applications where
input common-mode range must be maximized, limit the
output voltage swing by connecting the INA115 in a lower
gain (see performance curve “Input Common-Mode Voltage
Range vs Output Voltage”). If necessary, add gain after the
INA115 to increase the voltage swing.
Input-overload often produces an output voltage that appears
normal. For example, an input voltage of +20V on one input
and +40V on the other input will obviously exceed the linear
common-mode range of both input amplifiers. Since both
input amplifiers are saturated to the nearly the same output
voltage limit, the difference voltage measured by the output
amplifier will be near zero. The output of the INA115 will be
near 0V even though both inputs are overloaded.
INPUT PROTECTION
The inputs of the INA115 are individually protected for
voltages up to ±40V. For example, a condition of –40V on one
input and +40V on the other input will not cause damage.
Internal circuitry on each input provides low series impedance
under normal signal conditions. To provide equivalent protec-
tion, series input resistors would contribute excessive noise. If
the input is overloaded, the protection circuitry limits the input
current to a safe value (approximately 1.5mA). The typical
performance curve “Input Bias Current vs Common-Mode
Input Voltage” shows this input current limit behavior. The
inputs are protected even if the power supply voltage is zero.
OTHER APPLICATIONS
See the INA114 data sheet for other applications circuits of
general interest.
LA
RL
RA
24.9kΩ
OPA177
390kΩ
390kΩ24.9kΩ
INA115
R
G
V
O2
V
O1
V
O
FIGURE 6. Voltage Swing of A1 and A2.
A
1
A
2
A
3
25kΩ25kΩ
25kΩ25kΩ
R
G
V+
V–
INA115
V
O
= G • V
D
G = 1 + 50kΩ
R
G
25kΩ
25kΩ
V
CM
– G • V
D
2
V
D
2
V
D
2
V
CM
V
CM
+ G • V
D
2
Over-Voltage
Protection
Over-Voltage
Protection
PACKAGE OPTION ADDENDUM
www.ti.com 9-Jul-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
INA115AU ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Request Free Samples
INA115AU/1K ACTIVE SOIC DW 16 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
INA115AU/1KE4 ACTIVE SOIC DW 16 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
INA115AUG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Contact TI Distributor
or Sales Office
INA115BU ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Request Free Samples
INA115BUG4 ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Contact TI Distributor
or Sales Office
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 9-Jul-2010
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA115AU/1K SOIC DW 16 1000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA115AU/1K SOIC DW 16 1000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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