1www.pericom.com PI6C557-03AQ Rev A 05/22/14 All trademarks are property of their respective owners.
PI6C557-03AQ
Block Diagram
Phase
Lock
Loop
Crystal
Driver
VDD
GND
X1/CLK
X2
25 MHz
crystal or clock
Control
Logic
SS1:SS0 2
S1:S0
2
CLK0
CLK0
RR
CLK1
CLK1
2
2
OE
Pulling
Capacitors
Pin Conguration (16-Pin TSSOP)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDDX
CLK0
CLK0
GNDA
VDDA
CLK1
CLK1
IREF
S0
S1
SS0
X1/CLK
X2
OE
GNDX
SS1
Description
e PI6C557-03AQ is a spread spectrum clock generator compli-
ant to PCI Express® 2.0 and Ethernet requirements. e device is
used for PC or embedded systems to substantially reduce Electro-
magnetic Interference (EMI).
e PI6C557-03AQ provides two dierential (HCSL) or LVDS
spread spectrum outputs. e PI6C557-03AQ is congured to se-
lect spread and clock selection. Using Pericom's patented Phase-
Locked Loop (PLL) techniques, the device takes a 25MHz crystal
input and produces two pairs of dierential outputs (HCSL) at
25MHz, 100MHz, 125MHz and 200MHz clock frequencies. It
also provides spread selection of -0.5%, -0.75%, and no spread.
Features
PCIe® 2.0 compliant
Phase jitter - 2.1ps RMS (typ)
LVDS compatible outputs
Supply voltage of 3.3V ±10%
25MHz crystal or clock input frequency
HCSL outputs, 0.8V Current mode dierential pair
Jitter 35ps cycle-to-cycle (typ)
Spread of -0.5%, -0.75%, and no spread
AEC-Q100 qualied
Spread Bypass option available
Spread and frequency selection via external pins
Packaging: (Pb-free and Green)
16-pin TSSOP (L16)
PCIe 2.0 Clock Generator with 2 HCSL Outputs
for Automotive Applications
14-0076
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
Pin Description
Pin # Pin Name I/O Ty pe Description
1S0 Input Select pin 0 (Internal pull-up resistor). See Table 1.
2S1 Input Select pin 1 (Internal pull-up resistor). See Table 1.
3SS0 Input Spread Select pin 0 (Internal pull-up resistor). See Table 2.
4X1/CLK Input Crystal or clock input. Connect to a 25MHz crystal or single ended clock.
5X2 Output Crystal connection. Leave unconnected for clock input.
6OE Input Output enable. Internal pull-up resistor.
7GNDX Power Crystal ground pin.
8SS1 Input Spread Select pin 1 (Internal pull-up resistor). See Table 2.
9IREF Output Precision resistor attached to this pin is connected to the internal current reference.
10 CLK1 Output HCSL compliment clock output
11 CLK1 Output HCSL clock output
12 VDDA Power Connect to a +3.3V source.
13 GNDA Power Output and analog circuit ground.
14 CLK0 Output HCSL compliment clock output
15 CLK0 Output HCSL clock output
16 VDDX Power Connect to a +3.3V source.
Table 1: Output Select Table
S1 S0 CLK(MHz)
0 0 25
0 1 100
1 0 125
1 1 200
Table 2: Spread Selection Table
SS1 SS0 Spread
0 0 No Spread
0 1 Down -0.5
1 0 Down -0.75
1 1 No Spread
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
Application Information
Decoupling Capacitors
Decoupling capacitors of 0.01μF should be connected between
each VDD pin and the ground plane and placed as close to the
VDD pin as possible.
Crystal
Use a 25MHz fundamental mode parallel resonant crystal with
less than 300PPM of error across temperature.
Crystal Capacitors
CL = Crystals's load capacitance in pF
Crystal Capacitors (pF) = (CL - 8) *2
For example, for a crystal with 16pF load caps, the external ef-
fective crystal cap would be 16 pF. (16-8)*2=16.
Current Source (IREF) Reference Resistor - RR
If board target trace impedance is 50Ω,
then RR = 475Ω providing an IREF of 2.32 mA. e output cur-
rent (IOH) is 6*IREF.
Output Termination
e PCI Express dierential clock outputs of the PI6C557-03AQ
are open source drivers and require an external series resistor
and a resistor to ground. ese resistor values and their allow-
able locations are shown in detail in the PCI Express Layout
Guidelines section.
e PI6C557-03AQ can be congured for LVDS compatible volt-
age levels. See the LVDS Compatible Layout Guidelines section.
Output Structures
R
R
=475
6*IREF
=2.3mA IREF
See Output Termination
Sections
Ω
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
Typical PCI Express (HCSL) Waveform
0.175 V
0.52 V
0.175 V
0.52 V
t
OR
t
OF
250 ps 400 ps
800 mV
0
PCI Express Device Routing
R
S
R
S
R
T R
T
PCI-Express
Load or
Connector
L1 L2
L3’
L4
L1’ L2’
L3
L4’
PI6C557-03AQ
Output
Clock
PCI Express Layout Guidelines
Common Recommendations for Dierential Routing Dimension or Value Unit
L1 length, route as non-coupled 50Ω trace. 0.5 max inch
L2 length, route as non-coupled 50Ω trace. 0.2 max inch
L3 length, route as non-coupled 50Ω trace. 0.2 max inch
R
S
33 Ω
R
T
49.9 Ω
Dierential Routing on a Single PCB Dimension or Value Unit
L4 length, route as coupled microstrip 100Ω dierential trace. 2 min to 16 max inch
L4 length, route as coupled stripline 100Ω dierential trace. 1.8 min to 14.4 max inch
Dierential Routing to a PCI Express connector Dimension or Value Unit
L4 length, route as coupled microstrip 100Ω dierential trace. 0.25 min to 14 max inch
L4 length, route as coupled stripline 100Ω dierential trace. 0.225 min to 12.6 max inch
14-0076
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
Application Information
LVDS Recommendations for Dierential Routing Dimension or Value Unit
L1 length, route as non-coupled 50Ω trace. 0.5 max inch
L2 length, route as non-coupled 50Ω trace. 0.2 max inch
RP 100 Ω
RQ 100 Ω
RT 150 Ω
L3 length, route as 100Ω dierential trace.
L3 length, route as 100Ω dierential trace.
LVDS Device Routing
L1
L2’
L3
L1’
L2
L3’
R
Q R
P
LVDS
Device
Load
PI6C557-03AQ
Clock
Output
R
T
R
T
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
Supply Voltage to Ground Potential ....................... 5.5V
All Inputs and Outputs ......................-0.5V to VDD+0.5V
Ambient Operating Temperature ..................-40 to +85°C
Storage Temperature ............................ -65 to +150°C
Junction Temperature .................................150°C
Soldering Temperature .................................260°C
EDS Protection (Input) .....................2000 V min (HBM)
Electrical Specications
Recommended Operation Conditions
Parameter Min. Typ. Max. Unit
Ambient Operating Temperature -40 +85 °C
Power Supply Voltage (measured in respect to GND) +3.0 +3.6 V
DC Characteristics (VDD = 3.3V ±10%, TA = -40°C to +85°C)
Symbol Parameter Conditions Min. Typ. Max. Unit
VDD Supply Voltage 3.0 3.3 3.6 V
VIH Input High Voltage(1) OE 2.0 VDD +0.3 V
VIL Input Low Voltage(1) OE GND -0.3 0.8 V
IIL Input Leakage Current 0 < Vin < VDD
With input pull-up
and pull-downs -20 20
µA
Without input pull-up
and pull-downs -5 5
IDD Operating Supply Cur-
rent
RL = 50Ω, CL = 2pF 95 mA
IDDOE OE = LOW 50 mA
CIN Input Capacitance @ 55MHz 7pF
COUT Output Capacitance @ 55MHz 6pF
LPIN Pin Inductance 5 nH
ROUT Output Resistance CLK Outputs 3.0 kΩ
Notes:
1. Single edge is monotonic when transitioning through region.
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.) Note:
Stresses greater than those listed under MAXI-
MUM RATINGS may cause permanent damage to
the device. is is a stress rating only and func-
tional operation of the device at these or any other
conditions above those indicated in the operational
sections of this specication is not implied. Expo-
sure to absolute maximum rating conditions for
extended periods may aect reliability.
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
ermal Characteristics
Symbol Parameter Conditions Min. Typ. Max. Unit
θJA ermal Resistance Junction to Ambient Still air 90 °C/W
θJC ermal Resistance Junction to Case 24 °C/W
HCSL Output AC Characteristics (VDD = 3.3V ±10%, TA = -40°C to +85°C)
Symbol Parameter Conditions Min. Typ. Max. Unit
FIN Input Frequency 25 MHz
VOUT Output Frequency 25 200 MHz
VOH Output High Voltage (1,2) 100 MHz HCSL output @ VDD =
3.3V 660 800 900 mV
VOL Output Low Voltage(1,2) -150 0mV
VCPA Crossing Point Voltage(1,2) Absolute 250 350 550 mV
VCN Crossing Point Voltage(1,2,4) Variation over all edges 140 mV
JCC Jitter, Cycle-to-Cycle(1,3) 35 60 ps
JRMS PCIe RMS Jitter PCIe 2.0 Test Method @ 100MHz
Output 3.1 ps
MF Modulation Frequency Spread Spectrum 30 31.5 33 kHz
tOR Rise Time(1,2) From 0.175V to 0.525V 175 500 ps
tOF Fall Time(1,2) From 0.525V to 0.175V 175 500 ps
TSKEW Skew between outputs At Crossing Point Voltage 50 ps
TDU TY-CYCL E Duty Cycle(1,3) 45 55 %
TOE Output Enable Time(5) All outputs 10 μs
TOT Output Disable Time(5) All outputs 10 μs
tSTABLE From power-up to VDD=3.3V From Power-up VDD=3.3V 3.0 ms
tSPREAD Setting period aer spread change Setting period aer spread change 3.0 ms
Notes:
1. RL = 50-Ohm with CL = 2 pF
2. Single-ended waveform
3. Differential waveform
4. Measured at the crossing point
5. CLK pins are tri-stated when OE is LOW
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
Recomended Crystal Specication
Pericom recommends:
a) FL2500184Q, SMD 3.2x2.5(4P), 25M, CL=20pF, Frequency Tolerance ±15ppm, Stability ±20ppm
(http://www.pericom.com/pdf/datasheets/se/FL.pd)
C1
27pF
25M Crystal�
(CL�=�20pF)
C2
27pF
Xin
Xout
Optional
360Ω
Recommended Crystal Circuit
e following diagram shows PI6C557-03AQ crystal circuit connection with a parallel crystal. For the C L=20pF
parallel crystal, it is suggested to use C1=27 pF, C2=27 pF in general. C1 and C2 can be adjusted to ne tune to the
target ppm of crystal oscillation according to dierent board layouts. R1=360 ohm is recommended in layout for
smaller size crystal drive level adjustment.
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PI6C557-03AQ
PCIe 2.0 Clock Generator with 2 HCSL Outputs for Automotive Applications
Packaging Mechanical: 16-Pin TSSOP (L)
Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
Ordering Information
Ordering Code Package Code Package Type
PI6C557-03AQLE L Pb-free & Green, 16-pin TSSOP
Notes:
• ermal characteristics can be found on the company web site at www.pericom.com/packaging/
• "E" denotes Pb-free and Green
• Adding an "X" at the end of the ordering code denotes tape and reel packaging
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