NCV8505D2T25 - ON Semiconductor

October, 2009 − Rev. 12

1Publication Order Number:

NCV8505/D

NCV8505 Series

Micropower 400 mA

LDO Linear Regulators

with ENABLE, DELAY,

and RESET

The NCV8505 is a family of precision micropower voltage

regulators. Their output current capability is 400 mA. The family has

output voltage options for Adjustable, 2.5 V, 3.3 V and 5.0 V.

The output voltage is accurate within ± 2.0% with a maximum

dropout voltage of 0.6 V at 400 mA. Low quiescent current is a feature

drawing less than 1.0 mA with ENABLE = 0 V. With ENABLE = 5.0 V,

the part only draws 200 mA with 100 mA load. This part is ideal for any

and all battery operated microprocessor equipment.

Microprocessor control logic includes an active RESET (with

DELAY).

The active RESET circuit operates correctly at an output voltage as

low as 1.0 V. The RESET function is activated during the power up

sequence or during normal operation if the output voltage drops below

the regulation limits.

The regulator is protected against reverse battery, short circuit, and

thermal overload conditions. The device can withstand load dump

transients making it suitable for use in automotive environments. The

device has also been optimized for EMC conditions.

Features

•Output Voltage Options: Adjustable, 2.5 V, 3.3 V, 5.0 V

•± 2.0% Output

•Low < 1.0 mA Sleep Current

•Low 200 mA Quiescent Current

•Fixed or Adjustable Output Voltage

•Active RESET

•ENABLE

•400 mA Output Current Capability

•Fault Protection

♦+60 V Peak Transient Voltage

♦−15 V Reverse Voltage

♦Short Circuit

♦Thermal Overload

•NCV Prefix for Automotive and Other Applications Requiring Site

and Change Control

•AEC Qualified

•PPAP Capable

•These are Pb−Free Devices

See detailed ordering and shipping information in the package

dimensions section on page 11 of this data sheet.

ORDERING INFORMATION

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x = Voltage Ratings as Indicated Below:

A = Adjustable

2 = 2.5 V

3 = 3.3 V

5 = 5.0 V

A = Assembly Location

WL = Wafer Lot

Y = Year

WW = Work Week

G=Pb−Free Package

MARKING

DIAGRAM

D2PAK−7

DPS SUFFIX

CASE 936AB

V8505x

AWLYWWG

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PIN CONNECTIONS

FIXED OUTPUTADJUSTABLE OUTPUT

Tab = GND

Lead 1. DELAY

2. ENABLE

3. RESET

4. GND

5. VADJ

6. VOUT

7. VIN

Tab = GND

Lead 1. DELAY

2. ENABLE

3. RESET

4. GND

5. SENSE

6. VOUT

7. VIN

VOUT

GND

VIN

NCV8505

33 mF

5.1 k

RRST

RESET

10 mF

Microprocessor

DELAY

CDELAY

VBAT VDD

Figure 1. Application Diagram

VADJ

(Adjustable

Output Only)

I/O

ENABLE

SENSE

(Fixed Output Only)

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MAXIMUM RATINGS

Rating Value Unit

VIN (DC) −15 to 45 V

Peak Transient Voltage (46 V Load Dump @ VIN = 14 V) 60 V

Operating Voltage 45 V

VOUT (DC) −0.3 to 16 V

Voltage Range (RESET, DELAY) −0.3 to 10 V

Input Voltage Range: VADJ −0.3 to 16 V

Input Voltage Range (ENABLE) −0.3 to 10* V

ESD Susceptibility (Human Body Model)

(Machine Model)

4.0

200

Junction Temperature, TJ−40 to +150 °C

Storage Temperature, TS−55 to 150 °C

Package Thermal Resistance, 7 Lead D2PAK Junction−to−Case, RqJC

Junction−to−Ambient, RqJA

2.0

10−50**

°C/W

Lead Temperature Soldering: Reflow: (SMD styles only) (Note 1) 240 peak (Note 2) °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. 60 second maximum above 183°C.

2. −5°C/+0°C allowable conditions.

*Reference Figure 16 for switched−battery ENABLE application.

**Depending on thermal properties of substrate, RqJA = RqJC + RqCA.

ELECTRICAL CHARACTERISTICS (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN = dependent on voltage option (Note 3);

unless otherwise specified.)

Characteristic Test Conditions Min Typ Max Unit

Output Stage

Output Voltage for 2.5 V Option (VO)6.5 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA

4.5 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA

2.450

2.425

2.5

2.550

2.575

Output Voltage for 3.3 V Option (VO)7.3 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA

4.5 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA

3.234

3.201

3.3

3.366

3.399

Output Voltage for 5.0 V Option (VO)9.0 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA

6.0 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA

4.90

4.85

5.0

5.10

5.15

Output Voltage for Adjustable Option (VO) VOUT = VADJ (Unity Gain)

6.5 V < VIN < 16 V, 1.0 mA < IOUT < 400 mA

4.5 V < VIN < 26 V, 1.0 mA < IOUT < 400 mA

1.274

1.261

1.300

1.326

1.339

Dropout Voltage (VIN − VOUT)

(5.0 V and Adj. > 5.0 V Options Only)

IOUT = 400 mA

IOUT = 1.0 mA

−

400

600

150

Load Regulation VIN = 14 V, 5.0 mA ≤ IOUT ≤ 400 mA −30 5.0 30 mV

Line Regulation (2.5 V, 3.3 V, and

Adjustable Options)

4.5 V < VIN < 26 V, IOUT = 1.0 mA −5.0 25 mV

Line Regulation (5.0 V Option) 6.0 V < VIN < 26 V, IOUT = 1.0 mA −5.0 25 mV

Quiescent Current, (IQ) Active Mode IOUT = 100 mA, VIN = 12 V

IOUT = 75 mA, VIN = 14 V

IOUT ≤ 400 mA, VIN = 14 V

−

200

2.5

350

5.0

Quiescent Current, (IQ) Sleep Mode ENABLE = 0 V, VIN = 12 V, −40°C ≤ TJ ≤ 125°C− − 1.0 mA

Current Limit −425 800 −mA

Short Circuit Output Current VOUT = 0 V 100 500 −mA

Thermal Shutdown (Guaranteed by Design) 150 180 −°C

3. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.

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ELECTRICAL CHARACTERISTICS (continued) (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN = dependent on

voltage option (Note 4); unless otherwise specified.)

Characteristic Test Conditions Min Typ Max Unit

Reset Function (RESET)

RESET Threshold for 2.5 V Option

HIGH (VRH)

LOW (VRL)

Hysteresis

VIN = 4.5 V (Note 5) (Note 6)

VOUT Increasing

VOUT Decreasing

2.35

2.30

−

1.0 × VO

−

RESET Threshold for 3.3 V Option

HIGH (VRH)

LOW (VRL)

Hysteresis

VIN = 4.5 V (Note 5) (Note 6)

VOUT Increasing

VOUT Decreasing

3.10

3.00

−

1.0 × VO

−

RESET Threshold for 5.0 V Option

HIGH (VRH)

LOW (VRL)

Hysteresis

VIN = 6.0 V (Note 6)

VOUT Increasing

VOUT Decreasing

4.70

4.60

−

1.0 × VO

−

RESET Threshold for Adjustable Option

HIGH (VRH)

LOW (VRL)

Hysteresis

VIN = 4.5 V (Note 5) (Note 6)

VOUT Increasing

VOUT Decreasing

1.22

1.19

−

1.0 × VO

−

RESET Output Voltage

Low (VRLO)

VIN = Minimum (Note 6) (Note 7)

1.0 V ≤ VOUT ≤ VRL, RRESET = 5.1 k

−0.1 0.4 V

DELAY Switching Threshold (VDT)

(2.5 V, 3.3 V, and 5.0 V Options)

VIN = Minimum (Note 6) (Note 7) 1.4 1.8 2.2 V

DELAY Switching Threshold (VDT)

(Adjustable Option)

VIN = Minimum (Note 6) (Note 7) 1.0 1.3 1.6 V

DELAY Low Voltage VIN = Minimum (Note 6) (Note 7)

VOUT < RESET Threshold Low(min)

− − 0.2 V

DELAY Charge Current VIN = Minimum (Note 6) (Note 7)

DELAY = 1.0 V, VOUT > VRH

2.5 4.0 5.5 mA

DELAY Discharge Current VIN = Minimum (Note 6) (Note 7)

DELAY = 1.0 V, VOUT < VRL

5.0 − − mA

Voltage Adjust (Adjustable Output only)

Input Current VADJ = 1.25 V, VIN = Minimum (Note 6) (Note 7) −0.5 −0.5 mA

ENABLE

Input Threshold Low, VIN = 14 V (Note 6)

High, VIN = 14 V (Note 6)

−

2.0

−

1.0

−

Input Current ENABLE = 5.0 V, VIN = 14 V (Note 6) −30 75 mA

4. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.

5. For VIN ≤ 4.5 V, a RESET = Low may occur with the output in regulation.

6. Part is guaranteed by design to meet specification over the entire VIN voltage range, but is production tested only at the specified VIN voltage.

7. Minimum VIN = 4.5 V for 2.5 V, 3.3 V, and Adjustable options. Minimum VIN = 6.0 V for 5.0 V option.

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PACKAGE PIN DESCRIPTION, ADJUSTABLE OUTPUT

Pin Number Pin Symbol Function

1 DELAY Timing capacitor for RESET function.

2 ENABLE ENABLE control for the IC. A high powers the device up.

3 RESET Active reset (accurate to VOUT ≥ 1.0 V)

4 GND Ground. All GND leads must be connected to Ground.

5 VADJ Voltage Adjust. A resistor divider from VOUT to this lead sets the output voltage.

6 VOUT ±2.0%, 400 mA output.

7 VIN Input Voltage.

PACKAGE PIN DESCRIPTION, FIXED OUTPUT

Pin Number Pin Symbol Function

1 DELAY Timing capacitor for RESET function.

2 ENABLE ENABLE control for the IC. A high powers the device up.

3 RESET Active reset (accurate to VOUT ≥ 1.0 V)

4 GND Ground. All GND leads must be connected to Ground.

5 SENSE Kelvin connection which allows remote sensing of output voltage for improved regulation. If

remote sensing is not desired, connect to VOUT

6 VOUT ±2.0%, 400 mA output.

7 VIN Input Voltage.

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VIN

RESET

VOUT

DELAY

Figure 2. Block Diagram

GND

Current Source

(Circuit Bias)

Current Limit

Sense

Error Amplifier

VBG

IBIAS

VBG

IBIAS

+−

−

Bandgap

Reference

Thermal

Protection

1.8 V (Fixed Versions)

1.3 V (Adjustable Version)

4.0 mA15 k

Adjustable

Version only

VADJ

ENABLE

Fixed Versions only

SENSE

−

1.5 V

−

VBG −18 mV

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TYPICAL PERFORMANCE CHARACTERISTICS

Figure 3. 5 V Output Voltage vs. Temperature

Iout, OUTPUT CURRENT (mA)

50 100 150 200 250

DROPOUT VOLTAGE (mV)

400

300

200

100

5 V and Adj. > 5 V options only

Figure 4. 3.3 V Output Voltage vs. Temperature

Figure 5. 2.5 V Output Voltage vs. Temperature Figure 6. Dropout Voltage vs. Output Current

INPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

Figure 7. Output Voltage vs. Input Voltage Figure 8. Output Voltage vs. Input Voltage

500

600

125 °C

−40

Vout, OUTPUT VOLTAGE (V)

4.90

TEMPERATURE (°C)

4.98

5.00

5.08

5.10

−20 1400 20 40 60 80 120100

VOUT = 5.0 V

VIN = 14 V

IOUT = 5.0 mA

4.96

5.06

4.94

5.04

4.92

5.02

160 −40

Vout, OUTPUT VOLTAGE (V)

3.23

TEMPERATURE (°C)

3.31

3.33

3.35

−20 1400 20 40 60 80 120100

VOUT = 3.3 V

VIN = 14 V

IOUT = 5.0 mA

3.29

3.27

3.25

160

−40

Vout, OUTPUT VOLTAGE (V)

2.45

TEMPERATURE (°C)

2.49

2.50

2.54

2.55

−20 1400 20 40 60 80 120100

VOUT = 2.5 V

VIN = 14 V

IOUT = 5.0 mA

2.48

2.53

2.47

2.52

2.46

2.51

160 300 350 400

25 °C

−40 °C

IOUT = 1 mA

INPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

0 4 8 12162024

125 °C

25 °C

−40 °C

0.0

0.5

1.0

1.5

2.0

2.5

3.0

1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0

IOUT = 1 mA

125 °C25 °C−40 °C

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TYPICAL PERFORMANCE CHARACTERISTICS

0.01

Iout, OUTPUT CURRENT (mA)

50 100 150 200 250 350 400

100

ESR (W)

1.0

0.1

Figure 9. Output Stability with Output Voltage Change Figure 10. Output Stability with Output Capacitor

Change

300

VIN = 14 V

CVOUT = 10 mF

Unstable Region

Stable Region

2.5 V

3.3 V

5.0 V

0.1

Iout, OUTPUT CURRENT (mA)

50 100 150 200 250 350 400

100

ESR (W)

1.0

0 300

5 V version

Unstable Region

Stable Region CVOUT = 0.1 mF

Unstable Region

CVOUT = 33 mF*

*There is no unstable lower

region for the 33 mF capacitor

Figure 11. Quiescent Current vs. Output Current Figure 12. Quiescent Current vs. Output Current

Figure 13. Quiescent Current vs. Input Voltage

IQ, QUIESCENT CURRENT (mA)

0.0

IOUT

, OUTPUT CURRENT (mA)

0.2

0.4

0.6

0.8

1.0

1.2

2.0

5101520 3025

+25°C

+125°C

−40°C

Figure 14. Quiescent Current vs. Input Voltage

35 40 5045

1.4

1.6

1.8

IQ, QUIESCENT CURRENT (mA)

IOUT

, OUTPUT CURRENT (mA)

50 100 150 200 300250

+25°C

+125°C

−40°C

350 400 500450

IQ, QUIESCENT CURRENT (mA)

VIN, INPUT VOLTAGE (V)

810 12 14 1816

T = 25°C

Iout = 200 mA

20 22 2624

Iout = 100 mA

Iout = 50 mA

Iout = 10 mA

IQ, QUIESCENT CURRENT (mA)

175

VIN, INPUT VOLTAGE (V)

180

185

190

195

200

210

810 12 14 1816

T = 25°C

20 22 2624

Iout = 100 mA

205

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CIRCUIT DESCRIPTION

REGULATOR CONTROL FUNCTIONS

The NCV8505 contains the microprocessor compatible

control function RESET (Figure 15).

Figure 15. Reset and Delay Circuit Wave Forms

VIN

VOUT

RESET

DELAY

(VDT)

Threshold

DELAY

Threshold

RESET

TdTd

RESET Function

A RESET signal (low voltage) is generated as the IC

powers up until VOUT is within 1.5% of the regulated output

voltage, or when VOUT drops out of regulation,and is lower

than 4.0% below the regulated output voltage. Hysteresis is

included in the function to minimize oscillations.

The RESET output is an open collector NPN transistor,

controlled by a low voltage detection circuit. The circuit is

functionally independent of the rest of the IC thereby

guaranteeing that the RESET signal is valid for VOUT as low

as 1.0 V.

ENABLE Function

The part stays in a low IQ sleep mode when the ENABLE

pin is held low. The part has an internal pull down if the pin

is left floating.

The integrity of the ENABLE pin allows it to be tied to the

battery line through an external resistor. It will withstand

load dump potentials in this configuration.

Figure 16. ENABLE Function

VIN VOUT

GND

NCV8505

ENABLE

VBAT

Up to 45 V

10 k

DELAY Function

The reset delay circuit provides a programmable (by

external capacitor) delay on the RESET output lead.

The DELAY lead provides source current (typically 4.0 mA)

to the external DELAY capacitor during the following

proceedings:

1. During Power Up (once the regulation threshold

has been verified).

2. After a reset event has occurred and the device is

back in regulation. The DELAY capacitor is

discharged when the regulation (RESET threshold)

has been violated. This is a latched incident. The

capacitor will fully discharge and wait for the

device to regulate before going through the delay

time event again.

Voltage Adjust

Figure 17 shows the device setup for a user configurable

output voltage. The feedback to the VADJ pin is taken from

a voltage divider referenced to the output voltage. The loop

is balanced around the Unity Gain threshold (1.30 V

typical).

Figure 17. Adjustable Output Voltage

VOUT

VADJ

NCV8505 15 k

5.1 k

COUT

≈5.0 V

1.28 V

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APPLICATION NOTES

SETTING THE DELAY TIME

The delay time is controlled by the Reset Delay Low

Voltage, Delay Switching Threshold, and the Delay Charge

Current. The delay follows the equation:

tDELAY +ƪCDELAY(Vdt *Reset Delay Low Voltage)ƫ

Delay Charge Current

Example:

Using CDELAY = 33 nF.

Assume reset Delay Low Voltage = 0.

Use the typical value for Vdt = 1.8 V (2.5 V, 3.3 V, and

5.0 V options).

Use the typical value for Delay Charge Current = 4.2 mA.

tDELAY +ƪ33 nF(1.8 *0)ƫ

4.2 mA+14 ms

STABILITY CONSIDERATIONS

The output or compensation capacitor helps determine

three main characteristics of a linear regulator: start−up

delay, load transient response and loop stability.

The capacitor value and type should be based on cost,

availability, size and temperature constraints. A tantalum or

aluminum electrolytic capacitor is best, since a film or

ceramic capacitor with almost zero ESR can cause

instability. The aluminum electrolytic capacitor is the least

expensive solution, but, if the circuit operates at low

temperatures (−25°C to −40°C), both the value and ESR of

the capacitor will vary considerably. The capacitor

manufacturers data sheet usually provides this information.

The value for the output capacitor COUT shown in Figure 18

should work for most applications, however it is not

necessarily the optimized solution.

Figure 18. Test and Application Circuit Showing

Output Compensation

VIN VOUT

COUT**

33 mF

RRST

RESET

CIN*

0.1 mFNCV8505

*CIN required if regulator is located far from the power supply

filter.

**COUT required for stability. Capacitor must operate at minimum

temperature expected.

CALCULATING POWER DISSIPATION IN A

SINGLE OUTPUT LINEAR REGULATOR

The maximum power dissipation for a single output

regulator (Figure 19) is:

PD(max) +[VIN(max) *VOUT(min)]IOUT(max) (1)

)VIN(max)IQ

where:

VIN(max) is the maximum input voltage,

VOUT(min) is the minimum output voltage,

IOUT(max) is the maximum output current for the

application, and

IQ is the quiescent current the regulator consumes at

IOUT(max).

Once the value of PD(max) is known, the maximum

permissible value of RqJA can be calculated:

RqJA +150oC*TA

PD(2)

The value of RqJA can then be compared with those in the

package section of the data sheet. Those packages with

RqJA

’s less than the calculated value in equation 2 will keep

the die temperature below 150°C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external

heatsink will be required.

SMART

REGULATOR®

Control

Features

IOUT

IIN

Figure 19. Single Output Regulator with Key

Performance Parameters Labeled

VIN VOUT

}

HEAT SINKS

A heat sink effectively increases the surface area of the

package to improve the flow of heat away from the IC and

into the surrounding air.

Each material in the heat flow path between the IC and the

outside environment will have a thermal resistance. Like

series electrical resistances, these resistances are summed to

determine the value of RqJA:

RqJA +RqJC )RqCS )RqSA (3)

where:

RqJC = the junction−to−case thermal resistance,

RqCS = the case−to−heatsink thermal resistance, and

RqSA = the heatsink−to−ambient thermal resistance.

RqJC appears in the package section of the data sheet. Like

RqJA, it too is a function of package type. RqCS and RqSA are

functions of the package type, heatsink and the interface

between them. These values appear in heat sink data sheets

of heat sink manufacturers.

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ORDERING INFORMATION

Device Output Voltage Package Shipping†

NCV8505D2TADJG

Adjustable

D2PAK−7

(Pb−Free) 50 Units / Rail

NCV8505D2TADJR4G D2PAK−7

(Pb−Free) 750 Tape & Reel

NCV8505D2T25G

2.5 V

D2PAK−7

(Pb−Free) 50 Units / Rail

NCV8505D2T25R4G D2PAK−7

(Pb−Free) 750 Tape & Reel

NCV8505D2T33G

3.3 V

D2PAK−7

(Pb−Free) 50 Units / Rail

NCV8505D2T33R4G D2PAK−7

(Pb−Free) 750 Tape & Reel

NCV8505D2T50G

5.0 V

D2PAK−7

(Pb−Free) 50 Units / Rail

NCV8505D2T50R4G D2PAK−7

(Pb−Free) 750 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

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PACKAGE DIMENSIONS

PAK−7 (SHORT LEAD)

DPS SUFFIX

CASE 936AB−01

ISSUE B

0.539

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

E0.380 0.420 9.65 10.67

D0.325 0.368 8.25 9.53

A0.170 0.180 4.32 4.57

b0.026 0.036 0.66 0.91

c2 0.045 0.055 1.14 1.40

e0.050 BSC 1.27 BSC

H0.579 13.69 14.71

A1 0.000 0.010 0.00 0.25

c0.017 0.026 0.43 0.66

L1 c2

−−− 0.066 −−− 1.68

L0.058 0.078 1.47 1.98

L3 0.010 BSC 0.25 BSC

0 8 °°0 8 °°

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

RECOMMENDED

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. DIMENSIONS D AND E DO NOT INCLUDE MOLD

FLASH AND GATE PROTRUSIONS. MOLD FLASH

AND GATE PROTRUSIONS NOT TO EXCEED

0.005 MAXIMUM PER SIDE. THESE DIMENSIONS

TO BE MEASURED AT DATUM H.

4. THERMAL PAD CONTOUR OPTIONAL WITHIN

DIMENSIONS E, L1, D1, AND E1. DIMENSIONS

D1 AND E1 ESTABLISH A MINIMUM MOUNTING

SURFACE FOR THE THERMAL PAD.

D1 0.270 −−− 6.86 −−−

E1 0.245 −−− 6.22 −−−

DIMENSIONS: MILLIMETERS

0.424

0.584

0.310

0.136

0.040 0.050

PITCH

SOLDERING FOOTPRINT*

DETAIL C

SEATING

PLANE

GAUGE

PLANE

0.13 B

E/2

BSEATING

PLANE

DETAIL C

VIEW A−A

0.10 B

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

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PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

NCV8505/D

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