INTEGRATED CIRCUITS DATA SHEET 74LVC541A Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) Product specification Supersedes data of 1998 Jul 29 2003 May 14 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A FEATURES DESCRIPTION * 5 V tolerant inputs/outputs; for interfacing with 5 V logic The 74LVC541A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. * Wide supply voltage range from 2.7 to 3.6 V * CMOS low-power consumption Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 and 5 V environment. * Direct interface with TTL levels * Complies with JEDEC standard no. 8-1A * ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. The 74LVC541A is an octal non-inverting buffer/line driver with 5 V tolerant inputs/outputs. The 3-state outputs are controlled by the output enable inputs OE1and OE2. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL PARAMETER tPHL/tPLH propagation delay; An to Yn CI input capacitance CPD power dissipation capacitance per buffer CONDITIONS CL = 50 pF; VCC = 3.3 V notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL x VCC2 x fo) = sum of the outputs. 2. The condition is VI = GND to VCC. 2003 May 14 2 TYPICAL UNIT 3.3 ns 5.0 pF 20 pF Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A FUNCTION TABLE See note 1. INPUT OUTPUT OE1 OE2 An Yn L L L L L L H H X H X Z H X X Z Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74LVC541AD -40 to +85 C 20 SO20 plastic SOT163-1 74LVC541ADB -40 to +85 C 20 SSOP20 plastic SOT339-1 74LVC541APW -40 to +85 C 20 TSSOP20 plastic SOT360-1 74LVC541ABQ -40 to +85 C 20 DHVQFN20 plastic SOT764-1 PINNING PIN PIN SYMBOL DESCRIPTION SYMBOL DESCRIPTION 11 Y7 bus output 1 OE1 output enable input (active LOW) 12 Y6 bus output 13 Y5 bus output 2 A0 data input 14 Y4 bus output 3 A1 data input 15 Y3 bus output 4 A2 data input 16 Y2 bus output 5 A3 data input 17 Y1 bus output 6 A4 data input 18 Y0 bus output 7 A5 data input 19 OE2 8 A6 data input output enable input (active LOW) 20 VCC supply voltage 9 A7 data input 10 GND ground (0 V) 2003 May 14 3 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A handbook, halfpage handbook, halfpage VCC 1 20 A0 2 19 OE2 A1 3 18 Y0 18 Y0 A2 4 17 Y1 17 Y1 A3 5 16 Y2 OE1 1 20 VCC A0 2 19 OE2 A1 3 A2 4 GND(1) 16 Y2 A3 5 OE1 A4 6 15 Y3 14 Y4 A5 7 14 Y4 A6 8 13 Y5 A6 8 13 Y5 A7 9 12 Y6 A7 9 12 Y6 GND 10 11 Y7 541 A4 6 15 Y3 A5 7 MNA897 Top view 10 11 GND Y7 MDB202 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration SO20 and (T)SSOP20. handbook, halfpage 1 Fig.2 Pin configuration DHVQFN20. & EN 19 2 18 3 17 4 16 5 15 6 14 7 13 8 12 9 11 MNA898 Fig.3 Logic Symbol (IEEE/IEC). 2003 May 14 4 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A handbook, halfpage 2 3 4 5 6 7 8 9 A0 Y0 A1 Y1 A2 Y2 A3 Y3 A4 Y4 A5 Y5 A6 Y6 A7 Y7 handbook, halfpage 18 2 17 3 16 4 15 5 14 6 13 7 12 8 11 9 OE1 Y0 A1 Y1 A2 Y2 A3 Y3 A4 Y4 A5 Y5 A6 Y6 A7 Y7 18 17 16 15 14 13 12 11 OE1 1 19 A0 1 OE2 19 OE2 MNA900 MNA899 Fig.4 Logic symbol. 2003 May 14 Fig.5 Functional diagram. 5 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER supply voltage VI input voltage VO output voltage Tamb operating ambient temperature tr, tf input rise and fall times CONDITIONS MIN. MAX. UNIT for maximum speed performance 2.7 3.6 V for low-voltage applications 1.2 3.6 V 0 5.5 V output HIGH or LOW state 0 VCC V output 3-state 0 5.5 V in free air -40 +85 C VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage -0.5 +6.5 V IIK input diode current VI < 0 - -50 mA VI input voltage note 1 -0.5 +5.5 V IOK output diode current VO > VCC or VO < 0 - 50 mA VO output voltage output HIGH or LOW state; note 1 -0.5 VCC + 0.5 V output 3-state; note 1 -0.5 +6.5 V IO output diode source or sink current VO = 0 to VCC - 50 mA ICC, IGND VCC or GND current - 100 mA Tstg storage temperature -60 +150 C Ptot power dissipation - 500 mW Tamb = -40 to +125 C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K. For (T)SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN20 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K. 2003 May 14 6 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER TYP.(1) MIN. OTHER MAX. UNIT VCC (V) Tamb = -40 to +85 C HIGH-level input voltage 1.2 VCC - - V 2.7 to 3.6 2.0 - - V VIL LOW-level input voltage 1.2 - - GND V 2.7 to 3.6 - - 0.8 V VOH HIGH-level output voltage IO = -12 mA 2.7 VCC - 0.5 - - V IO = -100 A 3.0 VCC - 0.2 VCC - V IO = -18 mA 3.0 VCC - 0.6 - - V IO = -24 mA 3.0 VCC - 0.8 - - V IO = 12 mA 2.7 - - 0.40 V IO = 100 A 3.0 - - 0.20 V IO = 24 mA 3.0 - - 0.55 V VIH VOL LOW-level output voltage VI = VIH or VIL VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND; note 2 3.6 - 0.1 5 A IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND 3.6 - 0.1 5 A Ioff power-off leakage supply current VI or VO = 5.5 V 0.0 - - 10 A ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 - 0.1 10 A ICC additional quiescent VI = VCC - 0.6 V; supply current per input IO = 0 pin 2.7 to 3.6 - 5 500 A Notes 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 C. 2. The specified overdrive current at the data input forces the data input to the opposite logic input state. 2003 May 14 7 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A AC CHARACTERISTICS GND = 0 V; tr = tf 2.5 ns; CL = 50 pF. TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP.(1) MAX. UNIT VCC (V) Tamb = -40 to +85 C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay An to Yn 3-state output enable time OEn to Yn 3-state output disable time OEn to Yn - 14 - ns 2.7 1.5 3.9 6.6 ns 3.0 to 3.6 1.5 3.3 5.6 ns - 2.2 - ns 2.7 1.5 5.2 8.4 ns 3.0 to 3.6 1.5 4.4 7.4 ns - 11 - ns 2.7 1.5 4.3 7.0 ns 3.0 to 3.6 1.5 3.8 6.0 ns see Figs 6 and 8 1.2 see Figs 7 and 8 1.2 see Figs 7 and 8 1.2 Note 1. All typical values are measured at Tamb = 25 C; typical values given for VCC = 3.0 to 3.6 V are measured at VCC = 3.3 V. AC WAVEFORMS handbook, halfpage VI VM An input GND tPHL tPLH VOH VM Yn output VOL MNA901 VM = 1.5 V at VCC 2.7 V. VM = 0.5 VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 Input (An) to output (Yn) propagation delays. 2003 May 14 8 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A VI handbook, full pagewidth OEn input VM GND t PLZ t PZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL t PZH t PHZ VOH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs enabled outputs disabled MNA902 VM = 1.5 V at VCC 2.7 V. VM = 0.5 VCC at VCC < 2.7 V. VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.1 VCC at VCC < 2.7 V. VY = VOH - 0.3 V at VCC 2.7 V; VY = VOH - 0.1 VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 3-state enable and disable times. S1 handbook, full pagewidth VCC PULSE GENERATOR VI 500 VO 2 x VCC open GND D.U.T. CL 50 pF RT 500 MNA903 TEST S1 VCC VI tPLH/tPHL open tPLZ/tPZL 2 x VCC <2.7 V VCC tPHZ/tPZH GND 2.7 to 3.6 V 2.7 V Definitions for test circuits: CL = load capacitance including jig and probe capacitance. RT = termination resistance should be equal to Zo of the pulse generator. Fig.8 Load circuitry for switching times. 2003 May 14 9 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A PACKAGE OUTLINES SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.1 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 2003 May 14 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 10 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index Lp L 1 10 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 0o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 2003 May 14 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 11 o Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 2003 May 14 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 12 o Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 0.5 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- 2003 May 14 13 EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A To overcome these problems the double-wave soldering method was specifically developed. SOLDERING Introduction to soldering surface mount packages If wave soldering is used the following conditions must be observed for optimal results: This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. * below 220 C (SnPb process) or below 245 C (Pb-free process) A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. - for all the BGA packages - for packages with a thickness 2.5 mm Manual soldering - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. * below 235 C (SnPb process) or below 260 C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. 2003 May 14 14 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE(1) WAVE BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable(3) DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not PLCC(4), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP REFLOW(2) suitable suitable suitable not recommended(4)(5) suitable not recommended(6) suitable Notes 1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2003 May 14 15 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 May 14 16 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A NOTES 2003 May 14 17 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A NOTES 2003 May 14 18 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A NOTES 2003 May 14 19 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. SCA75 (c) Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613508/02/pp20 Date of release: 2003 May 14 Document order number: 9397 750 10553