a FEATURES Drives 13 V Output Drives Unlimited Capacitive Load High Current Output Drive: 70 mA Excellent Video Specifications (R L = 150 ) Gain Flatness 0.1 dB to 10 MHz 0.06% Differential Gain Error 0.02 Differential Phase Error Power Operates on 2.5 V to 7.5 V Supply 10.0 mA/Amplifier Max Power Supply Current High Speed 250 MHz Unity Gain Bandwidth (3 dB) 1200 V/s Slew Rate Fast Settling Time of 35 ns (0.1%) High Speed Disable Function Turn-Off Time 30 ns Easy to Use 200 mA Short Circuit Current Output Swing to 1 V of Rails APPLICATIONS LCD Displays Video Line Driver Broadcast and Professional Video Computer Video Plug-In Boards Consumer Video RGB Amplifier in Component Systems PRODUCT DESCRIPTION The AD8023 is a high current output drive, high voltage output drive, triple video amplifier. Each amplifier has 70 mA of output current and is optimized for driving large capacitive loads. The amplifiers are current feedback amplifiers and feature gain flatness of 0.1 dB to 10 MHz while offering differential gain and phase error of 0.06% and 0.02. VIN VO Figure 1. Pulse Response Driving a Large Load Capacitor, CL = 300 pF, G = +3, RF = 750 , RS = 16.9 , RL = 10 k High Current Output, Triple Video Amplifier AD8023 PIN CONFIGURATION 14-Lead SOIC DISABLE 1 1 14 OUT 2 DISABLE 2 2 13 -IN 2 DISABLE 3 3 +VS 4 12 +IN 2 AD8023 11 -VS +IN 1 5 10 +IN 3 -IN 1 6 9 -IN 3 OUT 1 7 8 OUT 3 The AD8023 uses maximum supply current of 10.0 mA per amplifier and runs on 2.5 V to 7.5 V power supply. The outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals. The AD8023 is unique among current feedback op amps by virtue of its large capacitive load drive with a small series resistor, while still achieving rapid settling time. For instance, it can settle to 0.1% in 35 ns while driving 300 pF capacitance. The bandwidth of 250 MHz along with a 1200 V/s slew rate make the AD8023 useful in high speed applications requiring a single +5 V or dual power supplies up to 7.5 V. Furthermore, the AD8023 contains a high speed disable function for each amplifier in order to power down the amplifier or high impedance the output. This can then be used in video multiplexing applications. The AD8023 is available in the industrial temperature range of -40C to +85C. VIN VO Figure 2. Output Swing Voltage, RL = 150 ; VS = 7.5 V, G = +10 REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000 AD8023-SPECIFICATIONS (@ T = +25C, V = 7.5, C A S LOAD = 10 pF, RLOAD = 150 , unless otherwise noted) Model Conditions DYNAMIC PERFORMANCE Bandwidth (3 dB) Bandwidth (0.1 dB) Slew Rate Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Input Voltage Noise Input Current Noise Differential Gain (RL = 150 ) Differential Phase (RL = 150 ) DC PERFORMANCE Input Offset Voltage Offset Drift Input Bias Current (-) Input Bias Current (+) Open-Loop Transresistance VS OUTPUT CHARACTERISTICS Output Voltage Swing RL = 1 k RL = 150 POWER SUPPLY Operating Range Units 125 7 1200 MHz MHz V/s 30 ns fC = 5 MHz, RL = 150 , VO = 2 p-p f = 10 kHz f = 10 kHz (-IIN) f = 3.58 MHz, G = +2, RFB = 750 f = 3.58 MHz, G = +2, RFB = 750 -72 2.0 14 0.06 0.02 dBc nV/Hz pA/Hz % Degrees TMIN to TMAX -5 TMIN to TMAX TMIN to TMAX -45 -25 67 50 TMIN to TMAX TMIN to TMAX 50 VOL-VEE VCC-VOH VOL-VEE VCC-VOH Output Current Short-Circuit Current Capacitive Load Drive MATCHING CHARACTERISTICS Dynamic Crosstalk DC Input Offset Voltage -Input Bias Current AD8023A Typ Max RFB = 750 No Peaking, G = +3 No Peaking, G = +3 5 V Step 0 V to 6 V (6 V Step) CLOAD = 300 pF RLOAD > 1 k, RFB = 750 TA = +25C to +70C, RS = 16.9 TMIN to TMAX INPUT CHARACTERISTICS Input Resistance +Input -Input Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio Input Offset Voltage -Input Current +Input Current Min 50 G = +2, f = 5 MHz 2 2 15 5 111 111 5 45 25 100 75 2 6.0 k pF V 56 0.2 5 dB A/V A/V 0.8 0.8 1.0 1.0 70 300 1000 1.0 1.0 1.3 1.3 70 -5 -10 Single Supply Dual Supply 0.3 3 +4.2 2.1 Quiescent Current/Amplifier TMIN to TMAX Power-Down -2- mV V/C A A k k V V V V mA mA pF dB 5 10 mV A +15 7.5 6.2 7.0 10.0 V V mA mA 1.3 4.0 mA REV. A AD8023 Model Conditions POWER SUPPLY (Continued) Power Supply Rejection Ratio Input Offset Voltage -Input Current +Input Current VS Min AD8023A Typ Max VS = 2.5 V to 7.5 V 54 DISABLE CHARACTERISTICS Off Isolation Off Output Capacitance Turn-On Time Turn-Off Time Switching Threshold f = 6 MHz G = +1 RL = 150 VTH - VEE Units 76 0.03 0.07 dB dB A/V A/V -70 12 50 30 1.6 dB pF ns ns V Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS * Maximum Power Dissipation Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 15.5 V Total Internal Power Dissipation Small Outline (R) . . . . 1.0 Watts (Observe Derating Curves) Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . 3 V (Clamped) Output Voltage Limit Maximum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VS Minimum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -VS Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range R Package . . . . . . . . . . . . . . . . . . . . . . . . -65C to +125C Operating Temperature Range AD8023A . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300C The maximum power that can be safely dissipated by the AD8023 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encapsulated parts is determined by the glass transition temperature of the plastic, about 150C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175C for an extended period can result in device failure. While the AD8023 is internally short circuit protected, this may not be enough to guarantee that the maximum junction temperature is not exceeded under all conditions. To ensure proper operation, it is important to observe the derating curves. It must also be noted that in (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive can result in a large input error current, which may result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power. *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING GUIDE AD8023AR AD8023ARREEL AD8023ARREEL7 AD8023ACHIPS Package Description MAXIMUM POWER DISSIPATION - Watts Model Temperature Range 2.5 Package Option -40C to +85C 14-Lead Plastic SOIC R-14 -40C to +85C 13" Tape and Reel R-14 -40C to +85C 7" Tape and Reel R-14 -40C to +85C Die TJ = +150C 2.0 1.5 14-LEAD SOIC 1.0 0.5 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE - C 80 90 Figure 3. Maximum Power Dissipation vs. Ambient Temperature CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8023 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. A -3- WARNING! ESD SENSITIVE DEVICE AD8023 METALIZATION PHOTO Contact factory for latest dimensions. Dimensions shown in inches and (mm). -IN1 6 +IN 5 +VS 4 DISABLE 3 3 DISABLE 2 2 DISABLE 1 1 7 OUT 1 0.0634 (1.61) 14 OUT 2 8 OUT 3 -IN 2 13 -IN3 9 +IN 3 10 -VS 11 +IN 2 12 0.0713 (1.81) 8 14 7 13 VS = 7.5V OUTPUT VOLTAGE SWING - V p-p COMMON-MODE VOLTAGE RANGE - Volts Typical Performance Characteristics 6 5 4 3 2 1 0 2 3 4 5 6 SUPPLY VOLTAGE - Volts 7 12 11 10 9 8 7 6 10 8 Figure 4. Input Common-Mode Voltage Range vs. Supply Voltage 100 1k LOAD RESISTANCE - 10k Figure 5. Output Voltage Swing vs. Load Resistance -4- REV. A AD8023 35 25 TA = +25C INPUT BIAS CURRENT - A TOTAL SUPPLY CURRENT - mA 30 20 15 10 25 20 -IB 15 10 +IB 5 0 5 1 2 3 4 6 5 7 SUPPLY VOLTAGE - Volts 8 0 -50 -40 -30 -20 -10 9 0 10 20 30 40 50 60 70 80 90 100 TEMPERATURE - C Figure 9. Input Bias Current vs. Temperature Figure 6. Total Supply Current vs. Supply Voltage 1 16 14 INPUT OFFSET VOLTAGE - mV OUTPUT VOLTAGE SWING - Vp-p TA = +25C 12 SWING NO LOAD 10 8 SWING RL = 150 6 VS = 2.5V 0 VS = 7.5V -1 4 2 2 3 4 5 6 SUPPLY VOLTAGE - Volts 7 -2 -40 -30 -20 -10 8 0 10 20 30 40 50 TEMPERATURE - C 60 70 80 90 Figure 10. Input Offset Voltage vs. Temperature Figure 7. Output Voltage Swing vs. Supply Voltage CLOSED-LOOP OUTPUT RESISTANCE - V 24 TOTAL SUPPLY CURRENT - mA VS = 7.5V 22 20 18 16 VS = 2.5V 14 12 10 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TEMPERATURE - C G = +2 31 VS = 2.5V 10 VS = 7.5V 3.1 1 0.31 0.1 1 10 FREQUENCY - MHz 100 300 Figure 11. Closed-Loop Output Resistance vs. Frequency Figure 8. Total Supply Current vs. Temperature REV. A 100 -5- AD8023 200 90 200 100 COMMON-MODE REJECTION - dB 100 +I NOISE 10 10 CURRENT NOISE - pAHz VOLTAGE NOISE - nVHz - I NOISE V NOISE R 80 R VCM 70 R VS = 7.5V 60 R 50 40 VS = 2.5V 30 20 10 1 0.1 1 0 1 0 100 10 FREQUENCY - kHz Figure 12. Input Current and Voltage Noise vs. Frequency 10 FREQUENCY - MHz 100 200 Figure 15. Common-Mode Rejection vs. Frequency 70 450 POWER SUPPLY REJECTION - dB SHORT CIRCUIT CURRENT - mA VS = 7.5V 400 SOURCE 350 SINK 300 250 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 TEMPERATURE - C 60 VS = 2.5V (+PSRR) 50 40 30 20 VS = 2.5V (-PSRR) VS = 7.5V (-PSRR) 10 0 1 10 FREQUENCY - MHz 100 Figure 16. Power Supply Rejection Ratio vs. Frequency Figure 13. Short Circuit Current vs. Temperature 10k 0 -10 G = +1 VS = 7.5V 1k HARMONIC DISTORTION - dBc OUTPUT RESISTANCE - VS = 7.5V (+PSRR) 100 10 -20 -30 -40 -50 -60 -70 -80 1 10 FREQUENCY - Hz 100 -90 1 200 G = +1 VS = 7.5V VO = 2V p-p 2ND 3RD 10 FREQUENCY - MHz 100 Figure 17. Harmonic Distortion vs. Frequency, RL = 150 Figure 14. Output Resistance vs. Frequency, Disabled State -6- REV. A AD8023 TRANSIMPEDANCE - 100k 10k VIN 1k 100 VO 10 1k 10k 100k 1M 10M FREQUENCY - Hz 100M 1G Figure 21. Small Signal Pulse Response, Gain = +1, (RF = 2 k, RL = 150 , VS = 7.5 V) Figure 18. Open-Loop Transimpedance vs. Frequency 1600 1600 G = -1 G = +2 1400 1400 G = -1 G = +2 1200 SLEW RATE - V/s 1200 SLEW RATE V/s G = +1 1000 G = +10 800 600 1000 800 G = +1 600 G = +10 400 400 200 200 0 2 0 0 1 2 3 4 5 6 3 4 5 6 SUPPLY VOLTAGE - V 7 8 OUTPUT VOLTAGE STEP - V p-p Figure 22. Maximum Slew Rate vs. Supply Voltage Figure 19. Slew Rate vs. Output Step Size VIN VIN VO VO Figure 20. Large Signal Pulse Response, Gain = +1, (RF = 2 k, RL = 150 , VS = 7.5 V) REV. A Figure 23. Large Signal Pulse Response, Gain = +10, (RF = 274 , RL = 150 , VS = 7.5 V) -7- AD8023 +1 VS = 7.5V GAIN 0 -1 VS = 2.5V -2 PHASE -3 VS = 7.5V 0 -4 VS = 2.5V -5 -90 G = +10 RL = 150 -6 -7 -180 -8 1 10 FREQUENCY - MHz 100 0 Figure 24. Closed-Loop Gain and Phase vs. Frequency, G = +10, RL = 150 VS = 7.5V -1 -2 VS = 2.5V -3 -4 PHASE VS = 7.5V 0 -5 VS = 2.5V -6 -7 -90 G = +1 RL = 150 -8 -9 1 500 GAIN -180 10 FREQUENCY - MHz 100 PHASE SHIFT - Degrees CLOSED-LOOP GAIN (NORMALIZED) - dB +1 PHASE SHIFT - Degrees CLOSED-LOOP GAIN (NORMALIZED) - dB +2 500 Figure 27. Closed-Loop Gain and Phase vs. Frequency, G = -1, RL = 150 0 GAIN -1 -2 VS = 2.5V -3 VIN VS = 7.5V 0 -4 PHASE -5 -90 -6 -7 -180 -8 -9 1 10 FREQUENCY - MHz 100 PHASE SHIFT - Degrees CLOSED-LOOP GAIN (NORMALIZED) - dB +1 VO 400 Figure 25. Closed-Loop Gain and Phase vs. Frequency, G = +1, RL = 150 Figure 28. Small Signal Pulse Response, Gain = +10, (RF = 274 , RL = 150 , VS = 7.5 V) VIN V IN VO VO Figure 26. Large Signal Pulse Response, Gain = -1, (RF = 750 , RL = 150 , VS = 7.5 V) Figure 29. Small Signal Pulse Response, Gain = -1, (RF = 750 , RL = 150 , VS = 7.5 V) -8- REV. A AD8023 where: -1 VS = 7.5V -2 -3 PHASE -4 VS = 2.5V 0 -5 -6 -90 G = -10 RL = 150 -7 VS = 2.5V -180 -8 -9 1 10 FREQUENCY - MHz 100 The -3 dB bandwidth is determined from this model as: 1 f3 2 C (R + Gn rin ) T F 500 This model will predict -3 dB bandwidth to within about 10% to 15% of the correct value when the load is 150 and VS = 7.5 V. For lower supply voltages there will be a slight decrease in bandwidth. The model is not accurate enough to predict either the phase behavior or the frequency response peaking of the AD8023. Figure 30. Closed-Loop Gain and Phase vs. Frequency, G = -10, RL = 150 General The AD8023 is a wide bandwidth, triple video amplifier that offers a high level of performance on less than 9.0 mA per amplifier of quiescent supply current. The AD8023 achieves bandwidth in excess of 200 MHz, with low differential gain and phase errors and high output current making it an efficient video amplifier. It should be noted that the bandwidth is affected by attenuation due to the finite input resistance. Also, the open-loop output resistance of about 6 reduces the bandwidth somewhat when driving load resistors less than about 150 . (Bandwidths will be about 10% greater for load resistances above a couple hundred ohms.) The AD8023's wide phase margin coupled with a high output short circuit current make it an excellent choice when driving any capacitive load up to 300 pF. It is designed to offer outstanding functionality and performance at closed-loop inverting or noninverting gains of one or greater. Table I. -3 dB Bandwidth vs. Closed-Loop Gain and Feedback Resistor, RL = 150 (SOIC) Choice of Feedback and Gain Resistors VS - Volts 7.5 Because it is a current feedback amplifier, the closed-loop bandwidth of the AD8023 may be customized using different values of the feedback resistor. Table I shows typical bandwidths at different supply voltages for some useful closed-loop gains when driving a load of 150 . 2.5 The choice of feedback resistor is not critical unless it is desired to maintain the widest, flattest frequency response. The resistors recommended in the table (chip resistors) are those that will result in the widest 0.1 dB bandwidth without peaking. In applications requiring the best control of bandwidth, 1% resistors are adequate. Resistor values and widest bandwidth figures are shown. Wider bandwidths than those in the table can be attained by reducing the magnitude of the feedback resistor (at the expense of increased peaking), while peaking can be reduced by increasing the magnitude of the feedback resistor. Gain +1 +2 +10 -1 -10 +1 +2 +10 -1 -10 RF - Ohms 2000 750 300 750 250 2000 1000 300 750 250 BW - MHz 460 240 50 150 60 250 90 30 95 50 Driving Capacitive Loads When used in combination with the appropriate feedback resistor, the AD8023 will drive any load capacitance without oscillation. The general rule for current feedback amplifiers is that the higher the load capacitance, the higher the feedback resistor required for stable operation. Due to the high open-loop transresistance and low inverting input current of the AD8023, the use of a large feedback resistor does not result in large closedloop gain errors. Additionally, its high output short circuit current makes possible rapid voltage slewing on large load capacitors. Increasing the feedback resistor is especially useful when driving large capacitive loads as it will increase the phase margin of the closed-loop circuit. (Refer to the Driving Capacitive Loads section for more information.) For the best combination of wide bandwidth and clean pulse response, a small output series resistor is also recommended. Table II contains values of feedback and series resistors which result in the best pulse responses. Figure 28 shows the AD8023 driving a 300 pF capacitor through a large voltage step with virtually no overshoot. (In this case, the large and small signal pulse responses are quite similar in appearance.) To estimate the -3 dB bandwidth for closed-loop gains of 2 or greater, for feedback resistors not listed in the following table, the following single pole model for the AD8023 may be used: REV. A G 1+ SCT (RF + Gn rin ) CT = transcapacitance 1 pF RF = feedback resistor G = ideal closed loop gain RF Gn = 1 + R = noise gain G rin = inverting input resistance 150 ACL = closed loop gain ACL GAIN 0 PHASE SHIFT - Degrees CLOSED-LOOP GAIN (NORMALIZED) - dB +1 -9- AD8023 RF +VS 1.0F 0.1F RG VIN 4 AD8023 11 VIN 15 1.0F RS VO CL 0.1F RT -VS VO Figure 31. Circuit for Driving a Capacitive Load Table II. Recommended Feedback and Series Resistors vs. Capacitive Load and Gain CL - pF RF - Ohms RS - Ohms G=2 G3 20 50 100 200 300 500 2k 2k 2k 3k 3k 3k 0 10 15 10 10 10 0 10 15 10 10 10 VIN VO Figure 32. Pulse Response Driving a Large Load Capacitor. CL = 300 pF, G = +3, RF = 750 , RS = 16.9 , RL = 10 k Overload Recovery Figure 33. 50% Overload Recovery, Gain = +10, (RF = 300 , RL = 1 k, VS = 7.5 V) As noted in the warning under Maximum Power Dissipation, a high level of input overdrive in a high noninverting gain circuit can result in a large current flow in the input stage. Though this current is internally limited to about 30 mA, its effect on the total power dissipation may be significant. Disable Mode Operation Pulling the voltage on any one of the Disable pins about 1.6 V up from the negative supply will put the corresponding amplifier into a disabled, powered down, state. In this condition, the amplifier's quiescent current drops to about 1.3 mA, its output becomes a high impedance, and there is a high level of isolation from input to output. In the case of a gain of two line driver for example, the impedance at the output node will be about the same as for a 1.5 k resistor (the feedback plus gain resistors) in parallel with a 12 pF capacitor. Leaving the Disable pin disconnected (floating) will leave the corresponding amplifier operational, in the enabled state. The input impedance of the disable pin is about 25 k in parallel with a few picofarads. When driven to 0 V, with the negative supply at -7.5 V, about 100 A flows into the disable pin. When the disable pins are driven by complementary output CMOS logic, on a single 5 V supply, the disable and enable times are about 50 ns. When operated on dual supplies, level shifting will be required from standard logic outputs to the Disable pins. Figure 33 shows one possible method, which results in a negligible increase in switching time. The three important overload conditions are: input commonmode voltage overdrive, output voltage overdrive, and input current overdrive. When configured for a low closed-loop gain, this amplifier will quickly recover from an input common-mode voltage overdrive; typically in under 25 ns. When configured for a higher gain, and overloaded at the output, the recovery time will also be short. For example, in a gain of +10, with 50% overdrive, the recovery time of the AD8023 is about 20 ns (see Figure 31). For higher overdrive, the response is somewhat slower. For 100% overdrive, (in a gain of +10), the recovery time is about 80 ns. +5 VI +7.5V 15k TO DISABLE PIN 4k 10k -7.5V V I HIGH => AMPLIFIER ENABLED V I LOW => AMPLIFIER DISABLED Figure 34. Level Shifting to Drive Disable Pins on Dual Supplies The AD8023's input stages include protection from the large differential input voltages that may be applied when disabled. Internal clamps limit this voltage to about 3 V. The high input to output isolation will be maintained for voltages below this limit. -10- REV. A AD8023 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 0.3444 (8.75) 0.3367 (8.55) 0.1574 (4.00) 0.1497 (3.80) 14 8 1 7 PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 0.0099 (0.25) 0.0075 (0.19) 0.0196 (0.50) x 45 0.0099 (0.25) 8 0 0.0500 (1.27) 0.0160 (0.41) PRINTED IN U.S.A. SEATING PLANE 0.2440 (6.20) 0.2284 (5.80) C3137-0-3/00 (rev. A) 14-Lead Plastic SOIC (R-14) REV. A -11-