1
File Number 4788
1-888-INTERSIL or 321-724-7143 |Copyright © Intersil Corporation 2000
SABERis a Copyright of Analogy, Inc.
RHR1K160D
1A, 600V Hyperfast Dual Diode
The RHR1K160D is a hyperfast dual diode with soft recovery
characteristics (trr < 25ns). It has about half the recovery
time of ultrafast diodes and is silicon nitride passivated ion-
implanted epitaxial planar construction.
This device is intended for use as freewheeling/clamping
diodes and rectifiers in a variety of switching power supplies
and other power switching applications. Its low stored charge
and hyperfast soft recovery minimize ringing and electrical
noise in many power switching circuits reducing power loss
in the switching transistors.
Formerly developmental type TA49185.
Packaging JEDEC MS-012AA
Features
• Hyperfast with Soft Recovery. . . . . . . . . . . . . . . . . .<25ns
• Operating Temperature. . . . . . . . . . . . . . . . . . . . . . .150oC
• Reverse Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . .600V
•Thermal Impedance SPICE® Model
•Thermal Impedance SABER© Model
• Avalanche Energy Rated
• Planar Construction
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Applications
• Switching Power Supplies
• Power Switching Circuits
• General Purpose
Symbol
Ordering Information
PART NUMBER PACKAGE BRAND
RHR1K160D MS-012AA RHR1K160D
NOTE: When ordering, use the entire part number. For ordering in
tape and reel, add the suffix 96 to the part number, i.e.,
RHR1K160D96.
BRANDING DASH
1234
5
ANODE 1 (2)
CATHODE 1 (8)
NC (1)
CATHODE 1 (7)
CATHODE 2 (6)
CATHODE 2 (5)
ANODE 2 (3)
NC (4)
Absolute Maximum Ratings (Per Leg) TA = 25oC, Unless Otherwise Specified RHR1K160D UNITS
Peak Repetitive Reverse Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRRM 600 V
Working Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VRWM 600 V
DC Blocking Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VR600 V
Average Rectified Forward Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IF(AV)
TA = 65oC1A
Repetitive Peak Surge Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IFRM
Square Wave, 20kHz 2A
Nonrepetitive Peak Surge Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IFSM
Halfwave, 1 phase, 60Hz 10 A
Maximum Power Dissipation (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD2.5 W
Avalanche Energy (See Figures 11 and 12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAVL 5mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSTG,TJ-55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 300
260
oC
oC
Data Sheet January 2000
[ /Title
(RHR1
K160D
)
/Sub-
ject
(1A,
600V
Hyper-
fast
Dual
Diode)
/Autho
r ()
/Key-
words
(Inter-
sil
Corpo-
ration,
semi-
con-
ductor,
Ava-
lanche
Energy
Rated,
Switch
ing
Power
Sup-
plies,
Power
Switch
ing
Cir-
cuits,
Rectifi-
ers,
2
Electrical Specifications (Per Leg) TA = 25oC, Unless Otherwise Specified
SYMBOL TEST CONDITION MIN TYP MAX UNITS
VFIF = 1A - - 2.1 V
IF = 1A, TA = 150oC - - 1.7 V
IRVR = 600V - - 100 µA
VR = 600V, TA = 150oC - - 500 µA
trr IF = 1A, dIF/dt = 200A/µs--25ns
taIF = 1A, dIF/dt = 200A/µs - 10.5 - ns
tbIF = 1A, dIF/dt = 200A/µs-5-ns
QRR IF = 1A, dIF/dt = 200A/µs - 20 - nC
CJVR = 10V, IF = 0A - 10 - pf
RθJA Pad Area = 0.483 in2(Note 1) - - 50 oC/W
Pad Area = 0.027 in2(Note 2) (Figure 13) - - 201 oC/W
Pad Area = 0.006 in2(Note 2) (Figure 13) - - 239 oC/W
DEFINITIONS
VF = Instantaneous forward voltage (pw = 300µs, D = 2%).
IR = Instantaneous reverse current.
trr = Reverse recovery time (See Figure 10), summation of ta+t
b.
ta = Time to reach peak reverse current (See Figure 10).
tb = Time from peak IRM to projected zero crossing of IRM based on a straight line from peak IRM through 25% of IRM (See Figure 10).
Qrr = Reverse recovery charge.
CJ = Junction Capacitance.
RθJA = Thermal resistance junction to ambient.
pw = Pulse width.
D = Duty cycle.
NOTES:
1. Measured using FR-4 copper board at 0.8 seconds.
2. 2. Measured using FR-4 copper board at 1000 seconds.
Typical Performance Curve
FIGURE 1. FORWARD CURRENT vs FORWARD VOLTAGE FIGURE 2. REVERSE CURRENT vs REVERSE VOLTAGE
VF, FORWARD VOLTAGE (V)
10
0.1
1
0 0.5 1 1.5 2 2.5 4
150oC
100oC
25oC
IF, FORWARD CURRENT (A)
3.53
VR, REVERSE VOLTAGE (V)
0 600100 500200
10
0.01
0.1
1
IR, REVERSE CURRENT ( A)
25oC
100oC
150oC
0.001 300 400
RHR1K160D
3
FIGURE 3. trr,t
aAND tbCURVES vs FORWARD CURRENT FIGURE 4. trr,t
aAND tbCURVES vs FORWARD CURRENT
FIGURE 5. trr,t
aAND tbCURVES vs FORWARD CURRENT FIGURE 6. CURRENT DERATING CURVE
FIGURE 7. JUNCTION CAPACITANCE vs REVERSE VOLTAGE
Typical Performance Curve (Continued)
IF, FORWARD CURRENT (A)
1
0
16
12
0.5
trr
tb
8
4
ta
t, RECOVERY TIMES (ns)
0.1
20 TA = 25oC, dIF/dt = 200A/µs
IF, FORWARD CURRENT (A)
1
0
15
25
20
0.5
trr
tb
10
5
ta
t, RECOVERY TIMES (ns)
0.1
30
35 TA = 100oC, dIF/dt = 200A/µs
IF, FORWARD CURRENT (A)
1
0
40
20
0.5
trr
10 ta
t, RECOVERY TIMES (ns)
0.1
50
tb
30
TA = 150oC, dIF/dt = 200A/µs1.0
0.2
050 75 12525 150100
0.4
0.6
0.8
DC
TA, AMBIENT TEMPERATURE (oC)
IF(AV), AVERAGE FORWARD CURRENT (A)
SQ. WAVE
RθJA = 50oC/W
20
0
40
30
10
50
VR, REVERSE VOLTAGE (V)
CJ, JUNCTION CAPACITANCE (pF)
0 20 40 60 10080
RHR1K160D
4
FIGURE 8. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
Test Circuits and Waveforms
FIGURE 9. trr TEST CIRCUIT FIGURE 10. trr WAVEFORMS AND DEFINITIONS
FIGURE 11. AVALANCHE ENERGY TEST CIRCUIT FIGURE 12. AVALANCHE CURRENT AND VOLTAGE
WAVEFORMS
Typical Performance Curve (Continued)
t, RECTANGULAR PULSE DURATION (s)
10-5 10-1 100
10
1
10-2
ZθJA, NORMALIZED
THERMAL IMPEDANCE
0.01 10-4 10-3
SINGLE PULSE
101
0.1
102103
RθJA = 50oC/W
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.01
0.02
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
PDM
t1t2
RG
VDD
IGBT
CURRENT
SENSE
DUT
VGE t1
t2
VGE AMPLITUDE AND
t1AND t2CONTROL IF
RG CONTROL dIF/dt
+
-
L
dt
dIF
IFtrr
tatb
0
IRM
0.25 IRM
DUT
CURRENT
SENSE +
LR
VDD
L = 20mH
R < 0.1Ω
EAVL = 1/2LI2 [VR(AVL)/(VR(AVL) - VDD)]
Q1= IGBT (BVCES > DUT VR(AVL))
-
VDD
Q1
IV
t0t1t2
IL
VAVL
t
IL
RHR1K160D
5
Thermal Resistance vs Mounting Pad Area
The maximum rated junction temperature, TJM, and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, PDM,inan
application.Thereforetheapplication’s ambient temperature,
TA (oC), and thermal resistance RθJA (oC/W) must be
reviewed to ensure that TJM is never exceeded. Equation 1
mathematically represents the relationship and serves as
the basis for establishing the rating of the part.
In using surface mount devices such as the SOP-8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power
dissipation ratings. Precise determination of PDM is complex
and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Intersil provides thermal information to assist the designer’s
preliminar y application evaluation. Figure 13 defines the
RθJA for the device as a function of the top copper
(component side) area. This is for a horizontally positioned
FR-4 board with 2 oz. copper after 1000 seconds of steady
state power with no air flow. This graph provides the
necessar y information for calculation of the steady state
junction temperature or power dissipation. Pulse
applications can be evaluated using the Intersil device
SPICE thermal model or manually utilizing the normalized
maximum transient thermal impedance cur ve.
Displayed on the curve are RθJA values listed in the
Electrical Specifications table. These points were chosen to
depict the compromise between the copper board area, the
thermal resistance and ultimately the power dissipation,
PDM. Thermal resistances corresponding to other
component side copper areas can be obtained from Figure
13 or by calculation using Equation 2. The area, in square
inches is the top copper board area, the thermal resistance
and ultimately the power dissipation, PDM.
While Equation 2 describes the thermal resistance of a
single die, the dual die SOP-8 package introduces an
additional thermal component, thermal coupling resistance,
Rθβ. Equation 3 describes Rθβ as a function of the top
copper mounting pad area.
The thermal coupling resistance vs. copper area is also
graphically depicted in Figure 13. It is important to note the
thermal resistance (RθJA) and thermal coupling resistance
(Rθβ) are equivalent for both die. For example at 0.1 square
inches of copper:
RθJA1 = RθJA2 = 168oC/W
Rθβ1 = Rθβ2 = 96oC/W
TJ1 and TJ2 define the junction temperature of the
respective die. Similarly, P1 and P2 define the power
dissipated in each die. The steady state junction
temperature can be calculated using Equation 4 for die 1
and Equation 5 for die 2.
Example: Use Equation 4 to calculate TJ1 and Equation 5 to
calculate TJ2 with the following conditions. Die 2 is
dissipating 0.5W; die 1 is dissipating 0W; the ambient
temperature is 60oC; the package is mounted to a top
copper area of 0.1 square inches per die.
(EQ. 1)
PDM TJM TA
–()
ZθJA
-----------------------------=
RθJA, THERMAL IMPEDANCE
50
100
150
200
AREA, TOP COPPER AREA (in2)
0.01 0.1
201oC/W - 0.027in2
239oC/W - 0.006in2
FIGURE 13. THERMAL RESISTANCE vs MOUNTING PAD AREA
0.001
350
250
JUNCTION TO AMBIENT (oC/W)
300
RθJA = 110.2 - 25.24 x ln(AREA)
Rθβ = 43.81 - 22.66 x ln (AREA)
(EQ. 2)
RθJA 110.18 25.24 Area()ln×–=
(EQ. 3)
Rθβ 43.81 22.66 Area()ln×–=
RHR1K160D
6
.
TJ1 = (0W)(168oC/W) + (0.5W)(96oC/W) + 60oC
TJ1 = 108oC
TJ2 = (0.5W)(168oC/W) + (0W)(96oC/W) + 60oC
TJ2 = 144oC
The transient thermal impedance (ZθJA) is also effected by
varied top copper board area. Figure 14 shows the effect of
copper pad area on single pulse transient thermal
impedance. Each trace represents a copper pad area in
square inches corresponding to the descending list in the
graph. SPICE and SABER thermal models are provided for
each of the listed pad areas.
Copper pad area has no perceivable effect on transient
thermal impedance for pulse widths less than 100ms. For
pulse widths less than 100ms the transient thermal
impedance is determined by the die and package. Therefore,
CTHERM1 through CTHERM6 and RTHERM1 through
RTHERM5 remain constant for each of the thermal models.
A listing of the model component values is a vailable in Table 1.
(EQ. 4)
TJ1 P1RθJA P2Rθβ TA
++=
(EQ. 5)
TJ2 P2RθJA P1Rθβ TA
++=
0
50
150
200
10-1 101102103
FIGURE 14. TRANSIENT THERMAL IMPEDANCE vs MOUNTING PAD AREA
t, RECTANGULAR PULSE DURATION (s)
ZθJA, THERMAL
IMPEDANCE (oC/W)
COPPER BOARD AREA - DESCENDING ORDER
0.020 in2
0.140 in2
0.257 in2
0.380 in2
0.483 in2
100
100
RHR1K160D
7
SPICE Thermal Model
REV October 1998
RHR1K160D
Copper Area = 0.483 in2
CTHERM1 th 8 6e-6
CTHERM2 8 7 4e-5
CTHERM3 7 6 1.5e-4
CTHERM4 6 5 7.5e-4
CTHERM5 5 4 7e-3
CTHERM6 4 3 2e-2
CTHERM7 3 2 8e-2
CTHERM8 2 tl 2.5
RTHERM1 th 8 5e-2
RTHERM2 8 7 2.5e-1
RTHERM3 7 6 1.5
RTHERM4 6 5 2.5
RTHERM5 5 4 7.5
RTHERM6 4 3 22
RTHERM7 3 2 38
RTHERM8 2 tl 38
SABER Thermal Model
Copper Area = 0.483 in2
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 8 = 6e-6
ctherm.ctherm2 8 7 = 4e-5
ctherm.ctherm3 7 6 = 1.5e-4
ctherm.ctherm4 6 5 = 7.5e-4
ctherm.ctherm5 5 4 = 7e-3
ctherm.ctherm6 4 3 = 2e-2
ctherm.ctherm7 3 2 = 8e-2
ctherm.ctherm8 2 tl = 2.5
rtherm.rtherm1 th 8 = 5e-2
rtherm.rtherm2 8 7 = 2.5e-1
rtherm.rtherm3 7 6 = 1.5
rtherm.rtherm4 6 5 = 2.5
rtherm.rtherm5 5 4 = 7.5
rtherm.rtherm6 4 3 = 22
rtherm.rtherm7 3 2 = 38
rtherm.rtherm8 2 tl = 38
}
RTHERM6
RTHERM8
RTHERM7
RTHERM5
RTHERM4
RTHERM3
CTHERM4
CTHERM6
CTHERM5
CTHERM3
CTHERM2
CTHERM1
tl
2
3
4
5
6
7
JUNCTION
AMBIENT
8
th
RTHERM2
RTHERM1
CTHERM7
CTHERM8
TABLE 1. THERMAL MODELS
COMPONENT 0.02 in20.14 in20.257 in20.38 in20.483 in2
CTHERM7 7.5e-2 8e-2 8e-2 8e-2 8e-2
CTHERM8 1 1.5 2 2 2.5
RTHERM6 25 22 22 22 22
RTHERM7 65 45 40 38 38
RTHERM8 70 55 48 43 38
RHR1K160D
8
RHR1K160D
MS-012AA
8 LEAD JEDEC MS-012AA SMALL OUTLINE PLASTIC PACKAGE
MS-012AA
12mm TAPE AND REEL
AA1
E
E1
e
b
D
L
h x 45o
2
0o-8o
c
0.004 IN
0.10 mm
56
0.155
4.0
0.275
7.0
0.050
1.27
0.024
0.6
0.060
1.52
MINIMUM RECOMMENDED FOOTPRINT FOR
SURFACE-MOUNTED APPLICATIONS
1
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
A10.004 0.0098 0.10 0.25 -
b 0.013 0.020 0.33 0.51 -
c 0.0075 0.0098 0.19 0.25 -
D 0.189 0.1968 4.80 5.00 2
E 0.2284 0.244 5.80 6.20 -
E10.1497 0.1574 3.80 4.00 3
e 0.050 BSC 1.27 BSC -
H 0.0099 0.0196 0.25 0.50 -
L 0.016 0.050 0.40 1.27 4
NOTES:
1. All dimensions are within allowable dimensions of Rev. C of
JEDEC MS-012AA outline dated 5-90.
2. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.006 inches (0.15mm) per side.
3. Dimension “E1” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 0.010 inches
(0.25mm) per side.
4. “L” is the length of terminal for soldering.
5. Thechamferonthe bodyisoptional.Ifitisnotpresent,avisualindex
feature m ust be located within the crosshatched area.
6. Controlling dimension: Millimeter.
7. Revision 8 dated 5-99.
USER DIRECTION OF FEED
L
C
2.0mm
4.0mm
1.75mm
1.5mm
DIA. HOLE
8.0mm
12mm
COVER TAPE
330mm 50mm
13mm
18.4mm
12.4mm
GENERAL INFORMATION
1. 2500 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION “A” SPECIFICATIONS.
ACCESS HOLE
40mm MIN.
9
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
RHR1K160D