LM48822TL/NOPB - Texas Instruments

LM48822, LM48822TLEVAL

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SNAS456C –MAY 2008–REVISED MAY 2013

LM48822 Boomer ™ Ground-Referenced, Ultra High PSRR, Ultra Low Noise,

35mW/Channel Stereo Headphone Amplifier with Common Mode Sense, and I

C Volume

Control

Check for Samples: LM48822,LM48822TLEVAL

1FEATURES DESCRIPTION

The LM48822 is a single supply, ground-referenced

23• Ground Referenced Outputs – Eliminates stereo headphone amplifier designed for portable

Output Coupling Capacitors devices, such as cell phones, where board space is

• Common-Mode Sense at a premium. The LM48822 features TI’s ground-

• Ultra-High PSRR referenced architecture, which eliminates the large

DC blocking capacitor required by traditional

• I2C Volume and Mode Control headphone amplifiers, saving board space and

• High Output Impedance in Shutdown minimizing system cost.

• Differential Inputs The LM48822 features common-mode sensing that

• Advanced Click-and-Pop Suppression corrects for any differences between the amplifier

• Low Supply Current ground and the potential at the headphone return

terminal, minimizing noise created by any ground

• Minimum External Components mismatches.

• Micro-Power Shutdown The LM48822 delivers 35mW/channel into a 16Ω

• Available in Space-Saving 16-Bump DSBGA load with <1% THD+N with a 3.6V supply. High

Package power supply rejection ratio (PSRR), of 110dB at

217Hz, allows the device to operate in noisy

APPLICATIONS environments without additional power supply

conditioning. Flexible power supply requirements

• Mobile Phones allow operation from 2.4V to 5.5V. The LM48822 has

• PDAs a differential inputs for improved noise rejection. High

• Notebook PCs output impedance in Shutdown mode, combined with

a charge pump-only mode allows the LM48822's

• Portable Electronic Devices outputs to be driven by an external source without

• MP3 Players degrading the source signal. Additionally, the

LM48822 features a 64-step I2C volume control and

KEY SPECIFICATIONS mute function. The low power Shutdown mode

• Output Power/Channel at VDD = 3.6V reduces supply current consumption to 0.06µA.

– RL= 16Ω, THD+N ≤1%: 35mW (typ) Superior click and pop suppression eliminates audible

transients on power-up/down and during shutdown.

• Output Power/Channel at VDD = 3.6V The LM48822 is available in an ultra-small 16-bump

– RL= 32Ω, THD+N ≤1%: 40mW (typ) DSBGA package (2mmx2mm).

• Quiescent Power Supply Current at 3.6V:

3.5mA (typ)

• PSRR at 217Hz: 110dB (typ)

• Shutdown Current: 0.06μA (typ)

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2is a trademark of ~ Texas Instruments.

3All other trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

VOLUME

CONTROL AND

MIXER

I2C

INTERFACE

BIASING

VOLUME

CONTROL AND

MIXER

CHARGE PUMP

INL+

INL-

SDA

SCL

INR+

INR-

C1P C1N CPVSS CPGND

VDD

OUTL

OUTR

COM

GND

+2.4V to +5.5V

CIN

BIAS

CBIAS

LM48822, LM48822TLEVAL

SNAS456C –MAY 2008–REVISED MAY 2013

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Typical Application

Figure 1. Typical Audio Amplifier Application Circuit

Product Folder Links: LM48822 LM48822TLEVAL

AB C D

CPVSS GND SCLC1P

OUTL BIAS OUTRC1N

INL+ INR+ SDACPGND

INL- INR- COM

VDD

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SNAS456C –MAY 2008–REVISED MAY 2013

Connection Diagram

Top View

Figure 2. DSBGA Package

2mm x 2mm x 0.8mm

See Package Number YZR001611A

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings(1)(2)(3)

Supply Voltage(1) 6V

Storage Temperature −65°C to +150°C

Input Voltage -0.3V to VDD + 0.3V

Power Dissipation(4) Internally Limited

ESD Rating(5) 2000V

ESD Rating(6) 150V

Junction Temperature 150°C

Thermal Resistance

θJA YZR001611A 63°C/W

Soldering Information See AN-1112 “DSBGA Wafer Level Chip Scale package”

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum

RatingsRatings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The

Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond

such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified

(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as

otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and

are not ensured.

(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(4) Maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is

lower.

(5) Human body model, applicable std. JESD22-A114C.

(6) Machine model, applicable std. JESD22-A115-A.

Product Folder Links: LM48822 LM48822TLEVAL

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SNAS456C –MAY 2008–REVISED MAY 2013

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Operating Ratings

Temperature Range

TMIN ≤TA≤TMAX −40°C ≤TA≤+85°C

Supply Voltage (VDD) 2.4V ≤VDD ≤5.5V

Electrical Characteristics VDD = 3.6V(1)(2)

The following specifications apply for AV= 0dB, RL= 16Ω, f = 1kHz, unless otherwise specified. Limits apply to TA= 25°C.

LM48822 Units

Parameter Test Conditions (Limits)

Typ(3) Limit(4)

VIN = 0V, both channels active

IDD Quiescent Power Supply Current RL= 16Ω3.5 4.5 mA (max)

RL=∞3.5 4.5 mA (max)

ISD Shutdown Current Shutdown Enabled 0.06 1.2 µA (max)

VOS Differential Output Offset Voltage VIN = 0V, RL= 16Ω1 5 mV (max)

TWU Wake Up Time 200 μs

+0.5 dB (max)

Minimum Gain Setting –59.5 –0.5 dB (min)

AVVoltage Gain +0.5 dB (max)

Maximum Gain Setting 3.8 –0.5 dB (min)

AV= 4dB 25 30 kΩ(max)

RIN Input Resistance AV= –60dB 60 70 kΩ(max)

RL= 16Ω, f = 1kHz, THD+N = 1%

Single channel 70 mW

Two channels in phase 35 27 mW (min)

POOutput Power RL= 32Ω, f = 1kHz, THD+N = 1%

Single channel 65 mW

Two channels in phase 40 mW

PO= 50mW, f = 1kHz, RL= 16Ω0.04 %

single channel

THD+N Total Harmonic Distortion + Noise PO= 40mW, f = 1kHz, RL= 32Ω0.02 %

single channel

VRIPPLE = 200mVP-P, Inputs AC GND

PSRR Power Supply Rejection Ratio CIN = 1μF, input referred, SD_BIAS = 0

fRIPPLE = 217Hz 110 100 dB (min)

fRIPPLE = 1kHz 100 dB

CMRR Common Mode Rejection Ratio VRIPPLE = 1VP-P 95 dB

RL≥16Ω, POUT = 1.6mW, f = 1kHz 80 70 dB (min)

XTALK Crosstalk RL≥10kΩ, VOUT = 1VRMS, f = 1kHz 95 85 dB (min)

SNR Signal-to-Noise Ratio RL= 16Ω, f = 1kHz 100 dB

AV= 4dB, Input referred

∈OS Output Noise 7 μV

A-Weighted Filter

ROUT Output Impedance Charge pump-only mode enabled 40 25 kΩ(min)

Voltage applied to amplifier outputs in

VOUT Maximum Voltage Swing 2 VRMS (min)

charge pump-only mode

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum

RatingsRatings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The

Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond

such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified

(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as

otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and

are not ensured.

(3) Typical values represent most likely parametric norms at TA= +25ºC, and at the Recommended Operation Conditions at the time of

product characterization and are not specified.

(4) Datasheet min/max specification limits are ensured by test or statistical analysis.

Product Folder Links: LM48822 LM48822TLEVAL

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SNAS456C –MAY 2008–REVISED MAY 2013

I2C Interface Characteristics VDD = 3.6V(1)(2)

The following specifications apply for AV= 0dB, RL= 16Ω, f = 1kHz, unless otherwise specified. Limits apply to TA= 25°C.

LM48822 Units

Parameter Test Conditions (Limits)

Typ(3) Limit(4)

t1SCL Period 2.5 μs (min)

t2SDA Setup Time 100 ns (min)

t3SDA Stable Time 0 ns (min)

t4Start Condition Time 100 ns (min)

t5Stop Condition Time 100 ns (min)

VIH Input High Voltage 1.3 V (min)

VIL Input Low Voltage 0.4 V (max)

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum

RatingsRatings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The

Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond

such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified

(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as

otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and

are not ensured.

(3) Typical values represent most likely parametric norms at TA= +25ºC, and at the Recommended Operation Conditions at the time of

product characterization and are not specified.

(4) Datasheet min/max specification limits are ensured by test or statistical analysis.

Bump Descriptions

Pin Name Function

A1 C1N Charge Pump Flying Capacitor Negative Terminal

A2 C1P Charge Pump Flying Capacitor Positive Terminal

A3 CPGND Charge Pump Ground

A4 VDD Power Supply

B1 OUTL Left Channel Output

B2 CPVSS Charge Pump Output

B3 INL+ Left Channel Non-Inverting Input

B4 INL- Left Channel Inverting Input

C1 BIAS Bias Voltage Bypass

C2 GND Ground

C3 INR+ Right Channel Non-Inverting Input

C4 INR- Right Channel Inverting Input

D1 OUTR Right Channel Output

D2 SCL I2C Serial Clock Input

D3 SDA I2C Serial Data Input

D4 COM Common-Mode Sense Input

Product Folder Links: LM48822 LM48822TLEVAL

0.001

0.01

0.1

100

10 100 1000 10000 100000

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

100

10 100 1000 10000 100000

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

100

10 100 1000 10000 100000

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

100

10 100 1000 10000 100000

FREQUENCY (Hz)

THD+N (%)

100

0.001

0.01

0.1

10 100 1000 10000 100000

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

100

10 100 1000 10000 100000

FREQUENCY (Hz)

THD+N (%)

LM48822, LM48822TLEVAL

SNAS456C –MAY 2008–REVISED MAY 2013

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Typical Performance Characteristics

THD+N vs Frequency THD+N vs Frequency

VDD = 2.5V, POUT = 10mW, RL= 32ΩVDD = 2.5V, POUT = 12mW, RL= 16Ω

Figure 3. Figure 4.

THD+N vs Frequency THD+N vs Frequency

VDD = 3.6V, POUT = 20mW, RL= 16ΩVDD = 3.6V, POUT = 30mW, RL= 32Ω

Figure 5. Figure 6.

THD+N vs Frequency THD+N vs Frequency

VDD = 5.0V, POUT = 20mW, RL= 16ΩVDD = 5.0V, POUT = 30mW, RL= 32Ω

Figure 7. Figure 8.

Product Folder Links: LM48822 LM48822TLEVAL

2.5 3 3.5 4 4.5 5 5.5

SUPPLY VOLTAGE (V)

OUTPUT POWER (mW)

THD+N = 1%

THD+N = 10%

100

150

200

250

300

0 25 50 75 100

OUTPUT POWER (mW)

POWER DISSIPATION (mW)

VDD = 5V

VDD = 3.6V

VDD = 2.5V

POUT = POUTL + POUTR

0.01

0.1

100

0.001 0.01 0.1

OUTPUT POWER (W)

THD+N (%)

TWO CHANNELS

IN PHASE

HPVDD = 2.55V

HPVDD = 2.0V

100

150

200

250

300

350

400

450

0 25 50 75 100

OUTPUT POWER (mW)

POWER DISSIPATION (mW)

VDD = 5V

VDD = 3.6V

VDD = 2.5V

POUT = POUTL + POUTR

0.01

0.1

100

0.1 1 10 100

OUTPUT POWER (mW)

THD+N (%)

VDD = 5V

VDD = 3.6V

VDD = 2.5V

0.01

0.1

100

0.1 1 10 100

OUTPUT POWER (mW)

THD+N (%)

VDD = 5V

VDD = 3.6V

VDD = 2.5V

LM48822, LM48822TLEVAL

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SNAS456C –MAY 2008–REVISED MAY 2013

Typical Performance Characteristics (continued)

THD+N vs Output Power THD+N vs Output Power

AV= 0dB, RL= 16Ω, f = 1kHz AV= 0dB, RL= 32Ω, f = 1kHz

Both Outputs in Phase Both Outputs in Phase

Figure 9. Figure 10.

THD+N vs Output Power

AV= 9dB, RL= 16Ω, f = 1kHz Power Dissipation vs Output Power

Both Outputs in Phase RL= 16Ω, f = 1kHz

Figure 11. Figure 12.

Power Dissipation vs Output Power Output Power vs Supply Voltage

RL= 32Ω, f = 1kHz RL= 16Ω, f = 1kHz

Figure 13. Figure 14.

Product Folder Links: LM48822 LM48822TLEVAL

2.5 3 3.5 4 4.5 5 5.5

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

10 100 1000 10000 100000

FREQUENCY (Hz)

NOISE REJECTION (dB)

-120

-100

-80

-60

-40

-20

10 100 1000 10000 100000

FREQUENCY (Hz)

PSRR (dB)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

10 100 1000 10000 100000

FREQUENCY (Hz)

CROSSTALK (dB)

2.5 3 3.5 4 4.5 5 5.5

SUPPLY VOLTAGE (V)

OUTPUT POWER (mW)

THD+N = 1%

THD+N = 10%

-80

-70

-60

-50

-40

-30

-20

-10

10 100 1000 10000 100000

FREQUENCY (Hz)

CMRR(dB)

LM48822, LM48822TLEVAL

SNAS456C –MAY 2008–REVISED MAY 2013

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Typical Performance Characteristics (continued)

Output Power vs Supply Voltage CMRR vs Frequency

RL= 32Ω, f = 1kHz VDD = 3.6V, VCM = 1VP-P, RL= 32Ω

Figure 15. Figure 16.

PSRR vs Frequency Crosstalk vs Frequency

VDD = 3.6V, VRIPPLE = 20mVP-P, RL= 32ΩVDD = 3.6V, VRIPPLE = 1VP-P, RL= 32Ω

Figure 17. Figure 18.

Ground Noise vs Frequency Supply Current vs Supply Voltage

VDD = 3.6V, VRIPPLE = 20mVP-P, RL= 32ΩNo Load

Figure 19. Figure 20.

Product Folder Links: LM48822 LM48822TLEVAL

SDA

SCL SP

START condition STOP condition

LM48822, LM48822TLEVAL

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SNAS456C –MAY 2008–REVISED MAY 2013

APPLICATION INFORMATION

I2C COMPATIBLE INTERFACE

The LM48822 is controlled through an I2C compatible serial interface that consists of a serial data line (SDA) and

a serial clock (SCL). The clock line is uni-directional. The data line is bi-directional (open collector). The LM48822

and the master can communicate at clock rates up to 400kHz. Figure 21 shows the I2C interface timing diagram.

Data on the SDA line must be stable during the HIGH period of SCL. The LM48822 is a transmit/receive slave-

only device, reliant upon the master to generate the SCL signal. Each transmission sequence is framed by a

START condition and a STOP condition Figure 22. Each data word, device address and data, transmitted over

the bus is 8 bits long as is always followed by an acknowledge pulse (Figure 23). The LM48822 device address

is 1100000.

I2C BUS FORMAT

The I2C bus format is shown in Figure 23. The START signal, the transition of SDA from HIGH to LOW while

SDA is HIGH, is generated, altering all devices on the bus that a device address is being written to the bus.

The 7-bit device address is written to the bus, most significant bit (MSB) first, followed by the R/W bit. R/W = 0

indicates the master is writing to the slave device, R/W = 1 indicates the master wants to read data from the

slave device. The LM48822 is a WRITE-ONLY device and will not respond the R/W = 1. The data is latched in

on the rising edge of the clock. Each address bit must be stable while SDA is HIGH. After the last address bit is

transmitted, the master device releases SDA, during which time, an acknowledge clock pulse is generated by the

slave device. If the LM48822 receives the correct address, the device pulls the SDA line low, generating and

acknowledge bit (ACK).

Once the master device registers the ACK bit, the 8-bit register data word is sent. Each data bit should be stable

while SCL is HIGH. After the 8-bit register data word is sent, the LM48822 sends another ACK bit. Following the

acknowledgement of the register data word, the master issues a STOP bit, allowing SDA to go high while SDA is

high.

Figure 21. I2C Timing Diagram

Figure 22. Start and Stop Diagram

Product Folder Links: LM48822 LM48822TLEVAL

START MSB DEVICE ADDRESS LSB ACK

SCL

SDA STOPMSB REGISTER DATA LSB ACK

R/W

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SNAS456C –MAY 2008–REVISED MAY 2013

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Figure 23. Example I2C Write Cycle

Table 1. Device Address

B7 B6 B5 B4 B3 B2 B1 B0 (R/W)

Device 1 1 0 0 0 0 0 0

Address

Table 2. I2C Control Registers

Address Name

MODE MUTE_ MUTE_

0 0 SDL SD_BIAS CP_ONLY 0 SDR

CONTROL LEFT RIGHT

VOLUME

1 1 SHDN VOL5 VOL4 VOL3 VOL2 VOL1 VOL0

CONTROL

Table 3. Mode Control Register

Bit Name Value Description

0 Left channel enabled

B6 SDL 1 Left channel disabled

0 Bias enabled

B5 SD_BIAS 1 Bias disabled

0 Normal operation

B4 CP_ONLY 1 Charge-pump only mode. Amplifiers and Bias disabled.

B3 UNUSED 0 Set B3 to 0

0 Left channel Normal Operation

B2 MUTE_LEFT 1 Left channel Mute

0 Right channel enabled

B1 SDR Right channel disabled. Right channel audio inputs summed with

1left channel audio inputs and routed to OUTL

0 Right channel Normal Operation

B0 MUTE_RIGHT 1 Right channel Mute

GENERAL AMPLIFIER FUNCTION

The LM48822 headphone amplifier feature TI’s ground referenced architecture that eliminates the large DC-

blocking capacitors required at the outputs of traditional headphone amplifiers. A low-noise inverting charge

pump creates a negative supply (CPVSS) from the positive supply voltage (VDD). The headphone amplifiers

operate from these bipolar supplies, with the amplifier outputs biased about GND, instead of a nominal DC

voltage (typically VDD/2), like traditional amplifiers. Because there is no DC component to the headphone output

signals, the large DC-blocking capacitors (typically 220μF) are not necessary, conserving board space and

system cost, while improving frequency response.

Product Folder Links: LM48822 LM48822TLEVAL

CHARGE PUMP

C1P C1N CPVSS

VDD

VSS

HI-Z

INCOMING AUDIO

SIGNAL

OUT_

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GENERAL AMPLIFIER EXPLANATION

The LM48822 features a differential input stage, which offers improved noise rejection compared to a single-

ended input amplifier. Because a differential input amplifier amplifies the difference between the two input

signals, any component common to both signals is cancelled. An additional benefit of the differential input

structure is the possible elimination of the DC input blocking capacitors. Since the DC component is common to

both inputs, and thus cancelled by the amplifier, the LM48822 can be used without input coupling capacitors

when configured with a differential input signal.

CHARGE PUMP ONLY MODE

In applications where the headphone jack is used as both an output and input port, signals such as a microphone

input can appear on the headphone amplifier output. Traditional charge pump headphone amplifiers can clamp

or distort the signals that appear on their output. Without the charge pump active, generating the negative

voltage supply, the internal protection diodes of the amplifier clamp the incoming signal, distorting the negative

half cycle, see Figure 24. The LM48822 charge pump only mode eliminates this problem. In charge pump only

mode, the amplifiers are disabled, while the charge pump remains active. The disabled amplifier outputs present

a high impedance (1MΩ) load to the incoming signal. The charge pump maintains the negative rail, allowing the

incoming signal to swing between VDD and VSS without any interference from the device.

Set bit B4 (CP_ONLY) of the MODE CONTROL register to 1 for charge pump only mode. Setting CP_ONLY = 1

disables both the left and right channels, regardless of the status of the shutdown control bits. Set CP_ONLY = 0

for normal operation.

Figure 24. Back-Driving the LM48822 Outputs

COMMON MODE SENSE

The LM48822 features a ground (common mode) sensing feature. In noisy applications, or where the headphone

jack is used as a line out to other devices, noise pick up and ground imbalance can degrade audio quality. The

LM48822 COM input senses and corrects any noise at the headphone return, or any ground imbalance between

the headphone return and device ground, improving audio reproduction. Connect COM directly to the headphone

return terminal of the headphone jack Figure 25. No additional external components are required. Connect COM

to GND if the common-mode sense feature is not in use.

Product Folder Links: LM48822 LM48822TLEVAL

AUDIO

INPUT

COM

COMMON MODE SENSE

EQUIVALENT CIRCUIT

LM48822, LM48822TLEVAL

SNAS456C –MAY 2008–REVISED MAY 2013

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Figure 25. COM Connection Example

VOLUME CONTROL

Table 4. Volume Control Table

VOLUME STEP VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 HP GAIN (dB)

1 0 0 0 0 0 0 –96

2 0 0 0 0 0 1 –60

3 0 0 0 0 1 0 –57

4 0 0 0 0 1 1 –54

5 0 0 0 1 0 0 –51

6 0 0 0 1 0 1 –48

7 0 0 0 1 1 0 –45

8 0 0 0 1 1 1 –42

9 0 0 1 0 0 0 –39

10 0 0 1 0 0 1 –36

11 0 0 1 0 1 0 –34.5

12 0 0 1 0 1 1 –33

13 0 0 1 1 0 0 –31.5

14 0 0 1 1 0 1 –30

15 0 0 1 1 1 0 –28.5

16 0 0 1 1 1 1 –27

17 0 1 0 0 0 0 –25.5

18 0 1 0 0 0 1 –24

19 0 1 0 0 1 0 –22.5

20 0 1 0 0 1 1 –21

21 0 1 0 1 0 0 –19.5

22 0 1 0 1 0 1 –18

23 0 1 0 1 1 0 –16.5

24 0 1 0 1 1 1 –16

25 0 1 1 0 0 0 –15.5

26 0 1 1 0 0 1 –15

27 0 1 1 0 1 0 –14.5

28 0 1 1 0 1 1 –14

29 0 1 1 1 0 0 –13.5

30 0 1 1 1 0 1 –13

31 0 1 1 1 1 0 –12.5

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Table 4. Volume Control Table (continued)

VOLUME STEP VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 HP GAIN (dB)

32 0 1 1 1 1 1 –12

33 1 0 0 0 0 0 –11.5

34 1 0 0 0 0 1 –11

35 1 0 0 0 1 0 –10.5

36 1 0 0 0 1 1 –10

37 1 0 0 1 0 0 –9.5

38 1 0 0 1 0 1 –9

39 1 0 0 1 1 0 –8.5

40 1 0 0 1 1 1 –8

41 1 0 1 0 0 0 –7.5

42 1 0 1 0 0 1 –7

43 1 0 1 0 1 0 –6.5

44 1 0 1 0 1 1 –6

45 1 0 1 1 0 0 –5.5

46 1 0 1 1 0 1 –5

47 1 0 1 1 1 0 –4.5

48 1 0 1 1 1 1 –4

49 1 1 0 0 0 0 –3.5

50 1 1 0 0 0 1 –3

51 1 1 0 0 1 0 –2.5

52 1 1 0 0 1 1 –2

53 1 1 0 1 0 0 –1.5

54 1 1 0 1 0 1 –1

55 1 1 0 1 1 0 –0.5

56 1 1 0 1 1 1 0

57 1 1 1 0 0 0 0.5

58 1 1 1 0 0 1 1

59 1 1 1 0 1 0 1.5

60 1 1 1 0 1 1 2

61 1 1 1 1 0 0 2.5

62 1 1 1 1 0 1 3

63 1 1 1 1 1 0 3.5

64 1 1 1 1 1 1 4

SHUTDOWN FUNCTION

The LM48822 features three shutdown controls. Bits B6 (SDL) and B1 (SDR) of the MODE CONTROL register

control the left and right channels, respectively. Set the control bits to 1 to disable the corresponding channel.

When SDR = 1 and SDL = 0, the right channel is disabled, the right and left inputs are summed and output as a

mono signal on the OUTL. When SDL = 1 and SDR = 0, the left channel is disabled, while only the right input

signal is output on OUTR. Setting both SDL and SDR = 1 disables both channels, while the charge pump

remains active. Bit B6 (SHDN) of the VOLUME CONTROL register is the global shutdown control for the entire

device. Set SHDN = 1 to disable the entire device; both amplifiers and charge pump are disabled. Set SHDN = 0

for normal operation. SHDN = 1 overrides any other shutdown control bit.

MUTE FUNCTION

Set bits B2 (MUTE_LEFT) and B0 (MUTE_RIGHT) of the MODE CONTROL register to 1 to mute the respective

channels. Set MUTE_LEFT and MUTE_RIGHT to 0 for normal operation.

Product Folder Links: LM48822 LM48822TLEVAL

LM48822, LM48822TLEVAL

SNAS456C –MAY 2008–REVISED MAY 2013

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SD_BIAS FUNCTION

The LM48822 BIAS is controlled through the I2C interface. Set bit B5 (SD_BIAS) of the MODE CONTROL

pump. When enabled, VBIAS will track VDD for VDD < 3V. Once VDD exceeds 3V, VBIAS remains fixed at 3V, limiting

the output swing of the device the 6VP-P. Set SD_BIAS = 0 to disable BIAS. Disabling BIAS allows the amplifier

and charge pump to track VDD, increasing output swing; however, a slight degradation in PSSR will occur. Limit

VDD to 4.2V or less when BIAS is disabled.

PROPER SELECTION OF EXTERNAL COMPONENTS

Power Supply Bypassing/Filtering

Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass

capacitors as close to the supply pins as possible. Place a 1μF ceramic capacitors from VDD to GND. Additional

bulk capacitance may be added as required.

Charge Pump Capacitor Selection

Use low ESR ceramic capacitors (less than 100mΩ) for optimum performance.

Charge Pump Flying Capacitor (C1)

The flying capacitor (C1) affects the load regulation and output impedance of the charge pump. A C1 value that

is too low results in a loss of current drive, leading to a loss of amplifier headroom. A higher valued C1 improves

load regulation and lowers charge pump output impedance to an extent. Above 2.2μF, the RDS(ON) of the charge

pump switches and the ESR of C1 and C2 dominate the output impedance. A lower value capacitor can be used

in systems with low maximum output power requirements.

Charge Pump Flying Capacitor (C2)

The value and ESR of the hold capacitor (C2) directly affects the ripple on CPVSS. Increasing the value of C2

reduces output ripple. Decreasing the ESR of C2 reduces both output ripple and charge pump output impedance.

A lower value capacitor can be used in systems with low maximum output power requirements.

Input Capacitor Selection

Input capacitors may be required for some applications, or when the audio source is single-ended. Input

capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of

the audio source and the bias voltage of the LM48822. The input capacitors create a high-pass filter with the

input resistors RIN. The -3dB point of the high pass filter is found using Equation 1 below.

f = 1 / 2πRINCIN (Hz) (1)

where:

the value of RIN is given in the Electrical Characteristics Table.

High pass filtering the audio signal helps protect the speakers. When the LM48822 is using a single-ended

source, power supply noise on the ground is seen as an input signal. Setting the high-pass filter point above the

power supply noise frequencies, 217Hz in a GSM phone, for example, filters out the noise such that it is not

amplified and heard on the output. Capacitors with a tolerance of 10% or better are recommended for impedance

matching and improved CMRR and PSRR.

SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION

The LM48822 is compatible with single-ended sources. Figure 26 shows the typical single-ended applications

circuit.

Product Folder Links: LM48822 LM48822TLEVAL

VOLUME

CONTROL AND

MIXER

IN_+

IN_-

OUT_

CIN

LM48822, LM48822TLEVAL

www.ti.com

SNAS456C –MAY 2008–REVISED MAY 2013

Figure 26. Single-Ended Input Configuration

PCB LAYOUT CONFIGURATION

Minimize trace impedance of the power, ground and all output traces for optimum performance. Voltage loss due

to trace resistance between the LM48822 and the load results in decreased output power and efficiency. Trace

resistance between the power supply and ground has the same effect as a poorly regulated supply, increased

ripple and reduced peak output power. Use wide traces for power supply inputs and amplifier outputs to minimize

losses due to trace resistance, as well as route heat away from the device. Proper grounding improves audio

performance, minimizes crosstalk between channels and prevents switching noise from interfering with the audio

signal. Use of power and ground planes is recommended.

Place all digital components and route digital signal traces as far as possible from analog components and

traces. Do not run digital and analog traces in parallel on the same PCB layer. If digital and analog signal lines

must cross either over or under each other, ensure that they cross in a perpendicular fashion.

LM48822TL Demoboard of Materials

Table 5. LM48822TL Demoboard Bill of Materials

Designator Quantity Description

10µF ±10% 16V 500ΩTantalum Capacitor (B Case) AVX

C1 1 TPSB106K016R0500

1μF ±10% 16V X5R Ceramic Capacitor (603) Panasonic

C2 1 ECJ-1VB1C105K

2.2μF ±10% 10V X5R Ceramic Capacitor (603) Panasonic

C3, C8, C9 3 ECJ-1VB1A225K

1μF ±10% 16V X7R Ceramic Capacitor (1206) Panasonic

C4 — C7 4 ECJ-3YB1C105K

5kΩ±5% 1/10W Thick Film Resistor (603) Vishay

R1, R2 2 CRCW06035R1KJNEA

J1 1 Stereo Headphone Jack

J2 1 16-Pin Boardmount Socket 3M 8516-4500JL

JU1 1 3 Pin Header

JU2 1 2 Pin Header

LM4822TL 1 LM48822TL (16-Bump DSBGA)

Product Folder Links: LM48822 LM48822TLEVAL