General Description
Maxim’s redesigned DG411/DG412/DG413 analog
switches now feature low on-resistance matching
between switches (3Ωmax) and guaranteed on-resis-
tance flatness over the signal range (Δ4Ωmax). These
low on-resistance switches conduct equally well in
either direction. They guarantee low charge injection,
low power consumption, and an ESD tolerance of
2000V minimum per Method 3015.7. The new design
offers lower off-leakage current over temperature (less
than 5nA at +85°C).
The DG411/DG412/DG413 are quad, single-pole/sin-
gle-throw (SPST) analog switches. The DG411 is nor-
mally closed (NC), and the DG412 is normally open
(NO). The DG413 has two NC switches and two NO
switches. Switching times are less than 150ns max for
tON and less than 100ns max for tOFF. These devices
operate from a single +10V to +30V supply, or bipolar
±4.5V to ±20V supplies. Maxim’s improved
DG411/DG412/DG413 are fabricated with a 44V silicon-
gate process.
________________________Applications
Sample-and-Hold Circuits Communication Systems
Test Equipment Battery-Operated Systems
Heads-Up Displays PBX, PABX
Guidance & Control Systems Audio Signal Routing
Military Radios
______________________New Features
Plug-In Upgrade for Industry-Standard
DG411/DG412/DG413
Improved RDS(ON) Match Between Channels
(3Ωmax)
Guaranteed RFLAT(ON) Over Signal Range (Δ4Ω)
Improved Charge Injection (10pC max)
Improved Off-Leakage Current Over Temperature
(< 5nA at +85°C)
Withstand Electrostatic Discharge (2000V min)
per Method 3015.7
__________________Existing Features
Low RDS(ON) (35Ωmax)
Single-Supply Operation +10V to +30V
Bipolar-Supply Operation ±4.5V to ±20V
Low Power Consumption (35µW max)
Rail-to-Rail Signal Handling
TTL/CMOS-Logic Compatible
Ordering Information
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
________________________________________________________________
Maxim Integrated Products
1
SWITCHES SHOWN FOR LOGIC “0” INPUT
DIP/SO/TSSOP
DG412
LOGIC SWITCH
0
1
OFF
ON
TOP VIEW
DIP/SO/TSSOP
DG411
LOGIC SWITCH
0
1
ON
OFF
DIP/SO/TSSOP
DG413
LOGIC SWITCHES
1, 4
0
1
OFF
ON
SWITCHES
2, 3
ON
OFF
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN2
D2
S2
V+
V-
S1
D1
IN1
DG413 VL
S3
D3
IN3
IN4
D4
S4
GND
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN2
D2
S2
V+
V-
S1
D1
IN1
DG411 VL
S3
D3
IN3
IN4
D4
S4
GND
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN2
D2
S2
V+
V-
S1
D1
IN1
DG412 VL
S3
D3
IN3
IN4
D4
S4
GND
Pin Configurations/Functional Diagrams/Truth Tables
19-4728; Rev 7; 9/08
Ordering Information continued at end of data sheet.
Contact factory for dice specifications.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Pin Configurations and Functional Diagrams continued at end of data sheet.
PART TEMP RANGE PIN-PACKAGE
DG411CJ 0°C to +70°C 16 Plastic DIP
DG411CUE 0°C to +70°C 16 TSSOP
DG411EUE -40°C to +85°C 16 TSSOP
DG411CY 0°C to +70°C 16 Narrow SO
DG411C/D 0°C to +70°C Dice†
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—Dual Supplies
(V+ = 15V, V- = -15V, VL= 5V, VGND = 0V, VINH = 2.4V, VINL = 0.8V, TA= TMIN to TMAX, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Signals on S, D, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward current to maximum
current rating.
(All Voltages Referenced to V-.)
V+.........................................................................................44V
GND .....................................................................................25V
VL.....................................................(GND -0.3V) to (V+ +0.3V)
Digital Inputs, VS, VD(Note 1)........(V- -2V) to (V+ +2V) or 30mA
(whichever occurs first)
Continuous Current (any terminal) ......................................30mA
Peak Current
(pulsed at 1ms, 10% duty cycle max) ............................100mA
Continuous Power Dissipation (TA= +70°C)
16-Pin Plastic DIP (derate 10.53mW/°C above +70°C) .842mW
16-Pin Narrow SO (derate 8.70mW/°C above +70°C) ...696mW
16-Pin CERDIP (derate 10.00mW/°C above +70°C)......800mW
16-Pin TSSOP (derate 6.7mW/°C above +70°C) ...........457mW
16-Pin QFN (derate 19.2mW/°C above +70°C) ...........1538mW
Operating Temperature Ranges
DG41_C_ ..............................................................0°C to +70°C
DG41_D_ ...........................................................-40°C to +85°C
DG41_AK_ .......................................................-55°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
17 30
A
C, D
-40 40
-10 10
-10 10
-0.25 -0.10 0.25
6
5
A
A
A
TA= TMIN to TMAX
TA= TMIN to TMAX
C, D
C, D
C, D
TA= TMIN to TMAX
TA= +25°C
TA= TMIN to
TMAX
TA= +25°C
TA= TMIN to
TMAX
TA= +25°C
TA= TMIN to
TMAX
TA= +25°C
TA= +25°C
TA= +25°C
V+ = 16.5V,
V- = -16.5V,
VD= ±15.5V,
VS= ±15.5V
V+ = 16.5V,
V- = -16.5V,
VD= ±15.5V,
VS= ±15.5V
(Note 3)
V+ = 16.5V,
V- = -16.5V,
VD= ±15.5V,
VS= ±15.5V
V+ = 15V, V- = -15V,
VD= ±10V,
IS= -10mA
V+ = 13.5V,
V- = -13.5V,
VD= ±8.5V,
IS= -10mA
V+ = 15V, V- = -15V,
VD= ±5V, 0V,
IS= -10mA
CONDITIONS
nA
-20 20
ID(ON)
+
IS(ON)
Drain On-Leakage Current
(Note 7)
-0.4 -0.1 0.4
ID(OFF) nA
-5 5
Drain Off-Leakage Current
(Note 7)
-5 5 nAIS(OFF)
Source Off-Leakage Current
(Note 7)
-0.25 -0.10 0.25
Ω
4
RFLAT(ON)
On-Resistance Flatness
(Note 4)
V-15 15VANALOG
Analog Signal Range
ΔRDS(ON)
On-Resistance
Match Between Channels
(Note 4)
Ω
3
17 45
Ω
45
RDS(ON)
Drain-Source
On-Resistance
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
C, D, A
C, D, A
C, D, A
SWITCH
IN = 2.4V, all others = 0.8V
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = 15V, V- = -15V, VL= 5V, VGND = 0V, VINH = 2.4V, VINL = 0.8V, TA= TMIN to TMAX, unless otherwise noted.)
ns
ns
-5 5TA= TMIN to TMAX
-5 5TA= TMIN to TMAX
TA= +25°C
-5 5TA= TMIN to TMAX
-5 5TA= TMIN to TMAX
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= TMIN to TMAX
TA= +25°C
TA= TMIN to TMAX
TA= +25°C
TA= +25°C
IN = 0.8V, all others = 2.4V
TA= +25°C
CONDITIONS
TA= +25°C
-1 -0.0001 1
All channels on or off,
V+ = 16.5V,
V- = -16.5V,
VIN = 0V or 5V
All channels on or off,
V+ = 16.5V,
V- = -16.5V,
VIN = 0V or 5V
All channels on or off,
V+ = 16.5V,
V- = -16.5V,
VIN = 0V or 5V
pF35f = 1MHz, Figure 8
CD(ON) +
CS(ON)
Drain On-Capacitance
pF9f = 1MHz, Figure 7CD(OFF)
Drain Off-Capacitance
pF9f = 1MHz, Figure 7CS(OFF)
Source Off-Capacitance
dB85
RL= 50Ω,
CL= 5pF,
f = 1MHz, Figure 6
Crosstalk (Note 6)
dB68
RL= 50Ω,
CL= 5pF,
f = 1MHz, Figure 5
OIRROff-Isolation (Note 5)
pC510
CL= 1.0nF,
VGEN = 0V,
RGEN = 0Ω, Figure 4
QCharge Injection (Note 3)
ns25
DG413 only,
RL= 300Ω,
CL= 35pF, Figure 3
tD
Break-Before-Make Time Delay
VD= ±10V,
Figure 2
VD= ±10V,
Figure 2
160
tOFF
Turn-Off Time 100 145
220
tON
Turn-On Time
µA-0.500 0.005 0.500IINH
110 175
Input Current with Input Voltage
High
-1 -0.0001 1
µAIGND
Ground Current
µA
-1 0.0001 1
IL
Logic Supply Current
µA
-1 0.0001 1
I+Positive Supply Current
µA
µA
-0.500 0.005 0.500IINL
Input Current with Input Voltage
Low
All channels on or off,
V+ = 16.5V,
V- = -16.5V,
VIN = 0V or 5V
V
I-Negative Supply Current
±4.5 ±20.0Power-Supply Range
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
INPUT
SUPPLY
DYNAMIC
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS—Single Supply
(V+ = 12V, V- = 0V, VL= 5V, VGND = 0V, VINH = 2.4V, VINL = 0.8V, TA= TMIN to TMAX, unless otherwise noted.)
Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in
this data sheet.
Note 3: Guaranteed by design.
Note 4: ΔRON = ΔRON max - ΔRON min. On-resistance match between channels and flatness are guaranteed only with
bipolar-supply operation. Flatness is defined as the difference between the maximum and minimum value of on-resistance
as measured at the extremes of the specified analog signal range.
Note 5: Off-Isolation = 20log(VD/VS), VD= output, VS= input to off switch. See Figure 5.
Note 6: Between any two switches. See Figure 6.
Note 7: Leakage parameters IS(OFF), ID(OFF), and ID(ON) are 100% tested at the maximum-rated hot temperature and guaranteed
by correlation at +25°C.
-5 5
TA= +25°C
TA= TMAX
-5 5TA= TMAX
-5 5TA= TMAX
315TA= TMIN to TMAX
-5 5TA= TMAX
TA= +25°C
TA= +25°C
TA= TMIN to TMAX
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= +25°C
TA= TMIN to TMAX
CONDITIONS
pC510
CL= 1.0nF,
VGEN = 0V,
RGEN = 0V,
Figure 4
Q
Charge Injection
(Note 3)
ns25
DG413 only,
RL= 300Ω, CL= 35pF,
Figure 3
tD
Break-Before-Make Time Delay
VS= 8V,
Figure 2
VS= 8V,
Figure 2
All channels on or off,
VL= 5.25V,
VIN = 0V or 5V
All channels on or off,
V+ = 13.2V,
VIN = 0V or 5V
All channels on or off,
VL= 5.25V,
VIN = 0V or 5V
All channels on or off,
V+ = 13.2V,
VIN = 0V or 5V
V+ = 10.8V,
VD= 3.8V,
IS= -10mA
ns
140
tOFF
Turn-Off Time
40 80
95 125
tON ns
175 250
V012VANALOG
Turn-On Time
µA
-1 -0.0001 1
IGND
Analog Signal Range
Ground Current
µA
-1 0.0001 1
I-Negative Supply Current
µA
-1 0.0001 1
IL
µA
-1 0.0001 1
I+Positive Supply Current
Logic Supply Current
Ω
100
RDS(ON)
Drain-Source On-Resistance
UNITS
MIN TYP MAX
(Note 2)
SYMBOLPARAMETER
SWITCH
SUPPLY
DYNAMIC
(Note 3)
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
_______________________________________________________________________________________ 5
60
-20 -10 10
ON-RESISTANCE vs. VD AND
POWER-SUPPLY VOLTAGE
0
40
DG411-01
VD (V)
RDS(ON) (Ω)
020
20
50
30
10
70
A
BC
D
A: V+ = 5V,
V- = -5V
B: V+ = 10V,
V- = -10V
C: V+ = 15V,
V- = -15V
D: V+ = 20V,
V- = -20V
0
-20 -10 10
ON-RESISTANCE vs. VD AND
TEMPERATURE
50
DG411-02
VD (V)
RDS(ON) (Ω)
020
30
10
40
20
60
V+ = 15V
V- = -15V
TA = +125°C
TA = +85°C
TA = +25°C
TA = -55°C
20
05 15
ON-RESISTANCE vs. VD AND
TEMPERATURE (SINGLE SUPPLY)
120
DG411-03
VD (V)
RDS(ON) (Ω)
10 20
80
40
100
60
140
V- = 0V
V+ = 5V
V+ = 10V
V+ = 15V
V+ = 20V
160
20
05 15
ON-RESISTANCE vs. VD
(SINGLE SUPPLY)
70
DG411-04
VD (V)
RDS(ON) (Ω)
10 20
50
30
60
40
80
V+ = 12V
V- = 0V TA = +125°C
TA = +85°C
TA = +25°C
0.0001
-55
OFF-LEAKAGE CURRENTS vs.
TEMPERATURE
10
DG411-05
TEMPERATURE (°C)
OFF-LEAKAGE (nA)
+25 +125
0.1
0.001
1
0.01
100
V+ = 16.5V
V- = -16.5V
VD = ±15V
VS = ±15V
0.0001
-55
ON-LEAKAGE CURRENTS vs.
TEMPERATURE
10
DG411-06
TEMPERATURE (°C)
ON-LEAKAGE (nA)
+25 +125
0.1
0.001
1
0.01
100
V+ = 16.5V
V- = -16.5V
VD = ±15V
VS = ±15V
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
-60
-20
CHARGE INJECTION vs.
ANALOG VOLTAGE
40
DG411-07
VD (V)
Q (pC)
020
0
-40
20
-20
60
-15 -10 -5 5 10 15
V+ = 15V
V- = -15V
VL = 5V
CL = 1nF
0.0001
-55
SUPPLY CURRENT vs. TEMPERATURE
10
DG411-08
TEMPERATURE (°C)
I+, I-, IL (μA)
+25 +125
0.1
0.001
1
0.01
100
A: I+ at V+ = 16.5V
B: I- at V- = -16.5V
C: IL at VL = 5V
A
B
C
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
6 _______________________________________________________________________________________
__________Applications Information
Operation with Supply Voltages
Other Than 15V
Using supply voltages other than 15V will reduce the
analog signal range. The DG411/DG412/DG413 switch-
es operate with ±4.5V to ±20V bipolar supplies or with
a +10V to +30V single supply; connect V- to 0V when
operating with a single supply. Also, all device types
can operate with unbalanced supplies such as +24V
and -5V. VLmust be connected to +5V to be TTL com-
patible, or to V+ for CMOS-logic level inputs. The
Typical Operating Characteristics
graphs show typical
on-resistance with ±15V, ±10V, and ±5V supplies.
(Switching times increase by a factor of two or more for
operation at ±5V.)
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ on first, followed by VL, V-, and
logic inputs. If power-supply sequencing is not possi-
ble, add two small, external signal diodes in series with
supply pins for overvoltage protection (Figure 1).
Adding diodes reduces the analog signal range to 1V
below V+ and 1V below V-, without affecting low switch
resistance and low leakage characteristics. Device
operation is unchanged, and the difference between
V+ and V- should not exceed +44V.
V+
S
V-
D
Vg
V+
V-
Figure 1. Overvoltage Protection Using External Blocking Diodes
Pin Description
PIN
DIP/SO/TSSOP QFN NAME FUNCTION
1, 16, 9, 8 15, 14, 7, 6 IN1–IN4 Input
2, 15, 10, 7 16, 13, 8, 5 D1–D4 Analog Switch Drain Terminal
3, 14, 11, 6 1, 12, 9, 4 S1–S4 Analog Switch Source Terminal
4 2 V- Negative-Supply Voltage Input
5 3 GND Ground
12 10 VLLogic Supply Voltage
13 11 V+ Positive-Supply Voltage Input—Connected to Substrate
EP Exposed Paddle (QFN Only). Connect EP to V+.
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
_______________________________________________________________________________________ 7
tr < 20ns
tf < 20ns
50%
0V
LOGIC
INPUT
V-
-15V
RL
300Ω
D1
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VS ( RL )
RL + RDS(ON)
SWITCH
INPUT
IN1
+3V
tOFF
0V
SWITCH OUTPUT
0.9 x VOUT 0.9 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
VLV+
CL
35pF
+5V +15V
VOUT
S1
0V
REPEAT TEST FOR IN AND S, FOR LOAD
CONDITIONS, SEE Electrical Characteristics.
DG411
DG412
DG413
50%
0.9 x VOUT1
+3V
0V
0V
LOGIC
INPUT
SWITCH
OUTPUT 2
(VO2)
0V
0.9 x VOUT2
tDtD
LOGIC
INPUT V-
-15V
RL2
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
S2
IN
VL
S1
VOUT2
V+
+5V +15V
CL2
VS1 = +10V
VS2 = +10V RL1
VOUT1
CL1
RL = 300Ω
CL = 35pF
D1
D2
SWITCH
OUTPUT 1
(VO1)
DG413
Figure 2. Switching-Time
Figure 3. DG413 Break-Before-Make
______________________________________________Timing Diagrams/Test Circuits
VGEN GND
D
CL
VOUT
-15V
V-
V+
VOUT
IN
OFF ON OFF
ΔVOUT
Q = (ΔVOUT)(CL)
S
+5V
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF ON OFF
IN
VIN = +3V
+15V
RGEN
IN
VL
DG411
DG412
DG413
Figure 4. Charge-Injection
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
8 _______________________________________________________________________________________
Figure 6. Crosstalk
IN
0V or
2.4V
SIGNAL
GENERATOR
+15V
C
VL
ANALYZER D
RL
GND
S
C
-15V
V-
+5V
V+
DG411
DG412
DG413 SIGNAL
GENERATOR 0dBm
+15V
C
ANALYZER D
RL
GND
S
C
V-
-15V
0V or 2.4V IN1
D50Ω
VL
S
+5V
IN2
0V or 2.4V
V+
DG411
DG412
DG413
Figure 5. Off-Isolation
_________________________________Timing Diagrams/Test Circuits (continued)
CAPACITANCE
METER
D
S
GND C
V-
-15V
IN 0V or
2.4V
C+15V
VL
+5V
f = 1MHz
V+
DG411
DG412
DG413
CAPACITANCE
METER
D
S
GND C
V-
-15V
IN 0V or
2.4V
C+15V
VL
+5V
f = 1MHz
V+
DG411
DG412
DG413
Figure 7. Channel Off-Capacitance Figure 8. Channel On-Capacitance
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
_______________________________________________________________________________________ 9
Ordering Information (continued) Chip Topography
S3
S4
D3
0.097"
(2.46mm)
0.080"
(2.03mm)
V-
GND
D4
IN4 IN3
VL
V+
S2
D1 IN1 IN2
S1
D2
Contact factory for dice specifications.
*
EP = Exposed pad.
**
Contact factory for availability and processing to MIL-STD-883B.
***
Contact factory for availability.
PART TEMP RANGE PIN-PACKAGE
DG411EGE -40°C to +85°C 16 QFN-EP*
DG411DJ -40°C to +85°C 16 Plastic DIP
DG411DY -40°C to +85°C 16 Narrow SO
DG411DK -40°C to +85°C 16 CERDIP
DG411AK
-55°C to +125°C
16 CERDIP**
DG411MY/PR
-55°C to +125°C
16 SO***
DG411MY/PR-T
-55°C to +125°C
16 SO***
DG412CJ 0°C to +70°C 16 Plastic DIP
DG412CUE 0°C to +70°C 16 TSSOP
DG412EUE -40°C to +85°C 16 TSSOP
DG412CY 0°C to +70°C 16 Narrow SO
DG412C/D 0°C to +70°C Dice†
DG412DJ -40°C to +85°C 16 Plastic DIP
DG412EGE -40°C to +85°C 16 QFN-EP*
DG412DY -40°C to +85°C 16 Narrow SO
DG412DK -40°C to +85°C 16 CERDIP
DG412AK
-55°C to +125°C
16 CERDIP**
DG412MY/PR
-55°C to +125°C
16 SO***
DG412MY/PR-T
-55°C to +125°C
16 SO***
DG413CJ 0°C to +70°C 16 Plastic DIP
DG413CUE 0°C to +70°C 16 TSSOP
DG413EUE -40°C to +85°C 16 TSSOP
DG413CY 0°C to +70°C 16 Narrow SO
DG413C/D 0°C to +70°C Dice†
DG413EGE -40°C to +85°C 16 QFN-EP*
DG413DJ -40°C to +85°C 16 Plastic DIP
DG413DY -40°C to +85°C 16 Narrow SO
DG413DK -40°C to +85°C 16 CERDIP
DG413AK
-55°C to +125°C
16 CERDIP**
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
10 ______________________________________________________________________________________
16
D1
15
IN1
14
IN2
13
D2
5
D4
6
IN4
7
IN3
8
D3
DG411
2V-
1S1
3GND
4
S4
11 V+
12 S2
10 VL
9S3
TOP VIEW
16
D1
15
IN1
14
IN2
13
D2
5
D4
6
IN4
7
IN3
8
D3
DG412
2V-
1S1
3GND
4
S4
11 V+
12 S2
10 VL
9S3
16
D1
15
IN1
14
IN2
13
D2
5
D4
6
IN4
7
IN3
8
D3
DG413
2V-
1S1
3GND
4
S4
11 V+
12 S2
10 VL
9S3
QFNQFN QFN
*EP = CONNECT EP TO V+.
Pin Configurations/Functional Diagrams (continued)
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
______________________________________________________________________________________ 11
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 QFN-EP G1655-3 21-0091
16 Plastic DIP P16-1 21-0043
16 TSSOP U16-2 21-0066
16 CERDIP J16-3 21-0045
16 Narrow SO S16-1 21-0041
16 SO S16-1 21-0041
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
6 9/07 Addition of exposed pad information 1, 6, 9, 14, 15
7 9/08 Addition of rugged plastic information 1, 9