September 2013 Doc ID 15994 Rev 5 1/37
1
VN5E016AH-E
16 mΩ high-side driver with analog current sense
for automotive applications
Features
General
Inrush current active management by
power limitation
Very low standby current
3.0 V CMOS compatible inputs
Optimized electromagnetic emissions
Very low electromagnetic susceptibility
In compliance with the 2002/95/EC
European directive
Diagnostic functions
Proportional load current sense
High current sense precision for wide
current range
Current sense disable
Off-state open-load detection
Output short to V
CC
indication
Overload and short to ground (power
limitation) indication
Therm al sh utdow n indica tion
•Protections
Undervoltage shutdown
Overvoltage clamp
Load current limitation
Self limiting of fast thermal transients
Protection against loss of ground and loss
of V
CC
Overtemperature shutdown with auto
restart (thermal shutdown)
Reverse battery protected
Electros tatic disc harge protection
Applications
All types of resistive, inductive and capacitive
loads
Suitable as LED driver
Description
The VN5E016AH-E is a single channel high-side
driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the
tiny HPak package. The VN5E016AH-E is
designed to drive 12 V automotive grounded
loads delivering protection, diagnostics and easy
3 V and 5 V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto
restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel to provide
enhanced diagnostic functions. These functions
include fast detection of overload and short-circuit
to ground through power limitation indication,
overtemperature indication, short-circuit to V
CC
diagnosis and ON-state and OFF-state open-load
detection.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices
.
Max supply voltage V
CC
41V
Operati ng vol tage range V
CC
4.5 to 28V
Max on-state resistance (per ch.) R
ON
16 m Ω
Current lim itati on (typ ) I
LIMH
73 A
Off-st a te sup ply current I
S
2 µA
(1)
1. Typical value with all loads connected.
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Contents VN5E016AH-E
2/37 Doc ID 15994 Rev 5
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Elect rical char acteristi c s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 25
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Curre nt sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and OFF-state open-load detection . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagneti zation energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 HPak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK
®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
VN5E016AH-E List of tables
Doc ID 15994 Rev 5 3/37
List of tables
Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (V
CC
=13V, T
j
= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8 V < V
CC
< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Open-load detection (8 V < V
CC
< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. Package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 17. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
List of figures VN5E016AH-E
4/37 Doc ID 15994 Rev 5
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) not in scale. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Open-load Off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. I
OUT
/I
SENSE
vs I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Maximum current sense ratio drift vs load current
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent overload. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. OFF-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 16. T
J
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input clamp level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. On-state resistance vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. On-state resistance vs V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. I
LIMH
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn off current versus inductance
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 35. PC board
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. HPak thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 38. Thermal fitting model of a single channel HSD in HPak
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 39. Package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. HPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. HPAK tape and reel (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
VN5E016AH-E Block diagram and pin description
Doc ID 15994 Rev 5 5/37
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin functions
Name Function
V
CC
Battery co nne cti on
OUTPU T Power output
(1)
1. Pins 1 and 7 must be externally tied together.
GND Ground connection
INPUT Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
CURRENT
SENSE Analog current sense pin, delivers a current proportional to the load current
CS_DIS Active high CMOS compatible pin, to disable the current sense pin
V
CC
Control & Diagnostic
LOGIC
DRIVER
V
ON
Limitation
Current
Limitation
Power
Clamp
OFF State
Open load
Over
temp.
Undervoltage
V
SENSEH
Current
Sense
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
IN
CS
CS_
DIS
GND
OUT
Signal C l amp
Block diagram and pin description VN5E016AH-E
6/37 Doc ID 15994 Rev 5
Figure 2. Configuration diagram (top view) not in scale
Table 2. Suggested connections for unused and not connected pins
Connection / pin Current sense Output Input CS_DIS
Floating Not allowed X X X
To ground Through 1 kΩ
resistor Through 22 kΩ
resistor Through 10 kΩ
resistor Through 10 kΩ
resistor
IN Vcc CS CS_DIS
1234567
GND
OUT OUT
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 7/37
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
I
S
I
GND
V
CC
V
CC
OUTPUT
INPUT
V
IN
V
SENSE
GND
CS_DIS
I
CSD
V
CSD
I
IN
CURRENT
S
ENSE
V
OUT
I
OUT
I
SENSE
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply voltage 41 V
-V
CC
Reverse DC supply voltage 0.3 V
I
GND
DC reverse ground pin current 200 mA
I
OUT
DC output current Internally limited A
-I
OUT
Reverse DC outp ut curr ent 20 A
I
IN
DC input current -1 to 10 mA
I
CSD
DC current sense disable input current -1 to 10 mA
V
CSENSE
Current sense maximum voltage (V
CC
>0) V
CC
-41
+V
CC
V
V
E
MAX
Maximum switching energy (single pulse)
(L = 1.55 mH; R
L
= 0Ω; V
bat
= 13.5V; T
jstart
= 150ºC;
I
OUT
= I
limL
(Typ.))350 mJ
Electrical specifications VN5E016AH-E
8/37 Doc ID 15994 Rev 5
2.2 Thermal data
V
ESD
Electrostatic discharge (human body model: R = 1.5KΩ;
C = 100pF)
Input
Current sense
CS_DIS
Output
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
V
ESD
Charge device model (CDM-AEC-Q100-011) 750 V
T
j
Junction operating temperature -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Max. value Unit
R
thj-case
Thermal resistance junction-case 0.63 °C/W
R
thj-amb
Thermal resistance junc tion-ambient 69.3 °C/W
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 9/37
2.3 Electrical characteristics
Values specified in this section are for 8 V < V
CC
< 28 V, -40 °C < T
j
< 150 °C, unless
otherwise specified.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
Operating supply volt ag e 4.5 13 28 V
V
USD
Undervoltage shutdown - 3.5 4.5 V
V
USDhyst
Undervoltage shutdown
hysteresis -0.5- V
R
ON
On-state resistance
I
OUT
= 5 A; T
j
= 25 °C - - 16
mΩI
OUT
= 5 A; T
j
= 150 °C - - 32
I
OUT
= 5 A; V
CC
= 5 V; T
j
= 25 °C - - 20
V
F
Output - V
CC
diode
voltage -I
OUT
= 5A; T
j
= 150°C - - 0.7 V
V
clamp
Clamp Voltage I
cc
= 20 mA; I
OUT
= 0A 41 46 52 V
I
S
Supply current
Off-state ; V
CC
= 13V; T
j
= 25°C;
V
IN
= V
OUT
= V
SENSE
= 0V -2
5
µA
On-state; V
CC
= 13V; V
IN
= 5V;
I
OUT
= 0A -1.53mA
I
L(off1)
Off-state output current
V
IN
= V
OUT
= 0V; V
CC
= 13V;
T
j
= 25°C 00.013 µA
V
IN
= V
OUT
= 0V; V
CC
= 13V;
T
j
= 125°C 0-5
Table 6. Switching (V
CC
=13V, T
j
= 25 °C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time R
L
= 2.6 Ω (see Figure 6)- 15 - µs
t
d(off)
Turn-off delay time R
L
= 2.6 Ω (see Figure 6)- 45 - µs
(dV
OUT
/dt)
on
Turn-on voltage slope R
L
= 2.6 Ω
-0.2-V/µs
(dV
OUT
/dt)
off
Turn-off volt ag e slo pe R
L
= 2.6 Ω
-0.2-V/µs
W
ON
Switching energy
loss es at turn- on
(t
won
)R
L
= 2.6 Ω (see Figure 6)- 1.4 - mJ
W
OFF
Switching energy
losses at turn- off
(t
woff
)R
L
= 2.6 Ω (see Figure 6)- 0.8 - mJ
Electrical specifications VN5E016AH-E
10/37 Doc ID 15994 Rev 5
Table 7. Logic Inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level voltage - - 0.9 V
I
IL
Low level input current V
IN
= 0.9V 1 - - µA
V
IH
Input high level voltage 2.1 - - V
I
IH
High lev el input curr ent V
IN
= 2.1V - - 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 - - V
V
ICL
Input clamp voltage I
IN
= 1mA 5.5 - 7 V
I
IN
= -1mA - -0.7 -
V
CSDL
CS_DIS low level voltage - - 0.9 V
I
CSDL
Low level CS_DIS current V
CSD
= 0.9V 1 - - µA
V
CSDH
CS_DIS high level voltage 2.1 - - V
I
CSDH
High level CS_DIS cu rrent V
CSD
= 2.1V - - 10 µA
V
CSD(hyst)
CS_DIS hysteresis voltage 0.25 - - V
V
CSCL
CS_DIS cl amp voltage I
CSD
= 1mA 5.5 - 7 V
I
CSD
= -1mA - -0.7 -
Table 8. Protection and diagnostics
(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
Short circui t curre nt V
CC
= 13V
5V<V
CC
<28V 54 73 108
108 A
A
I
limL
Short circuit current
during thermal cycling V
CC
= 13V; T
R
<T
j
<T
TSD
-18 - A
T
TSD
Shutd ow n temperature 150 175 200 °C
T
R
Reset temperature
T
RS
+ 1
T
RS
+ 5
C
T
RS
Thermal reset of status 135 - - °C
T
HYST
Thermal hysteresis
(T
TSD
-T
R
)-7 -°C
V
DEMAG
Turn-off output voltage
clamp I
OUT
= 2A; V
IN
= 0; L =
6mH
V
CC
-41
V
CC
-46
V
CC
-52
V
V
ON
Output voltage drop
limitation I
OUT
= 0.5A;
T
j
= -40°C...150 °C -25 -mV
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 11/37
Table 9. Current sense (8 V < V
CC
<18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K
0
I
OUT
/I
SENSE
I
OUT
= 0.25A; V
SENSE
= 0.5V
T
j
= -40°C...150°C 2950 6490 9400 -
K
1
I
OUT
/I
SENSE
I
OUT
= 5A; V
SENSE
= 0.5V
T
j
= -40°C...150°C
T
j
= 25°C...150°C 4540
4540 5130
5130 6230
5720 -
dK
1
/K
1(1)
Current sense ratio drift I
OUT
= 5A; V
SENSE
= 0.5V;
V
CSD
= 0V ;
T
J
= -40 °C to 15 0 °C - 11 - + 11 %
K
2
I
OUT
/I
SENSE
I
OUT
= 10A; V
SENSE
= 4V
T
j
= -40°C...150°C
T
j
= 25°C...150°C 4640
4640 4980
4980 5570
5300 -
dK
2
/K
2(1)
Current sense ratio drift I
OUT
= 10 A; V
SENSE
= 4 V;
V
CSD
= 0V ;
T
J
= -40 °C to 15 0 °C - 8 - + 8 %
K
3
I
OUT
/I
SENSE
I
OUT
= 25A; V
SENSE
= 4V
T
j
= -40°C...150°C
T
j
= 25°C...150°C 4650
4600 4860
4860 5150
5090 -
dK
3
/K
3(1)
Current sense ratio drift I
OUT
= 25 A; V
SENSE
= 4 V;
V
CSD
= 0V ;
T
J
= -40 °C to 15 0 °C - 4 - + 4 %
I
SENSE0
Analog sense leak age
current
I
OUT
= 0A; V
SENSE
= 0V;
V
CSD
= 5V ; V
IN
= 0V;
T
j
= -40°C...150°C 0-1
µA
I
OUT
= 0A; V
SENSE
= 0V;
V
CSD
= 0V ; V
IN
= 5V;
T
j
= -40°C...150°C 0-2
I
OUT
= 2A; V
SENSE
= 0V;
V
CSD
= 5V ; V
IN
= 5V;
T
j
= -40°C...150°C --1
I
OL
Openload ON-state
current det ection
threshold
V
IN
= 5V;
I
SENSE
= 5 µA 5-70mA
V
SENSE
Max analog sense
output voltage I
OUT
= 18A; R
SENSE
= 3.9K
Ω
5--V
V
SENSEH(2)
Analog sense output
voltage in fault condition V
CC
= 13V; R
SENSE
= 3.9K
Ω
-8-V
I
SENSEH(2)
Analog sense output
current in faul t condition V
CC
= 13V; V
SENSE
= 5V - 9 - mA
t
DSENSE1H
Delay response time
from falling edge of
CS_DIS pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
= 90% of I
SENSE
max
(see
Figure 4.
)-50100µs
Electrical specifications VN5E016AH-E
12/37 Doc ID 15994 Rev 5
t
DSENSE1L
Delay response time
from rising edge of
CS_DIS pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
= 10% of I
SENSE
max
(see
Figure 4
)-520µs
t
DSENSE2H
Delay response time
from rising edge of
INPUT pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
= 90% of I
SENSE
max
(see
Figure 4
)- 270 600 µs
Δ
t
DSENSE2H
Delay response time
between rising edge of
output current and rising
edge of current sense
V
SENSE
<4V,
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
I
OUTMAX
= 3A (see
Figure 7
)
--280µs
t
DSENSE2L
Delay response time
from falling edge of
INPUT pin
V
SENSE
<4V, 1.5A<Iout<25A
I
SENSE
= 10% of I
SENSE
max
(see
Figure 4
)- 100 250 µs
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation, overtemperature and open-load OFF-state detection.
Table 10. Open-load detection (8 V < V
CC
<18V)
Symbol P aram eter Test conditions Min. Typ. Max. Unit
V
OL
Open-load OFF-state
voltage detection
threshold V
IN
= 0V 2 See
Figure 5
4V
t
DSTKON
Output short circuit to
V
CC
detection delay at
turn Off See
Figure 5
180 - 1200 µs
I
L(off2)r
Of f-state output curr ent
at V
OUT
= 4V V
IN
= 0V; V
SENSE
= 0V
V
OUT
rising from 0V to 4V -120 - 0 µA
I
L(off2)f
Of f-state output curr ent
at V
OUT
= 2V V
IN
= 0V; V
SENSE
= V
SENSEH
;
V
OUT
falling from V
CC
to 2V -50 - 90 µA
td_vol
Dela y response from
output rising edge to
V
SENSE
rising edge in
open-load
V
OUT
= 4 V; V
IN
= 0V
V
SENSE
= 90% of V
SENSEH
--20µs
Table 9. Current sense (8 V < V
CC
< 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 13/37
Figure 4. Current sense delay characteristics
Figure 5. Open-load Off-state delay timing
Figure 6. Switching characteristics
SENSE CURRENT
INPUT
LOAD CURRENT
CS_DIS
t
DSENSE2H
t
DSENSE2L
t
DSENSE1L
t
DSENSE1H
V
IN
V
CS
t
DSTKON
OUTPUT ST UCK TO V
CC
V
OUT
> V
OL
V
SENSEH
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10% t
f
dV
OUT
/dt
(off)
t
d(off)
t
d(on)
INPUT
t
t
90%
t
Won
t
Woff
Electrical specifications VN5E016AH-E
14/37 Doc ID 15994 Rev 5
Figure 7. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
Figure 8. Output voltage drop limitation
V
IN
I
OUT
I
SENSE
I
OUTMAX
I
SENSEMAX
90% I
SENSEMAX
90% I
OUTMAX
Δt
DSENSE2H
t
t
t
Von
Iout
Vcc-Vout
Tj=150oC Tj=25oC
Tj=-40oC
Von/Ron(T)
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 15/37
Figure 9. I
OUT
/I
SENSE
vs I
OUT
Figure 10. Maximum current sense ratio drift vs load current
(1)
1. Parameter guaranteed by design; it is not tested.
4000
4200
4400
4600
4800
5000
5200
5400
5600
5800
6000
6200
6400
510152025
I
OUT
(A)
I
out
/ I
sense
max Tj = -40 °C to 150 °C
max Tj = 25 °C to 150 °C
min Tj = 25 °C to 150 °C min Tj = -40 °C to 150 °C
typic a l val ue
-20
-15
-10
-5
0
5
10
15
20
5 10152025
I
OUT
(A)
dk/k(%)
Electrical specifications VN5E016AH-E
16/37 Doc ID 15994 Rev 5
Table 11. Truth table
Conditions Input Output Sense (V
CSD
=0V)
(1)
1. If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Normal operati on L
HL
H0
Nominal
Overtemperature L
HL
L0
V
SENSEH
Undervoltage L
HL
L0
0
Overload
H
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
V
SENSEH
Short circuit to GND
(power lim i tation) L
HL
L0
V
SENSEH
Open-load OFF-state
(with external pull-up) LHV
SENSEH
Short circuit to V
CC
(external pul l-up
disconnected)
L
HH
HV
SENSEH
< Nominal
Negative output voltage
clamp LL 0
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 17/37
Table 12. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pulse
Test levels Number of
pulses or
test times
Burst cycle/pulse
repetition time Delays and
Impedance
III IV
1 -75 V -100 V 5000
pulses 0.5 s 5 s 2 ms, 10
Ω
2a +37 V +50 V 5000
pulses 0.2 s 5 s 50 µs, 2
Ω
3a -100 V -150 V 1h 90 ms 100 ms 0.1 µs, 50
Ω
3b +75 V +100 V 1h 90 ms 100 ms 0.1µs, 50
Ω
4 -6 V -7 V 1 pulse - 100 ms,
0.01
Ω
5b
(2)
+65 V +87 V 1 pulse - 400 ms, 2
Ω
Table 13. Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse
Test level results
(1)
1. The above test levels must be considered referred to V
CC
= 13.5V except for pulse 5b
III IV
1C C
2a C C
3a C C
3b C C
4C C
5b
(2)
2. Valid in case of external load dump clamp: 40V max imum referred to ground.
CC
Table 14. Electrical transient requirements (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or more function s of th e device are not pe rformed as de signed a fter exposure to
dist urbance and can not be retu rned to pro per opera tion w ithout re placi ng the devic e.
Electrical specifications VN5E016AH-E
18/37 Doc ID 15994 Rev 5
2.4 Waveforms
Figure 11. Normal operation
Figure 12. Overload or Short to GND
I
OUT
V
SENSE
V
CS_DIS
INPUT
Nominal load Nominal load
Normal operation
Power Limitation
I
LimH
>
I
LimL
>
I
OUT
V
SENSE
V
CS_DIS
INPUT
Thermal cycling
Overload or Short to GND
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 19/37
Figure 13. Intermittent overload
Figure 14. OFF-state open-load with external circuitry
INPUT
OFF-State Open Load
with external circutry
V
OL
I
OUT
V
SENSE
V
CS_DIS
V
OUT
V
OUT
> V
OL
t
DSTK(on)
V
SENSEH
>
Electrical specifications VN5E016AH-E
20/37 Doc ID 15994 Rev 5
Figure 15. Short to V
CC
Figure 16. T
J
evolution in overload or short to GND
t
DSTK(on)
V
OUT
> V
OL
Resistive
Short to V
CC
Hard
Short to V
CC
Short to V
CC
I
OUT
V
CS_DIS
V
OUT
V
OL
t
DSTK(on)
T
TSD
T
R
T
J
evolution in
Overload or Short to GND
I
LimH
>
< I
LimL
T
J_START
T
HYST
Power Limitation
Self-limitation of fast thermal transients
INPUT
I
OUT
T
J
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 21/37
2.5 Electrical characteristics curves
Figure 17. Off-state output current Figure 18. High level input current
Iloff [nA]
0
500
1000
1500
2000
2500
3000
3500
4000
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Iih [uA]
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vin= 2. 1V
Figure 19. Input clamp level Figure 20. Input low level
Vicl [V]
5
5.2
5.4
5.6
5.8
6
6.2
6.4
6.6
6.8
7
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Iin= 1mA
Vil [V]
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Figure 21. Input high level Figure 22. Input hys teresis voltage
Vih [V ]
0
0.5
1
1.5
2
2.5
3
3.5
4
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vihyst [V]
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Electrical specifications VN5E016AH-E
22/37 Doc ID 15994 Rev 5
Figure 23. On-state resistance vs T
case
Figure 24. On-state resistance vs V
CC
Ron [mOhm]
0
10
20
30
40
50
60
70
80
90
100
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Iout= 5A
Vcc= 13V
Ron [mOhm]
0
10
20
30
40
0 5 10 15 20 25 30 35 40
Vcc [ V ]
Tc= -40°C
Tc= 25°C
Tc= 125°C
Tc= 150°C
Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope
Vusd [V]
0
2
4
6
8
10
12
14
16
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
(dVout/dt)On [ V/ms]
0
100
200
300
400
500
600
700
800
900
1000
-50 -25 0 25 50 75 100 125 150 175
Tc C]
Vcc= 13V
Rl= 2.6
Figure 27. I
LIMH
vs T
case
Figure 28. Turn-off voltage slope
Ilimh [A]
40
50
60
70
80
90
100
-50 -25 0 25 50 75 100 125 150 175
Tc C]
Vcc= 13V
(dVout/dt)Off [V/ms]
0
100
200
300
400
500
600
700
800
900
1000
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vcc= 13V
Rl= 2.6
VN5E016AH-E Electrical specifications
Doc ID 15994 Rev 5 23/37
Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage
Vcsdh [V]
0
0.5
1
1.5
2
2.5
3
3.5
4
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Vcsdcl [ V]
0
1
2
3
4
5
6
7
8
9
10
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Iin= 1mA
Figure 31. CS_DIS low level voltage
Vcsdl [V]
0
0.5
1
1.5
2
2.5
3
3.5
4
-50 -25 0 25 50 75 100 125 150 175
Tc [°C]
Application information VN5E016AH-E
24/37 Doc ID 15994 Rev 5
3 Application information
Figure 32. Application schematic
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to dimension the R
GND
resistor.
1. R
GND
600mV / (I
S(on)max
).
2. R
GND
≥ (−V
CC
) / (-I
GND
)
where -I
GND
is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
<0: duri ng reverse battery situations) is:
Equation 1
P
D
= (-V
CC
)
2
/R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND
will produce a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
μC
+5V
V
GND
CS_DIS
IINPUT
R
prot
R
prot
CURREN T SE NSE
R
prot
R
SENSE
C
ext
VN5E016AH-E Application information
Doc ID 15994 Rev 5 25/37
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2 Solution 2: a diode (D
GND
) in the ground line
A resistor (R
GND
=1kΩ) should be inserted in parallel to D
GND
if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2 Load dump protection
D
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line
that are greater than the ones shown in the ISO T/R 7637/1 table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transients are present on the V
CC
line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prot
) in line to
prevent the μC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of
µ
C and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
µ
C
I/Os.
Equation 2
V
CCpeak
/I
latchup
R
prot
(V
OHμC
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= -100V; I
latchup
20mA; V
OHμC
4.5V
5kΩ R
prot
65kΩ.
Recommended values: R
prot
=10kΩ, C
EXT
= 10nF
.
Application information VN5E016AH-E
26/37 Doc ID 15994 Rev 5
3.4 Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
Current mirror of the load current in normal operation, deliveri ng a curre nt
proportional to the load one according to a know ratio K
X
.
The current I
SENSE
can be easily converted to a voltage V
SENSE
by means of an
external resistor R
SENSE
. Linearity between I
OUT
and V
SENSE
is ensured up to 5V
minimum (see parameter V
SENSE
in Table 9: Current sense (8 V < V
CC
<18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < V
CC
<18V)).
Diagnostic flag in fault conditions, delivering a fixed voltage V
SENSEH
up to a
maximum current I
SENSEH
in case of the following fault conditions (refer to Truth table):
Power limitation activation
Overtemperature
Short to V
CC
in OFF-state
Open-load in OFF-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
Main MOSn
41V
OUTn
I
Loff2r
R
SENSE
R
PROT
To uC ADC
R
PD
R
PU
V
PU
Pwr_Lim
V
SENSE
PU_CMD
Overtemperature
OL OFF
+
-
V
OL
CURRENT
SENSEn
I
OUT
/K
X
I
SENSEH
V
BAT
I
Loff2f
V
SENSEH
Load
INPUTn
V
CC
GND
CS_DIS
VN5E016AH-E Application information
Doc ID 15994 Rev 5 27/37
3.4. 1 Sh ort to V
CC
and OFF-state open-load detection
Short to V
CC
A short circuit between V
CC
and output is indicated by the relevant current sense pin set to
V
SENSEH
during the device off-state. Small or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
OFF-state open-load with external circuitry
Detection of an open-load in off mode requires an external pull-up resistor R
PU
connecting
the output to a positive supply voltage V
PU
.
It is preferable V
PU
to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull down resistor R
PD
connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostic).
R
PD
must be selected in order to ensure V
OUT
<
V
OLmin
unless pulled up by the external
circuitry:
Equation 3
R
PD
22 K
Ω
is reco mme nde d.
For proper open-load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
Equation 4
For the values of V
OLmin
,V
OLmax
,
I
L(off2)r
and I
L(off2)f
see Table 10: Open-load detection
(8 V < V
CC
<18V).
VVIRV
OLfoffLPD
OFFupPull
OUT
2
min)2(
_
=<=
VV
RR
IRRVR
V
OL
PDPU
roffLPDPUPUPD
ONupPull
OUT
4
max
)2(
_
=>
+
=
Application information VN5E016AH-E
28/37 Doc ID 15994 Rev 5
3.5 Maximum d emagn etization energy (V
CC
=13.5V)
Figure 34. Maximum turn off current versus inductance
(1)
1. Values are generated with R
L
=0Ω.
In case of repetitive pulses, T
jstart
(at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves A and B.
Demagnetization Demagnetization Demagnetization
t
V
IN
, I
L
C: T
jstart
= 125°C repetitive pulse
A: T
jstart
= 150°C single pulse
B: T
jstart
= 100°C repetitive pulse
1
10
100
0,1 1 10 100L (mH)
I (A)
A
B
C
VN5E016AH-E Package and PC board thermal data
Doc ID 15994 Rev 5 29/37
4 Package and PC board thermal data
4.1 HPak thermal data
Figure 35. PC board
(1)
1. Layout condition of R
th
and Z
th
measurements (PCB FR4 area = 58 mm x 58 mm, PCB
thickness = 1.8 mm, Cu thickness = 70
µ
m, Copper areas: from minimum pad lay-out to 8 cm
2
).
Figure 36. R
thj-amb
Vs. PCB copper area in open box free air condition
RTHjamb
30
35
40
45
50
55
60
65
70
75
0246810
RTHjamb
Package and PC board thermal data VN5E016AH-E
30/37 Doc ID 15994 Rev 5
Figure 37. HPak thermal impedance junction ambient single pulse
Equation 5: pulse calculation formula
where δ = t
P
/T
Figure 38. Thermal fitting model of a single channel HSD in HPak
(1)
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Z
TH
δ
R
TH
δ
Z
THtp
1
δ
()
+
=
VN5E016AH-E Package and PC board thermal data
Doc ID 15994 Rev 5 31/37
Table 15. Thermal parameter
Area/island (cm
2
)Footprint48
R1 (°C/W) 0.1 - -
R2 (°C/W) 0.2 - -
R3 (°C/W) 2 - -
R4 (°C/W) 8 - -
R5 (°C/W) 28 22 12
R6 (°C/W) 31 25 16
C1 (W.s/°C) 0.0001 - -
C2 (W.s/°C) 0.002 - -
C3 (W.s/°C) 0.05 - -
C4 (W.s/°C) 0.4 - -
C5 (W.s/°C) 0.8 1.4 3
C6 (W.s/°C) 3 6 9
Package and packing information VN5E016AH-E
32/37 Doc ID 15994 Rev 5
5 Package and packing information
5.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Figure 39. Package dimension
VN5E016AH-E Package and packing information
Doc ID 15994 Rev 5 33/37
Table 16. Package mechanical data
Ref. dim Data book mm
Nom. Min. Max.
A - 2.20 2.40
A1 - 0.90 1.10
A2 - 0.03 0.23
b - 0.45 0.60
b4 - 5.20 5.40
c - 0.45 0.60
c2 - 0.48 0.60
D - 6.00 6.20
D1 5.10 - -
E - 6.40 6.60
E1 5.20 - -
e0.85- -
e1 - 1.60 1.80
e2 - 3.30 3.50
e3 - 5.00 5.20
H - 9.35 10.10
L-1-
(L1) 2.80 - -
L2 0.80 - -
L4 - 0.60 1.00
R0.20- -
V2 -
Package and packing information VN5E016AH-E
34/37 Doc ID 15994 Rev 5
5.2 Packing information
The devices can be packed in tube or tape and reel shipments (see Table 17: Device
summary).
Figure 40. HPAK tube shipment (no suffix)
Figure 41. HPAK tape and reel (suffix “TR”)
All dimensions are in mm.
Base q.ty 75
Bulk q.ty 3000
Tube length (± 0. 5 ) 532
A6
B21.3
C (± 0. 1) 0.6
A
C
B
All dimensions are in mm.
Base q.ty
2500
Bulk q.ty
2500
A (max)
330
B (min)
1.5
C (± 0.2)
13
F
20.2
G (+ 2 / -0)
16.4
N (min)
60
T (max)
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W
16
Tape hole spacing P0 (± 0.1)
4
Component spacing P
8
Hole diameter D (+ 0.1/-0)
1.5
Hole diameter D1 (min)
1.5
Hole position F (± 0.05)
7.5
Compartment depth K (max)
2.75
Hole spacing P1 (± 0.1)
2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User dire ctio n o f feed
REEL DIMENSIONS
VN5E016AH-E Order codes
Doc ID 15994 Rev 5 35/37
6 Order codes
Table 17. Device summary
Package Order codes
Tube Tape and reel
7 pins H-pac k VN5E016AH -E VN5E016AHTR-E
Revision history VN5E016AH-E
36/37 Doc ID 15994 Rev 5
7 Revision history
Table 18. Document revision history
Date Revision Changes
07-Jul-2009 1 Initial release.
29-Oct-2009 2 Added
Section 5.2: Packing information
.
01-Jun-2010 3 Updated
Table 16: Package mechanic al data
.
04-Aug-2010 4
Table 9: Current sense (8 V < V
CC
<18V)
:
Updated dK
1
/K
1
test conditions
19-Sep-20 13 5 Updated Disc la im er.
VN5E016AH-E
Doc ID 15994 Rev 5 37/37
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