36 V Precision, 2.8 nV/√Hz
Rail-to-Rail Output Op Amp
Data Sheet
AD8675
Rev. E
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Fax: 781.461.3113 ©2005–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Very low voltage noise: 2.8 nV/√Hz
Rail-to-rail output swing
Low input bias current: 2 nA maximum
Very low offset voltage: 75 µV maximum
Low input offset drift: 0.6 µV/°C maximum
Very high gain: 120 dB
Wide bandwidth: 10 MHz typical
±5 V to ±18 V operation
APPLICATIONS
Precision instrumentation
PLL filters
Laser diode control loops
Strain gage amplifiers
Medical instrumentation
Thermocouple amplifiers
PIN CONFIGURATIONS
NULL
1
–IN
2
+IN
3
V–
4
NULL
8
V+
7
OUT
6
NC
5
NC = NO CONNECT
AD8675
TOP VI EW
(No t t o Scale)
05564-001
Figure 1. 8-Lead SOIC_N (R-8)
NULL 1
–IN 2
+IN 3
V– 4
NULL
8
V+
7
OUT
6
NC
5
NC = NO CONNECT
AD8675
TOP VI EW
(No t t o Scale)
05564-002
Figure 2. 8-Lead MSOP (RM-8)
GENERAL DESCRIPTION
The AD8675 precision operational amplifier has ultralow offset,
drift, and voltage noise combined with very low input bias currents
over the full operating temperature range. The AD8675 is a
precision, wide bandwidth op amp featuring rail-to-rail output
swings and very low noise. Operation is fully specified from
±5 V to ±15 V.
The AD8675 features a rail-to-rail output like that of the OP184,
but with wide bandwidth and even lower voltage noise, combined
with the precision and low power consumption like that of the
industry-standard OP07 amplifier. Unlike other low noise, rail-
to-rail op amps, the AD8675 has very low input bias current
and low input current noise.
With typical offset voltage of only 10 µV, offset drift of 0.2 µV/°C,
and noise of only 0.10 μV p-p (0.1 Hz to 10 Hz), the AD8675 is
perfectly suited for applications where large error sources cannot
be tolerated. For applications with even lower offset tolerances,
the proprietary nulling capability allows a combination of both
device and system offset errors up to 3.5 mV (referred to the
input) to be compensated externally. Unlike previous circuits,
the AD8675 accommodates this adjustment without adversely
affecting the offset drift, CMRR, and PSRR of the amplifier.
Precision instrumentation, PLL, and other precision filter circuits,
position and pressure sensors, medical instrumentation, and
strain gage amplifiers benefit greatly from the very low noise,
low input bias current, and wide bandwidth. Many systems can
take advantage of the low noise, dc precision, and rail-to-rail
output swing provided by the AD8675 to maximize SNR and
dynamic range.
The smaller packages and low power consumption afforded by
the AD8675 allow maximum channel density or minimum
board size for space-critical equipment.
The AD8675 is specified for the extended industrial temperature
range (−40°C to +125°C). The AD8675 amplifier is available in
the tiny 8-lead MSOP, and the popular 8-lead, narrow SOIC,
RoHS compliant packages. MSOP packaged devices are only
available in tape and reel format.
For the dual version of this ultraprecision, rail-to-rail op amp,
see the AD8676 data sheet.
The AD8675 and AD8676 are members of a growing series of
low noise op amps offered by Analog Devices, Inc.
Table 1. Voltage Noise
Package 0.9 nV 1.1 nV 1.8 nV 2.8 nV 3.8 nV
Single AD797 AD8597 ADA4004-1 AD8675 AD8671
Dual AD8599 ADA4004-2 AD8676 AD8672
Quad ADA4004-4 AD8674
AD8675 Data Sheet
Rev. E | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Specifications ............................................................... 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance .......................................................................5
Power Sequencing .........................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Test Circuit ...................................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
7/12—Rev. D to Rev. E
Added Power Sequencing Section .................................................. 5
Added Figure 28 and Figure 29; Renumbered Sequentially ..... 10
8/11—Rev. C to Rev. D
Added Input Capacitance, Common Mode Parameter and Input
Capacitance, Differential Mode Parameter, Table 3 ..................... 4
6/10—Rev. B to Rev. C
Changes to Figure 10 ........................................................................ 7
5/10—Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Added Table 1; Renumbered Sequentially .................................... 1
Changes to Table 2 ............................................................................ 3
Changes to Table 3 ............................................................................ 4
Changes to Table 4 and Table 5 ....................................................... 5
Changes to Figure 4 and Figure 6 to Figure 8 ............................... 6
Changes to Figure 15 ........................................................................ 8
Changes to Figure 21 and Figure 24 ............................................... 9
Added Figure 27; Renumbered Sequentially .............................. 10
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
4/07—Rev. 0 to Rev. A
Added Figure 7 and Figure 8; Renumbered Sequentially ........... 6
10/05—Revision 0: Initial Version
Data Sheet AD8675
Rev. E | Page 3 of 12
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
VS = ±5.0 V, VCM = 0 V, V O = 0 V, T A = +25°C, unless otherwise specified.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
10 75 µV
−40°C ≤ T
A
≤ +125°C 12 240 µV
Offset Voltage Drift ΔV
OS
/ΔT −40°C ≤ T
A
≤ +125°C 0.2 0.6 µV/°C
Input Bias Current I
B
−2 +0.5 +2 nA
−40°C ≤ T
A
≤ +125°C −5.5 −2 +5.5 nA
Input Offset Current I
OS
−1 +0.1 +1 nA
−40°C ≤ T
A
≤ +125°C −2.8 +0.1 +2.8 nA
Input Voltage Range IVR −3.0 +3.0 V
Common-Mode Rejection Ratio CMRR V
CM
= −3.0 V to +3.0 V 105 130 dB
−40°C ≤ T
A
≤ +125°C 105 dB
Open-Loop Gain A
VO
R
L
= 2 kΩ to ground, 120 126 dB
V
O
= −3.5 V to +3.5 V
−40°C ≤ T
A
≤ +125°C 117 dB
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
R
L
= 10 kΩ to ground 4.90 4.95 V
−40°C ≤ T
A
≤ +125°C 4.85 V
R
L
= 2 kΩ to ground 4.80 4.90 V
−40°C ≤ T
A
≤ +125°C 4.75 V
Output Voltage Low V
OL
R
L
= 10 kΩ to ground −4.98 −4.90 V
−40°C ≤ T
A
≤ +125°C −4.85 V
R
L
= 2 kΩ to ground −4.91 −4.86 V
−40°C ≤ T
A
≤ +125°C −4.82 V
Short-Circuit Limit I
SC
±35 mA
POWER SUPPLY
PSRR
VS = ±5.0 V to ±15.0 V
120
140
dB
−40°C ≤ T
A
≤ +125°C 120 dB
Supply Current/Amplifier I
SY
V
O
= 0 V 2.3 2.7 mA
−40°C ≤ T
A
≤ +125°C 3.4 mA
DYNAMIC PERFORMANCE
Slew Rate SR R
L
= 2 kΩ 2.5 V/µs
Gain Bandwidth Product GBP 10 MHz
NOISE PERFORMANCE
Voltage Noise e
n p-p
0.1 Hz to 10 Hz 0.1 µV p-p
Voltage Noise Density e
n
f = 1 kHz 2.8 nV/√Hz
Current Noise Density i
n
f = 10 Hz 0.3 pA/√Hz
AD8675 Data Sheet
Rev. E | Page 4 of 12
VS = ±15 V, VCM = 0 V, V O = 0 V, T A = +25°C, unless otherwise specified.
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
10 75 µV
−40°C ≤ T
A
≤ +125°C 12 240 µV
Offset Voltage Drift
ΔVOS/ΔT
−40°C ≤ TA ≤ +125°C
0.2
0.6
µV/°C
Input Bias Current I
B
−2 +0.5 +2 nA
−40°C ≤ T
A
≤ +125°C −4.5 +1 +4.5 nA
Input Offset Current I
OS
−1 +0.1 +1 nA
−40°C ≤ T
A
≤ +125°C −2.8 +0.1 +2.8 nA
Input Voltage Range
IVR
−12.5
+12.5
V
Common-Mode Rejection Ratio CMRR V
CM
= −12.5 V to +12.5 V 114 130 dB
−40°C ≤ T
A
≤ +125°C 114 dB
Open-Loop Gain A
VO
R
L
= 2 kΩ to ground, 123 132 dB
V
O
= −13.5 V to +13.5 V
−40°C ≤ T
A
≤ +125°C 117 dB
Input Capacitance, Common Mode C
INCM
3.8 pF
Input Capacitance, Differential Mode C
INDM
9.6 pF
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
RL = 10 kΩ to ground
14.85
14.92
V
−40°C ≤ T
A
≤ +125°C 14.80 V
R
L
= 2 kΩ to ground 14.60 14.80 V
−40°C ≤ T
A
≤ +125°C 14.40 V
Output Voltage Low V
OL
R
L
= 10 kΩ to ground −14.96 −14.94 V
−40°C ≤ TA ≤ +125°C
−14.90
V
R
L
= 2 kΩ to ground −14.85 −14.75 V
−40°C ≤ T
A
≤ +125°C −14.69 V
Short-Circuit Limit I
SC
±35 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR V
S
= ±5.0 V to ±15.0 V 120 140 dB
−40°C ≤ T
A
≤ +125°C 120 dB
Supply Current/Amplifier I
SY
V
O
= 0 V 2.5 2.9 mA
−40°C ≤ T
A
≤ +125°C 3.8 mA
DYNAMIC PERFORMANCE
Slew Rate SR R
L
= 10 kΩ 2.5 V/µs
Gain Bandwidth Product GBP 10 MHz
NOISE PERFORMANCE
Voltage Noise e
n p-p
0.1 Hz to 10 Hz 0.1 µV p-p
Voltage Noise Density e
n
f = 1 kHz 2.8 nV/√Hz
Current Noise Density i
n
f = 10 Hz 0.3 pA/√Hz
Data Sheet AD8675
Rev. E | Page 5 of 12
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage ±18 V
Input Voltage
±V supply
Input Current ±5 mA
Differential Input Voltage ±0.7 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range
RM-8, R-8 Packages −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range
RM-8, R-8 Packages −65°C to +150°C
Lead Temperature Range (Soldering, 10 sec) 300°C
NULL Pins (Pin 1, Pin 8), Input Current Maximum <50 µA, V
S
< V+
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages and
measured using a standard 4-layer board, unless otherwise
specified.
Table 5. Thermal Resistance
Package Type θ
JA
θ
JC
Unit
8-Lead MSOP (RM-8)
142
45
°C/W
8-Lead SOIC_N (R-8) 120 45 °C/W
POWER SEQUENCING
Establish the op amp supplies simultaneously with, or before,
any input signals are applied. If this is not possible, the input
current must be limited to 10 mA.
ESD CAUTION
AD8675 Data Sheet
Rev. E | Page 6 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
±15 V and ±5 V, TA = 25°C, unless otherwise specified.
10
9
8
7
6
5
4
3
2
1
0110 100 1k 10k 100k
FRE QUENCY ( Hz )
VOLT AGE NOI SE DENSITY (n V/ Hz)
05564-011
Figure 3. Voltage Noise Density vs. Frequency
90
0
–100 –80 –60 –40 –20 020 40 60 80 100
V
OS
(µV)
NUMBER OF AM P LIFI E RS
80
70
60
50
40
30
20
10
05564-016
Figure 4. Input Offset Voltage Distribution
25
20
15
10
5
0
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
1.00
0.65
0.70
0.75
0.80
0.85
0.90
0.95
TCVOS (µV/°C)
NUMBER OF AM P LI FI E RS
05564-014
Figure 5. TCVOS
150
–150
–40
TEMPERATURE (°C)
V
OS
(µV)
100
50
0
–50
–100
–20 120100806040200
05564-005
V
S
= ±15V
TYPICAL
Figure 6. Offset Voltage vs. Temperature
350
300
250
200
150
100
50
0
IB (n A)
NUMBER OF AM P LIFI E RS
2.01.61.20.80.40–2.0 –1.6 –1.2 –0.8 –0.4
05564-006
Figure 7. Input Bias Current, VS = ±15 V
2.01.61.20.80.40–2.0 –1.6 –1.2 –0.8 –0.4
350
300
250
200
150
100
50
0
IB (n A)
NUMBER OF AM P LIFI E RS
05564-008
Figure 8. Input Bias Current, VS = ±5 V
Data Sheet AD8675
Rev. E | Page 7 of 12
5
4
3
2
1
0
–1
–2
–3
–4
–5
–40 –20 020 40 60 80 100 120
TEMPERATURE (°C)
I
B
(n A)
V
S
= ±5V
V
S
= ±15V
05564-007
Figure 9. Input Bias Current vs. Temperature
2.4
2.0
1.6
1.2
0.8
0.4
0036
SUPP LY CURRENT (mA)
SUPPLY VOLT AGE (V)
05564-009
246810 12 14 16 18 20 22 24 26 28 30 32 34
T
A
= 25° C
R
L
= ∞
Figure 10. Supply Current vs. Total Supply Voltage
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
–40 –20 020 40 60 80 100 120
TEMPERATURE (°C)
I
SY
(mA)
V
S
= ±15V
V
S
= ±5V
05564-019
Figure 11. Supply Current vs. Temperature
100
120
100
80
40
60
20
–40
–20
0
–80
–100
–60
–120 10k1k 100k 10M1M 100M
FRE QUENCY ( Hz )
GAIN (d B)
R
L
= 2kΩ
C
L
= 35pF
θ
M
= 55.2
GAIN
PHASE
180
120
60
–60
0
–120
–180
PHASE M ARGIN ( Degrees)
05564-018
Figure 12. Gain and Phase vs. Frequency
60
50
40
30
20
10
0
–10
–20
–30
–401k 10k 100k
G = 1
G = 10
G = 100
1M 10M 100M
FRE QUENCY ( Hz )
CLOSED-LOOP GAIN (dB)
05564-030
Figure 13. Closed-Loop Gain vs. Frequency
70
60
50
40
30
20
10
01k 10k 100k 1M 10M 100M
FRE QUENCY ( Hz )
ZOUT (Ω)
AVO = 100
AVO = 10
AVO = 1
05564-015
Figure 14. ZOUT vs. Frequency
AD8675 Data Sheet
Rev. E | Page 8 of 12
15
10
5
0
–5
–10
–15
TIME ( 10µ s/DI V )
VOLT AGE (V)
VIN = ±10V
RL = 2kΩ
AV = +1
05564-020
Figure 15. Large-Signal Transient Response, VSY = ±15 V
4
3
2
1
0
–1
–3
–2
–4
TIME ( 10µ s/DI V )
VOLT AGE (V)
V
IN
= ±3. 5V
R
L
= 2kΩ
A
V
= +1
05564-028
Figure 16. Large-Signal Transient Response, VSY = ±5 V
70
60
50
40
30
20
10
0110 100 1k 10k 100k
CAPACI TANCE ( pF)
OVERSHOOT (%)
A
V
= +1
V
IN
= 100mV p-p
+OS
–OS
05564-012
Figure 17. Small-Signal Overshoot vs. Load Capacitance
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7–4 1 6 11 16 21 26 31 36
TIME (µs)
INPUT VOLTAGE (V)
50
40
30
20
10
0
–10
–30
–20
OUTPUT VOLTAGE (V)
V
IN
= 200mV p - p
A
VO
= –100
R
L
= 10kΩ
V
IN
V
OUT
05564-004
Figure 18. Positive Overvoltage Recovery
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5–4 1 6 11 16 21 26 31 36
TIME (µs)
INPUT VOLTAGE (V)
50
40
30
20
10
0
–10
–20
–30
OUTPUT VOLTAGE (V)
V
IN
= 200mV p-p
A
VO
= –100
R
L
= 10kΩ
V
IN
V
OUT
05564-003
Figure 19. Negative Overvoltage Recovery
180
160
140
120
100
80
60
40
20
0
–2010 100 10k1k 100k 10M1M 100M
FRE QUENCY ( Hz )
CMRR (dB)
05564-029
Figure 20. CMRR vs. Frequency
Data Sheet AD8675
Rev. E | Page 9 of 12
140
120
100
80
60
40
20
010 100 1k 10k 100k 1M 10M 100M
FRE QUENCY ( Hz )
PSRR ( dB)
05564-022
PSRR+
PSRR–
Figure 21. Power Supply Rejection Ratio vs. Frequency
148
147
146
145
144
143
142
141
140
–40 –20 020 40 60 80 100 120
TEMPERATURE (°C)
PSRR ( dB)
05564-023
Figure 22. Power Supply Rejection Ratio vs. Temperature
0.06
0.04
0.02
0
–0.02
–0.04
–0.06 0 1 2 43 765 8 9 10
TIME (s)
NOISE (µV)
05564-021
Figure 23. Voltage Noise (0.1 Hz to 10 Hz)
10k
1k
100
10
1
0.001 0.01 0.1 110 100
LOAD CURRENT ( mA)
V
S
– V
OUT
(mV)
05564-010
SINK
SOURCE
Figure 24. Output Saturation Voltage vs. Output Current
14.86
14.84
14.82
14.80
14.78
14.76
14.74
14.72
14.70
–40 –20 020 40 60 80 100 120
TEMPERATURE (°C)
+SWING (V)
VOH
VS = ±15V
RL = 2kΩ
05564-032
Figure 25. Swing vs. Temperature, VOH
–14.70
–14.75
–14.80
–14.85
–14.90
–14.95
–15.00
–40 –20 020 40 60 80 100 120
TEMPERATURE (°C)
–SWING (V)
VS = ±15V
RL = 2kΩ
VOL
05564-033
Figure 26. Swing vs. Temperature, VOL
AD8675 Data Sheet
Rev. E | Page 10 of 12
0.01
0.001
0.0001
0.0000110 100 1k 10k 100k
FRE QUENCY ( Hz )
DISTORTION (%)
05564-024
R
L
= 2kΩ
V
IN
= 1V rms
A
V
= +1
BW = 80kHz
V
S
= 5V
V
S
= 15V
Figure 27. Distortion vs. Frequency
05564-128
VSY = ± 15V
AV = 1
VIN
VOUT
Figure 28. No Phase Reversal
0 2
12
10
8
6
4
2
04
SETTLING TIMETO 0.01% ( µs)
OUTPUT STEP (V)
6 8
05564-129
V
SY
= ±15V
A
V
= 1
Figure 29. Output Step vs. Settling Time to 0.01%
Data Sheet AD8675
Rev. E | Page 11 of 12
TEST CIRCUIT
18
4
7
3
6
2
AD8675
INPUT OUTPUT
V+
VOS TRIM RANGE IS
TY P ICAL LY ±3.5mV
100kΩ
V–
–
+
05564-031
Figure 30. Optional Offset Nulling Circuit
AD8675 Data Sheet
Rev. E | Page 12 of 12
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 31. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 32. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
AD8675ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A08
AD8675ARMZ-REEL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A08
AD8675ARZ −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8675ARZ-REEL −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8675ARZ-REEL7 −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
1 Z = RoHS Compliant Part.
©2005–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05564-0-7/12(E)