2640 GHz GaAs MMIC Low Noise Amplifier L t Alpha Features Single Bias Supply Operation (4.5 V) @ 3.8 dB Noise Figure Typical at 38 GHz @ 22 dB Small Signal Gain Typical at 38 GHz @ 0.25 um Ti/Pd/Au Gates M@ 100% On-Wafer RF and DC Testing @ 100% Visual Inspection to MIL-STD-883 MT 2010 Description Alphas four-stage reactively-matched 26-40 GHz GaAs MMIC low noise amplifier has typical small signal gain of 22 GB with a typical noise figure of 3.8 dB at 38 GHz. The chip uses Alphas proven 0.25 um low noise PHEMT technology, and is based upon MBE layers and electron AA038N1-00 Chip Outline 1.267 0.124 Dimensions indicated in mm. All DC (V) pads are 0.1 x 0.1 mm and RF In, Out pads are 0.07 mm wide. Chip thickness = 0.1 mm. Absolute Maximum Ratings beam lithography for the highest uniformity and Characteristic Value repeatability. The FETs employ surface passivation to Operating Temperature (To) 55C 0 190C ensure a rugged reliable part with through-substrate via holes and gold-based backside metallization to facilitate Storage Temperature (Tst) 65C to +150C a conductive epoxy die attach process. Bias Voltage (Vp) 6 Voc Power In (Pin) 13 dBm Junction Temperature (T ) 175C Electrical Specifications at 25C (Vps = 4.5 V) Parameter Symbol Min. Typ. Max. Unit Drain Current Ibs 28 34 mA Small Signal Gain G 16 22 dB Noise Figure! NF 3.8 4.2 dB Input Return Loss RL; -12 -10 dB Output Return Loss RLo -12 -10 dB Output Power at 1 dB Gain Compression Pi aB 4 7 dBm Thermal Resistance? Ojc 101 CWW 1. Not measured on a 100% basis. 2. Calculated value based on measurement of discrete FET. Alpha Industries, Inc. [781] 935-5150 Fax [617] 824-4579 Email sales@alphaind.com www.alphaind.com 1 Specifications subject to change without notice. 2/99A 2640 GHz GaAs MMIC Low Noise Amplifier AA038N1-00 Typical Performance Data Bias Arrangement 30 01 F 50 pF 20 [Sei T Ts = 10 Sof N\ = 22 Loo -10 IN N = RF IN si\\ | Lael 20 NY La N WA TNY VY -30 18 20 22 24 26 28 30 32 34 36 38 40 42 Frequency (GHz) Typical Small Signal Performance S-Parameters (Vp = 4.5 V) For biasing on, adjust Vp from zero to the desired value (4.5 V recommended). For biasing off, reverse the biasing on procedure. 11 10 Gain 3.0 V, 5.5 V Circuit Schematic 9 Gain 2.5 V Oo 3 Gain 4.5 V 2 5 7 5 iP 6 a 2 5 NF 4.5 V NF* 3.0 V,5.5V 2B no 1 S NF 2.5 V Zz 4 3 2 Detail A 18 20 22 24 26 28 30 32 34 36 38 40 42 Frequency (GHz) Vpe Typical Gain and Noise Figure Performance for Three Bias Conditions *Special Bias: Vp; = 3.0 V, Vp2 = 5.5 V 23 21 a 22 19 U S ~ ~X 17 . mam 3 Ss Oo 2 15 oO Cc LL Cc a a 13 a O'o 44 2 24 = or 9 Ip Z oO 7 x oO 5 NF 3 1.0 2.0 3.0 4.0 5.0 6.0 Vp1 and Vpe (V) Typical Gain and Noise Figure Performance vs. Drain Bias (Vp; = Vp2) 2 Alpha Industries, Inc. [781] 935-5150 Fax [617] 824-4579 Email sales@alphaind.com www.alphaind.com Specifications subject to change without notice. 2/99A