ON Semiconductor General Purpose Transistor MMBT3904LT1 NPN Silicon ON Semiconductor Preferred Device 3 MAXIMUM RATINGS 1 Rating Symbol Value Unit Collector-Emitter Voltage VCEO 40 Vdc Collector-Base Voltage VCBO 60 Vdc Emitter-Base Voltage VEBO 6.0 Vdc IC 200 mAdc Collector Current -- Continuous 2 CASE 318-08, STYLE 6 SOT-23 (TO-236) COLLECTOR 3 THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation FR-5 Board(1) TA = 25C Derate above 25C PD 225 mW 1.8 mW/C Thermal Resistance Junction to Ambient RJA 556 C/W PD 300 mW 2.4 mW/C RJA 417 C/W TJ, Tstg -55 to +150 C Total Device Dissipation Alumina Substrate,(2) TA = 25C Derate above 25C Thermal Resistance Junction to Ambient Junction and Storage Temperature 1 BASE 2 EMITTER DEVICE MARKING MMBT3904LT1 = 1AM ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Characteristic Symbol Min Max Unit Collector-Emitter Breakdown Voltage (3) (IC = 1.0 mAdc, IB = 0) V(BR)CEO 40 -- Vdc Collector-Base Breakdown Voltage (IC = 10 Adc, IE = 0) V(BR)CBO 60 -- Vdc Emitter-Base Breakdown Voltage (IE = 10 Adc, IC = 0) V(BR)EBO 6.0 -- Vdc Base Cutoff Current (VCE = 30 Vdc, VEB = 3.0 Vdc) IBL -- 50 nAdc Collector Cutoff Current (VCE = 30 Vdc, VEB = 3.0 Vdc) ICEX -- 50 nAdc OFF CHARACTERISTICS 1. FR-5 = 1.0 0.75 0.062 in. 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina. 3. Pulse Test: Pulse Width 300 s, Duty Cycle 2.0%. Preferred devices are ON Semiconductor recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2001 November, 2001 - Rev. 3 1 Publication Order Number: MMBT3904LT1/D MMBT3904LT1 ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) (Continued) Symbol Min Max 40 70 100 60 30 -- -- 300 -- -- -- -- 0.2 0.3 0.65 -- 0.85 0.95 fT 300 -- MHz Output Capacitance (VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz) Cobo -- 4.0 pF Input Capacitance (VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) Cibo -- 8.0 pF Input Impedance (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hie 1.0 10 k ohms Voltage Feedback Ratio (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hre 0.5 8.0 X 10-4 Small-Signal Current Gain (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hfe 100 400 -- Output Admittance (VCE = 10 Vdc, IC = 1.0 mAdc, f = 1.0 kHz) hoe 1.0 40 mhos Noise Figure (VCE = 5.0 Vdc, IC = 100 Adc, RS = 1.0 k ohms, f = 1.0 kHz) NF -- 5.0 dB (VCC = 3.0 Vdc, VBE = -0.5 0.5 Vdc, IC = 10 mAdc, IB1 = 1.0 mAdc) td -- 35 tr -- 35 (VCC = 3.0 Vdc, IC = 10 mAdc, IB1 = IB2 = 1.0 mAdc) ts -- 200 tf -- 50 Characteristic Unit ON CHARACTERISTICS(3) DC Current Gain (1) (IC = 0.1 mAdc, VCE = 1.0 Vdc) (IC = 1.0 mAdc, VCE = 1.0 Vdc) (IC = 10 mAdc, VCE = 1.0 Vdc) (IC = 50 mAdc, VCE = 1.0 Vdc) (IC = 100 mAdc, VCE = 1.0 Vdc) HFE Collector-Emitter Saturation Voltage (3) (IC = 10 mAdc, IB = 1.0 mAdc) (IC = 50 mAdc, IB = 5.0 mAdc) VCE(sat) Base-Emitter Saturation Voltage (3) (IC = 10 mAdc, IB = 1.0 mAdc) (IC = 50 mAdc, IB = 5.0 mAdc) VBE(sat) -- Vdc Vdc SMALL-SIGNAL CHARACTERISTICS Current-Gain -- Bandwidth Product (IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz) SWITCHING CHARACTERISTICS Delay Time Rise Time Storage Time Fall Time 3. Pulse Test: Pulse Width 300 s, Duty Cycle 2.0%. http://onsemi.com 2 ns ns MMBT3904LT1 DUTY CYCLE = 2% 300 ns +3 V +10.9 V 275 +10.9 V DUTY CYCLE = 2% 10 k -0.5 V +3 V t1 10 < t1 < 500 s 275 10 k 0 CS < 4 pF* < 1 ns CS < 4 pF* 1N916 -9.1 V < 1 ns * Total shunt capacitance of test jig and connectors Figure 1. Delay and Rise Time Equivalent Test Circuit Figure 2. Storage and Fall Time Equivalent Test Circuit TYPICAL TRANSIENT CHARACTERISTICS TJ = 25C TJ = 125C 10 5000 Q, CHARGE (pC) CAPACITANCE (pF) 2000 5.0 Cibo 3.0 Cobo 2.0 1.0 0.1 VCC = 40 V IC/IB = 10 3000 7.0 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 1000 700 500 100 70 50 20 30 40 QT 300 200 QA 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 REVERSE BIAS VOLTAGE (VOLTS) IC, COLLECTOR CURRENT (mA) Figure 3. Capacitance Figure 4. Charge Data http://onsemi.com 3 200 MMBT3904LT1 500 t r, RISE TIME (ns) tr @ VCC = 3.0 V 50 30 20 7 5 40 V 15 V 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 IC/IB = 20 50 30 20 7 5 200 5.0 7.0 10 20 30 50 70 100 Figure 5. Turn-On Time Figure 6. Rise Time IC/IB = 20 50 IC/IB = 10 30 20 7 5 50 70 100 200 IC/IB = 10 30 20 10 30 IC/IB = 20 100 70 50 7 5 20 VCC = 40 V IB1 = IB2 300 200 10 5.0 7.0 10 200 500 ts = ts - 1/8 tf IB1 = IB2 IC/IB = 10 2.0 3.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 100 70 1.0 1.0 IC, COLLECTOR CURRENT (mA) 500 300 200 100 70 10 2.0 V td @ VOB = 0 V VCC = 40 V IC/IB = 10 300 200 t f , FALL TIME (ns) TIME (ns) 100 70 10 t s , STORAGE TIME (ns) 500 IC/IB = 10 300 200 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 7. Storage Time Figure 8. Fall Time 200 TYPICAL AUDIO SMALL-SIGNAL CHARACTERISTICS NOISE FIGURE VARIATIONS (VCE = 5.0 Vdc, TA = 25C, Bandwidth = 1.0 Hz) 12 SOURCE RESISTANCE = 200 IC = 0.5 mA 8 6 SOURCE RESISTANCE = 1.0 k IC = 50 A 4 0 0.1 SOURCE RESISTANCE = 500 IC = 100 A 0.2 0.4 1.0 2.0 f = 1.0 kHz 12 NF, NOISE FIGURE (dB) NF, NOISE FIGURE (dB) 10 2 14 SOURCE RESISTANCE = 200 IC = 1.0 mA IC = 1.0 mA IC = 0.5 mA 10 IC = 50 A 8 IC = 100 A 6 4 2 4.0 10 20 40 0 100 0.1 0.2 0.4 1.0 2.0 4.0 10 20 f, FREQUENCY (kHz) RS, SOURCE RESISTANCE (k OHMS) Figure 9. Figure 10. http://onsemi.com 4 40 100 MMBT3904LT1 h PARAMETERS (VCE = 10 Vdc, f = 1.0 kHz, TA = 25C) 100 hoe, OUTPUT ADMITTANCE ( mhos) h fe , CURRENT GAIN 300 200 100 70 50 30 0.1 0.2 0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5.0 50 20 10 5 2 1 10 0.1 0.2 h re , VOLTAGE FEEDBACK RATIO (X 10 -4 ) h ie , INPUT IMPEDANCE (k OHMS) 20 10 5.0 2.0 1.0 0.5 0.1 0.2 0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5.0 10 5.0 10 Figure 12. Output Admittance Figure 11. Current Gain 0.2 0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) 5.0 10 7.0 5.0 3.0 2.0 1.0 0.7 0.5 10 0.1 0.2 Figure 13. Input Impedance 0.3 0.5 1.0 2.0 3.0 IC, COLLECTOR CURRENT (mA) Figure 14. Voltage Feedback Ratio h FE, DC CURRENT GAIN (NORMALIZED) TYPICAL STATIC CHARACTERISTICS 2.0 TJ = +125C VCE = 1.0 V +25C 1.0 0.7 -55C 0.5 0.3 0.2 0.1 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 IC, COLLECTOR CURRENT (mA) Figure 15. DC Current Gain http://onsemi.com 5 20 30 50 70 100 200 VCE, COLLECTOR EMITTER VOLTAGE (VOLTS) MMBT3904LT1 1.0 TJ = 25C 0.8 IC = 1.0 mA 10 mA 30 mA 100 mA 0.6 0.4 0.2 0 0.01 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 IB, BASE CURRENT (mA) Figure 16. Collector Saturation Region 1.0 TJ = 25C VBE(sat) @ IC/IB =10 V, VOLTAGE (VOLTS) 1.0 0.8 VBE @ VCE =1.0 V 0.6 0.4 VCE(sat) @ IC/IB =10 VC FOR VCE(sat) 0 -55C TO +25C -0.5 -55C TO +25C -1.0 +25C TO +125C VB FOR VBE(sat) -1.5 0.2 0 +25C TO +125C 0.5 COEFFICIENT (mV/ C) 1.2 1.0 2.0 5.0 10 20 50 100 -2.0 200 0 20 40 60 80 100 120 140 160 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 17. "ON" Voltages Figure 18. Temperature Coefficients http://onsemi.com 6 180 200 MMBT3904LT1 INFORMATION FOR USING THE SOT-23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT-23 SOT-23 POWER DISSIPATION SOLDERING PRECAUTIONS The power dissipation of the SOT-23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT-23 package, PD can be calculated as follows: PD = The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C. * The soldering temperature and time shall not exceed 260C for more than 10 seconds. * When shifting from preheating to soldering, the maximum temperature gradient shall be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. TJ(max) - TA RJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150C - 25C 556C/W = 225 milliwatts The 556C/W for the SOT-23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT-23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. http://onsemi.com 7 MMBT3904LT1 PACKAGE DIMENSIONS SOT-23 (TO-236) CASE 318-08 ISSUE AF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 3 1 V B S 2 DIM A B C D G H J K L S V G C D H J K INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 STYLE 6: PIN 1. BASE 2. EMITTER 3. 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