LTC6905
1
6905fd
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
17MHz to 170MHz
Resistor Set SOT-23 Oscillator
The LTC
®
6905 precision, programmable silicon oscilla-
tor is easy to use and occupies very little board space. It
requires only a single resistor to set the output frequency
from 17MHz to 170MHz with a typical frequency error of
0.5% or less.
The LTC6905 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/fall
times and rail-to-rail switching. Operation is simple: A
single resistor, RSET, between 10k to 25k is used to set
the frequency, and an internal three-state divider (DIV
input) allows for division of the master clock by 1, 2 or 4,
providing three frequencies for each RSET value.
The LTC6905 features a proprietary feedback loop that
linearizes the relationship between RSET and frequency,
eliminating the need for tables to calculate frequency. The
oscillator can be easily programmed using the simple
formula outlined below:
fMHz k
RMHz NN Open
OSC
SET
=Ω+
=
=
=
=
+
168 5 10 15 11
2
4
.• .•,
,
,
,
DIV Pin V
DIV Pin
DIV Pin GND
For higher accuracy, fi xed frequency versions that
include an internal frequency-setting resistor, see the
LTC6905-XXX Series data sheet
.
Typcial Distribution of Frequency Error, TA = 25°C
n One External Resistor Sets the Frequency
n Fast Start-Up Time: 100μs Typical
n Frequency Range: 17MHz to 170MHz
n Frequency Error ±0.5% Typ 17MHz to 170MHz
(TA = 0°C to 70°C, Over All Settings)
n ±20ppm/°C Temperature Stability
n Rise Time: 0.5ns, CL = 5pF
n Timing Jitter: 7.2ps RMS at 170MHz
n 50% ±2.5% Duty Cycle
n 6mA Typical Supply Current, fOSC = 100MHz
n CMOS Output Drives 500Ω Load (VS = 3V)
n Operates from a Single 2.7V to 5.5V Supply
n Low Profi le (1mm) ThinSOT
Package
n High Frequency Precision Oscillator
n High Speed Data Bus Clock
n Fixed Crystal Oscillator Replacement
n Ceramic Oscillator Replacement
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6614313, 6342817.
% ERROR
–0.5
0
UNITS
10
20
30
40
50
60
NOTE: RESISTOR, RSET, TOLERANCE WILL ADD
TO THE FREQUENCY ERROR
–0.3 –0.1 0.1 0.3
6905 TA02
0.5
V+ = 3V
RSET = 12k
DIV = 1
V+
1
2
3
5
17.225MHz ≤ fOSC ≤ 170MHz
5V
5V
10k ≤ RSET ≤ 25k
0.1μF
6905 TA01
4
GND
LTC6905
SET
OUT
DIV OPEN
÷2
÷1
÷4
Basic Connection
LTC6905
2
6905fd
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (V+) to GND .........................0.3V to 6V
DIV to GND .................................... 0.3V to (V+ + 0.3V)
SET to GND .................................... 0.3V to (V+ + 0.3V)
Output Short-Circuit Duration (Note 6) ........... Indefi nite
Operating Temperature Range (Note 7)
LTC6905C, I .........................................40°C to 85°C
LTC6905H ..........................................40°C to 125°C
LTC6905MP .......................................55°C to 125°C
Specifi ed Temperature Range (Note 8)
LTC6905C ................................................ 0°C to 70°C
LTC6905I..............................................40°C to 85°C
LTC6905H ..........................................40°C to 125°C
LTC6905MP .......................................55°C to 125°C
Storage Temperature Range ...................65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
(Note 1)
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC SOT-23
1
2
3
V+
GND
SET
5
4
OUT
DIV
TJMAX = 125°C, θJA = 160°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC6905CS5#TRMPBF LTC6905CS5#TRPBF LTBJC 5-Lead Plastic SOT-23 0°C to 70°C
LTC6905IS5#TRMPBF LTC6905IS5#TRPBF LTBJC 5-Lead Plastic SOT-23 40°C to 85°C
LTC6905HS5#TRMPBF LTC6905HS5#TRPBF LTBJC 5-Lead Plastic SOT-23 40°C to 125°C
LTC6905MPS5#TRMPBF LTC6905MPS5#TRPBF LTDVW 5-Lead Plastic SOT-23 55°C to 125°C
LEAD BASED FINISH
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC6905MPS5#TRM LTC6905MPS5#TR LTDVW 5-Lead Plastic SOT-23 55°C to 125°C
TRM = 500 pieces. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi
cations, go to: http://www.linear.com/tapeandreel/
LTC6905
3
6905fd
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full specifi ed
temperature range, otherwise specifi cations are at TA = 25°C or as noted. V+ = 2.7V to 5.5V, RL = 15k, CL = 5pF, Pin 4 = V+ unless
otherwise noted. All voltages are with respect to GND.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Δf Frequency Accuracy (Notes 2, 9) V+ = 2.7V, 17.225MHz < f < 170MHz
V
+ = 5V, 17.225MHz < f < 170MHz
LTC6905CS5
V
+ = 2.7V, 17.225MHz < f < 170MHz
V
+ = 5V, 17.225MHz < f < 170MHz
LTC6905MPS5 (25°C ≤ T ≤ 125°C),
LTC6905HS5 (25°C ≤ T ≤ 125°C),
LTC6905IS5 (25°C ≤ T ≤ 85°C)
V+ = 2.7V, 17.225MHz < f < 170MHz
V+ = 5V, 17.225MHz < f < 170MHz
LTC6905MPS5 (–55°C < T < 125°C),
LTC6905HS5 (–40°C ≤ T ≤ 125°C),
LTC6905IS5 (–40°C ≤ T ≤ 85°C)
V
+ = 2.7V, 17.225MHz < f < 170MHz
V
+ = 5V, 17.225MHz < f < 170MHz
l
l
l
l
±0.5 ±1.4
±2.2
±1.7
±2.5
±1.9
±2.9
±3.5
±3.5
%
%
%
%
%
%
%
%
Δf Frequency Accuracy (Notes 2, 9)
RSET Frequency-Setting Resistor Range 10 25
fMAX Maximum Frequency Pin 4 = V+, N = 1 170 MHz
fMIN Minimum Frequency Pin 4 = 0V, N = 4 17.225 MHz
Δf/ΔT Freq Drift Over Temp (Note 2) RSET = 10k l±20 ppm/°C
Δf/ΔV Freq Drift Over Supply (Notes 2, 9) V+ = 2.7V to 5.5V, RSET = 10k l0.5 %/V
Peak-to-Peak Timing Jitter (Note 3) 0.8 %
Long-Term Stability of Output Frequency 300 ppm/√kHr
Duty Cycle l47.5 50 52.5 %
V+Operating Supply Range l2.7 5.5 V
ISPower Supply Current RSET = 10k, N = 1, RL = ∞,
fOSC = 170MHz, CL = 5pF
V+ = 5.5V
V+ = 2.7V
l
l
14
7
20
12
mA
mA
RSET = 20k, N = 4, RL = ∞,
fOSC = 21.44MHz, CL = 5pF
V+ = 5.5V
V+ = 2.7V
l
l
5
3
7
5
mA
mA
VIH High Level DIV Input Voltage lV+ – 0.15 V
VIL Low Level DIV Input Voltage l0.2 V
IDIV DIV Input Current (Note 4) Pin 4 = V+
Pin 4 = 0V
V+ = 5.5V
V+ = 5.5V
l
–40
15
–11
40 μA
μA
VOH High Level Output Voltage (Note 4) V+ = 5.5V, Pin 4 = 0V IOH = –1mA
I
OH = –4mA
l
l
5.25
5.20
5.45
5.30
V
V
V+ = 2.7V, Pin 4 = 0V IOH = –1mA
I
OH = –4mA
l
l
2.5
2.4
2.6
2.4
V
V
LTC6905
4
6905fd
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Frequency Frequency Error vs RSET Frequency Error vs Supply Voltage
FREQUENCY (MHz)
0
SUPPLY CURRENT (mA)
10
12
14
200
6905 G01
8÷4
÷4
÷1
÷1
6
0
2
50 100 150
4
18
16
5.5V
2.7V
÷2
÷2
RSET (kΩ)
10
FREQUENCY ERROR (%)
0
0.20
0.40
22
6905 G02
–0.20
–0.40
12 14 16 18 20 24
–0.60
–0.80
0.60
SUPPLY VOLTAGE (V)
2.5
–0.40
FREQUENCY ERROR (%)
–0.20
0.20
0.40
0.60
4.5
1.40
6905 G03
0
3.5
35
4 5.5
0.80
1.00
1.20
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOL Low Level Output Voltage (Note 4) V+ = 5.5V, Pin 4 = 0V IOL = 1mA
I
OL = 4mA
l
l
0.05
0.2
0.25
0.3
V
V
V+ = 2.7V, Pin 4 = 0V IOL = 1mA
I
OL = 4mA
l
l
0.1
0.4
0.3
0.5
V
V
tr
, tfOUT Rise/Fall Time (Note 5) 0.5 ns
VSET Voltage at RSET Pin V+ = 5.5V
V+ = 2.7V
l
l
4.27
1.61
4.5
1.7
4.73
1.79
V
V
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full specifi ed
temperature range, otherwise specifi cations are at TA = 25°C or as noted. V+ = 2.7V to 5.5V, RL = 15k, CL = 5pF, Pin 4 = V+ unless
otherwise noted. All voltages are with respect to GND.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Frequency accuracy is defi ned as the deviation from the fOSC
equation. Accuracy is tested with DIV = V+, N = 1 and other divide ratios
are guaranteed by design.
Note 3: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specifi cation is based on characterization and
is not 100% tested.
Note 4: To conform with the Logic IC Standard convention, current out of
a pin is arbitrarily given as a negative value.
Note 5: Output rise and fall times are measured between the 10% and
90% power supply levels.
Note 6: A heat sink may be required to keep the junction temperature
below the absolute maximum when the output is shorted indefi nitely.
Note 7: The LTC6905C is guaranteed functional over the operating
temperature range.
Note 8: The LTC6905C is guaranteed to meet specifi ed performance from
0°C to 70°C. The LTC6905C-XXX is designed, characterized and expected
to meet specifi ed performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LTC6905I-XXX is guaranteed to meet
specifi ed performance from –40°C to 85°C.
Note 9: The LTC6905 is optimized for the performance with a 3V power
supply voltage. Please consult LTC Marketing for parts optimized for 5V
operation.
LTC6905
5
6905fd
PIN FUNCTIONS
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This sup-
ply must be kept free from noise and ripple. It should be
bypassed directly to the GND (Pin 2) with a 0.1μF capaci-
tor or higher.
GND (Pin 2): Ground. Should be tied to a ground plane
for best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V+ deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC6905 to approximately 1V below the V+
voltage. For best performance, use a precision metal fi lm
resistor with a value between 10k and 25k and limit the
capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the value
of N in the frequency equation. Pin 4 should be tied to V+
for the ÷1 setting, the highest frequency range. Floating
Pin 4 divides the master oscillator by 2. Pin 4 should
be tied to GND for the ÷4 setting, the lowest frequency
range. To detect a fl oating DIV pin, the LTC6905 attempts
to pull the pin toward midsupply. This is realized with two
internal current sources, one tied to V+ and Pin 4 and the
other one tied to ground and Pin 4. Therefore, driving
the DIV pin high requires sourcing approximately 15μA.
Likewise, driving DIV low requires sinking 11μA. When
Pin 4 is fl oated, it should be bypassed by a 1nF capacitor
to ground or it should be surrounded by a ground shield
to prevent excessive coupling from other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ
and/or 5pF loads. For larger loads, refer to the Applications
Information section.
TYPICAL PERFORMANCE CHARACTERISTICS
ROUT vs V+Jitter vs Frequency Frequency vs Temperature
LTC6905 Output Operating at
17.5MHz, VS = 3V
LTC6905 Output Operating at
170MHz, VS = 3V
SUPPLY VOLTAGE (V)
2.5
0
OUTPUT RESISTANCE (Ω)
5
15
20
25
4.5
45
6905 G04
10
3.5
35
4 5.5
30
35
40
FREQUENCY (MHz)
0
0
PEAK-TO-PEAK JITTER (%)
0.20
0.60
÷4 ÷2 ÷1
0.80
1.00
40 80 100 180
6905 G05
0.40
20 60 120 140 160
1.20
TEMPERATURE (°C)
–40
–1.0
PERCENTAGE ERROR (%)
–0.8
–0.4
–0.2
0
1.0
0.4
040 60
6905 G08
–0.6
0.6
0.8
0.2
–20 20 80 100 120
1V/DIV
12.5ns/DIV 6905 G06
1V/DIV
1ns/DIV 6905 G07
LTC6905
6
6905fd
BLOCK DIAGRAM
+
+
+
1
3
GAIN = 1
V+
VBIAS IRES
IRES
RSET
SET
GND
MASTER OSCILLATOR
PROGRAMMABLE
DIVIDER
(÷1, 2 OR 4)
VRES = 1V ±5%
(V+ – VSET)
THREE-STATE
INPUT DETECT
GND
V
+
15μA
6905 BD
15μA
OUT
DIVIDER
SELECT
5
DIV 4
2
fOSC = fMO
N
LTC6905
7
6905fd
THEORY OF OPERATION
As shown in the Block Diagram, the LTC6905’s master
oscillator is controlled by the ratio of the voltage between
the V+ and SET pins and the current entering the SET pin
(IRES). The voltage on the SET pin is forced to approxi-
mately 1V below V+ by the PMOS transistor and its gate
bias voltage.
A resistor RSET
, connected between the V+ and SET pins,
“locks together” the voltage (V+ – VSET) and current, IRES,
variation. This provides the LTC6905’s high precision. The
master oscillation frequency reduces to:
fMHz k
RMHz
MO SET
=Ω+
168 5 10 15
.• .
To extend the output frequency range, the master oscillator
signal is divided by 1, 2 or 4 before driving OUT (Pin 5).
The LTC6905 is optimized for use with resistors between
10k and 25k, corresponding to oscillator frequencies
between 17.225MHz and 170MHz. The divide-by value is
determined by the state of the DIV input (Pin 4). Tie DIV to
V+ or drive it to within 0.4V of V+ to select ÷1. This is the
highest frequency range, with the master output frequency
passed directly to OUT. The DIV pin may be fl oated or driven
to midsupply to select ÷2, the intermediate frequency
range. The lowest frequency range, ÷4, is selected by
tying DIV to GND or driving it below 0.5V. Figure 1 shows
the relationship between RSET
, divider setting and output
frequency, including the overlapping frequencies.
OUTPUT FREQUENCY (MHz)
10
RSET (Ω)
15
20
÷4 ÷2 ÷1
6905 F01
10
560 110 160
30
25
Figure 1. RSET vs Output Frequency
LTC6905
8
6905fd
APPLICATIONS INFORMATION
to 90% of the rise or fall transition). If the total output rise
time plus fall time is arbitrarily specifi ed to be equal to
or less than 20% of the oscillators period (1/fOSC), then
the maximum output CLOAD in picofarads (pF) should be
equal to or less than [45454/(ROUT • fOSC)] (ROUT in ohms
and fOSC in MHz).
Example: An LTC6905 is operating with a 3V power supply
and is set for a fOSC = 50MHz.
ROUT with V+ = 3V is 27Ω (using the ROUT vs V+ graph in
the Typical Performance Characteristics).
The maximum output CLOAD should be equal to or less
than [45454/(27 • 50)] = 33.6pF.
The lowest resistive load Pin 5 can drive can be calculated
using the minimum high level output voltage in the Electrical
Characteristics. With a V+ equal to 5.5V and 4mA output
current, the minimum high level output voltage is 5V and
the lowest resistive load Pin 5 can drive is 1.25k (5V/4mA).
With a V+ equal to 2.7V and 4mA output current, the
minimum high level output voltage is 1.9V and the lowest
resistive load Pin 5 can drive is 475Ω (1.9V/4mA).
FREQUENCY ACCURACY AND POWER SUPPLY NOISE
The frequency accuracy of the LTC6905 may be affected
when its power supply generates noise with frequency
contents equal to fMO/64 or its multiples (fMO is the
internal LTC6905 master oscillator frequency before the
divider and fMO/64 is the master oscillator control loop
frequency). If for example, the master oscillator frequency
is set equal to 80MHz and the LTC6905 is powered by a
switching regulator, then the oscillator frequency may
show an additional error if the switching frequency is
1.4MHz (80MHz/64).
JITTER AND POWER SUPPLY NOISE
If the LTC6905 is powered by a supply that has frequency
contents equal to the output frequency then the oscillators
jitter may increase. In addition, power supply ripple in
excess of 20mV at any frequency may increase jitter.
SELECTING THE DIVIDER SETTING AND RESISTOR
The LTC6905’s master oscillator has a frequency range
spanning 68.9MHz to 170MHz. A programmable divider
extends the frequency range from 17.225MHz to 170MHz.
Table 1 describes the recommended frequencies for each
divider setting. Note that the ranges overlap; at some fre-
quencies there are two divider/resistor combinations that
result in the same frequency. Choosing a higher divider
setting will result in less jitter at the expense of slightly
higher supply current.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTING FREQUENCY RANGE
÷1 DIV (Pin 4) = V+68.9MHz to 170MHz
÷2 DIV (Pin 4) = Floating 34.45MHz to 85MHz
÷4 DIV (Pin 4) = GND 17.225MHz to 43MHz
After choosing the proper divider setting, determine the
correct frequency-setting resistor. Because of the linear
correspondence between oscillation period and resistance,
a simple equation relates resistance with frequency.
Rk MHz
fN MHz
N
SET OSC
=
10 168 5
15
1
2
4
.
•–. ,=
(RSETMIN = 10k, RSETMAX = 25k)
Any resistor, RSET
, tolerance adds to the inaccuracy of
the oscillator. fOSC.
START-UP TIME
The start-up time and settling time to within 1% of the
nal frequency is typically 100μs.
MAXIMUM OUTPUT LOAD
The LTC6905 output (Pin 5) can drive a capacitive load
(CLOAD) of 5pF or more. Driving a CLOAD greater than 5pF
depends on the oscillators frequency (fOSC) and output
resistance (ROUT). The output rise time or fall time due to
ROUT and CLOAD is equal to 2.2 • ROUT • CLOAD (from 10%
LTC6905
9
6905fd
APPLICATIONS INFORMATION
JITTER AND DIVIDE RATIO
At a given output frequency, a higher master oscillator
frequency and a higher divide ratio will result in lower
jitter and higher power supply dissipation. Indeterminate
jitter percentage will decrease by a factor of slightly less
than the square root of the divider ratio, while determinate
jitter will not be similarly attenuated. Please consult the
specifi cation tables and Jitter vs Frequency graph showing
jitter at various divider ratios.
JITTER AND STRAY CAPACITANCE ON THE SET PIN
(PIN 3)
The stray capacitance on the SET pin (Pin 3) should be
limited to 10pF or less to avoid increased jitter or unstable
oscillation.
LTC6905 SUGGESTED CRITICAL COMPONENT LAYOUT
In order to provide the specifi ed performance, it is re-
quired that the frequency setting resistor RSET and the
supply bypass capacitor be placed as close as possible
to the LTC6905. The following additional rules should be
followed for best performance:
1) The bypass capacitor must be placed as close as possible
to the LTC6905, and no vias should be placed between
the capacitor and the LTC6905. The bypass capacitor
must be on the same side of the circuit board as the
LTC6905.
2) The resistor RSET should be placed as close as possible
to the LTC6905, and the connection of RSET to VCC
should be closely shared with the bypass capacitor.
The resistor RSET may be placed on the opposite side
of the board from the LTC6905, directly underneath the
bypass capacitor.
3) If a ground plane is used, the connection of the LTC6905
to the ground plane should be as close as possible
to the LTC6905 GND pin and should be composed of
multiple, high current capacity vias.
LTC6905
6905 F02
CR
Figure 2. LTC6905 Suggested Critical Component Layout
LTC6905
10
6905fd
ALTERNATIVE METHODS OF SETTING THE OUTPUT
FREQUENCY OF THE LTC6905
The LTC6905 may be programmed by any method that
sources a current into the SET pin (Pin 3). The accuracy
of the programming is best with a simple resistor because
the LTC6905 takes into account both the voltage at the SET
pin and the current into the SET pin when generating the
output frequency. Since the voltage at the SET pin can
vary by as much as 5%, setting the frequency using a
current rather than a resistor will result in as much as 5%
additional inaccuracy in the output frequency.
APPLICATIONS INFORMATION
Figure 3 shows a method to control the frequency of the
LTC6905 using a current source. RSET
, in this case, sets a
maximum frequency according to the regular expression
for fOSC. The current source will subtract current from the
SET pin to lower the frequency.
Figure 4 shows a method for controlling the frequency
of the LTC6905 using a voltage source. In this case, RSET
sets a constant current into the SET pin, and RCNTRL will
subtract from this current in order to change the frequency.
Increasing VCNTRL will increase the output frequency.
fN
MHz k VV
RI
OSC
SET
SET CNTRL
=
Ω
+
1168 5 10.•
+
+
VV MHz
SET
.15
ICNTRL Frequency ≤ 100kHz
Example (Figure 3): VSET = (V+ – 1V), RSET = 10k, N = 1
f
OSC = [168.5MHz • (1 – 10kΩ • ICNTRL) + 1.5MHz
fN
MHz k VV
R
VV
OSC
SET
SET
SET CNTR
=
Ω
+
1168 5 10.•
LL
CNTRL
SET
R
VV MHz
+
+.15
VCNTRL Frequency ≤ 100kHz
Example (Figure 4): VSET = (V+ – 1V), RSET = 10k, RCNTRL = 33.2k,
N = 1, V+ = 3V
fMHzk
k
VV
k
OSC CNTRL
=ΩΩΩ
168 5 10 1
10
2
33 2
.•
.
+
15.MHz
V+
1
2
3
5
fOSC
69.8MHz TO 170MHz
V+
0.1μF
ICNTRL
0μA TO 60μA
RSET
10k
6905 F03
4
GND
V+
N = 1
LTC6905
SET
OUT
DIV
Figure 3. Current Controlled Oscillator
V+
1
2
3
5
V+= 3V
0.1μF
RSET
10k
VCNTRL
0V TO 2V
6905 F04
4
GND
V+
N = 1
LTC6905
SET
OUT
DIV
+
RCNTRL
33.2k
fOSC
69.8MHz TO 170MHz
Figure 4. Voltage Controlled Oscillator
LTC6905
11
6905fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3) S5 TSOT-23 0302
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
LTC6905
12
6905fd
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
LT 0808 REV D • PRINTED IN USA
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