LTC6905
8
6905fd
APPLICATIONS INFORMATION
to 90% of the rise or fall transition). If the total output rise
time plus fall time is arbitrarily specifi ed to be equal to
or less than 20% of the oscillator’s period (1/fOSC), then
the maximum output CLOAD in picofarads (pF) should be
equal to or less than [45454/(ROUT • fOSC)] (ROUT in ohms
and fOSC in MHz).
Example: An LTC6905 is operating with a 3V power supply
and is set for a fOSC = 50MHz.
ROUT with V+ = 3V is 27Ω (using the ROUT vs V+ graph in
the Typical Performance Characteristics).
The maximum output CLOAD should be equal to or less
than [45454/(27 • 50)] = 33.6pF.
The lowest resistive load Pin 5 can drive can be calculated
using the minimum high level output voltage in the Electrical
Characteristics. With a V+ equal to 5.5V and 4mA output
current, the minimum high level output voltage is 5V and
the lowest resistive load Pin 5 can drive is 1.25k (5V/4mA).
With a V+ equal to 2.7V and 4mA output current, the
minimum high level output voltage is 1.9V and the lowest
resistive load Pin 5 can drive is 475Ω (1.9V/4mA).
FREQUENCY ACCURACY AND POWER SUPPLY NOISE
The frequency accuracy of the LTC6905 may be affected
when its power supply generates noise with frequency
contents equal to fMO/64 or its multiples (fMO is the
internal LTC6905 master oscillator frequency before the
divider and fMO/64 is the master oscillator control loop
frequency). If for example, the master oscillator frequency
is set equal to 80MHz and the LTC6905 is powered by a
switching regulator, then the oscillator frequency may
show an additional error if the switching frequency is
1.4MHz (80MHz/64).
JITTER AND POWER SUPPLY NOISE
If the LTC6905 is powered by a supply that has frequency
contents equal to the output frequency then the oscillators
jitter may increase. In addition, power supply ripple in
excess of 20mV at any frequency may increase jitter.
SELECTING THE DIVIDER SETTING AND RESISTOR
The LTC6905’s master oscillator has a frequency range
spanning 68.9MHz to 170MHz. A programmable divider
extends the frequency range from 17.225MHz to 170MHz.
Table 1 describes the recommended frequencies for each
divider setting. Note that the ranges overlap; at some fre-
quencies there are two divider/resistor combinations that
result in the same frequency. Choosing a higher divider
setting will result in less jitter at the expense of slightly
higher supply current.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTING FREQUENCY RANGE
÷1 ⇒ DIV (Pin 4) = V+68.9MHz to 170MHz
÷2 ⇒ DIV (Pin 4) = Floating 34.45MHz to 85MHz
÷4 ⇒ DIV (Pin 4) = GND 17.225MHz to 43MHz
After choosing the proper divider setting, determine the
correct frequency-setting resistor. Because of the linear
correspondence between oscillation period and resistance,
a simple equation relates resistance with frequency.
Rk MHz
fN MHz
N
SET OSC
=⎛
⎝
⎜
⎞
⎠
⎟
⎧
10 168 5
15
1
2
4
•.
•–. ,=
⎨⎨
⎪
⎩
⎪
(RSETMIN = 10k, RSETMAX = 25k)
Any resistor, RSET
, tolerance adds to the inaccuracy of
the oscillator. fOSC.
START-UP TIME
The start-up time and settling time to within 1% of the
fi nal frequency is typically 100μs.
MAXIMUM OUTPUT LOAD
The LTC6905 output (Pin 5) can drive a capacitive load
(CLOAD) of 5pF or more. Driving a CLOAD greater than 5pF
depends on the oscillator’s frequency (fOSC) and output
resistance (ROUT). The output rise time or fall time due to
ROUT and CLOAD is equal to 2.2 • ROUT • CLOAD (from 10%