LM5111
Dual 5A Compound Gate Driver
General Description
The LM5111 Dual Gate Driver replaces industry standard
gate drivers with improved peak output current and effi-
ciency. Each “compound” output driver stage includes MOS
and bipolar transistors operating in parallel that together sink
more than 5A peak from capacitive loads. Combining the
unique characteristics of MOS and bipolar devices reduces
drive current variation with voltage and temperature. Under-
voltage lockout protection is also provided. The drivers can
be operated in parallel with inputs and outputs connected to
double the drive current capability. This device is available in
the SOIC-8 package or the thermally enhanced MSOP8-EP
package.
Features
nIndependently drives two N-Channel MOSFETs
nCompound CMOS and bipolar outputs reduce output
current variation
n5A sink/3A source current capability
nTwo channels can be connected in parallel to double the
drive current
nIndependent inputs (TTL compatible)
nFast propagation times (25 ns typical)
nFast rise and fall times (14 ns/12 ns rise/fall with 2 nF
load)
nAvailable in dual non-inverting, dual inverting and
combination configurations
nSupply rail under-voltage lockout protection
nPin compatible with industry standard gate drivers
Typical Applications
nSynchronous Rectifier Gate Drivers
nSwitch-mode Power Supply Gate Driver
nSolenoid and Motor Drivers
Packages
nSOIC-8
nThermally Enhanced MSOP8-EP
Connection Diagram
20112301
SOIC-8, eMSOP-8
March 2006
LM5111 Dual 5A Compound Gate Driver
© 2006 National Semiconductor Corporation DS201123 www.national.com
Ordering Information
Order Number Package Type NSC Package Drawing Supplied As
LM5111-1M SOIC-8 M08A Shipped in anti-static units, 95
Units/Rail
LM5111-1MX SOIC-8 M08A 2500 shipped in Tape & Reel
LM5111-2M SOIC-8 M08A Shipped in anti-static units, 95
Units/Rail
LM5111-2MX SOIC-8 M08A 2500 shipped in Tape & Reel
LM5111-3M SOIC-8 M08A Shipped in anti-static units, 95
Units/Rail
LM5111-3MX SOIC-8 M08A 2500 shipped in Tape & Reel
LM5111-1MY MSOP8-EP MUY08A 1000 shipped in Tape & Reel
LM5111-1MYX MSOP8-EP MUY08A 3500 shipped in Tape & Reel
LM5111-2MY MSOP8-EP MUY08A 1000 shipped in Tape & Reel
LM5111-2MYX MSOP8-EP MUY08A 3500 shipped in Tape & Reel
LM5111-3MY MSOP8-EP MUY08A 1000 shipped in Tape & Reel
LM5111-3MYX MSOP8-EP MUY08A 3000 shipped in Tape & Reel
Pin Descriptions
Pin Name Description Application Information
1 NC No Connect
2 IN_A ‘A’ side control input TTL compatible thresholds.
3 VEE Ground reference for both inputs
and outputs
Connect to power ground.
4 IN_B ‘B’ side control input TTL compatible thresholds.
5 OUT_B Output for the ‘B’ side driver. Voltage swing of this output is from VCC to VEE.
The output stage is capable of sourcing 3A and
sinking 5A.
6 VCC Positive output supply Locally decouple to VEE
.
7 OUT_A. Output for the ‘A’ side driver. Voltage swing of this output is from VCC to VEE.
The output stage is capable of sourcing 3A and
sinking 5A.
8 NC No Connect
Configuration Table
Part Number “A” Output Configuration “B” Output Configuration Package
LM5111-1M/-1MX/-1MY/-1MYX Non-Inverting Non-Inverting SOIC-8, MSOP8-EP
LM5111-2M/-2MX/-2MY/-2MYX Inverting Inverting SOIC-8, MSOP8-EP
LM5111-3M/-3MX/-3MY/-3MYX Inverting Non-Inverting SOIC-8, MSOP8-EP
LM5111
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
CC
to V
EE
−0.3V to 15V
IN to V
EE
−0.3V to 15V
Storage Temperature Range, (T
STG
) −55˚C to +150˚C
Maximum Junction Temperature,
(T
J
(max)) +150˚C
Operating Junction Temperature +125˚C
ESD Rating 2kV
Electrical Characteristics
T
J
= −40˚C to +125˚C, V
CC
= 12V, V
EE
= 0V, No Load on OUT_A or OUT_B, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Units
V
CC
Operating Range V
CC
−V
EE
3.5 14 V
V
CCR
V
CC
Under Voltage Lockout
(rising)
V
CC
−V
EE
2.3 2.9 3.5 V
V
CCH
V
CC
Under Voltage Lockout
Hysteresis 230 mV
I
CC
V
CC
Supply Current (I
CC
) IN_A = IN_B = 0V (5111-1) 1 2
mAIN_A = IN_B = V
CC
(5111-2) 1 2
IN_A = V
CC
, IN_B = 0V (5111-3) 1 2
CONTROL INPUTS
V
IH
Logic High 2.2 V
V
IL
Logic Low 0.8 V
V
thH
High Threshold 1.3 1.75 2.2 V
V
thL
Low Threshold 0.8 1.35 2.0 V
HYS Input Hysteresis 400 mV
I
IL
Input Current Low IN_A=IN_B=V
CC
(5111-1-2-3) −1 0.1 1
µA
I
IH
Input Current High IN_B=V
CC
(5111-3) 10 18 25
IN_A=IN_B=V
CC
(5111-2) −1 0.1 1
IN_A=IN_B=V
CC
(5111-1) 10 18 25
IN_A=V
CC
(5111-3) -1 0.1 1
OUTPUT DRIVERS
R
OH
Output Resistance High I
OUT
= −10 mA (Note 2) 30 50 Ω
R
OL
Output Resistance Low I
OUT
= + 10 mA (Note 2) 1.4 2.5 Ω
I
Source
Peak Source Current OUTA/OUTB = V
CC
/2,
200 ns Pulsed Current 3A
I
Sink
Peak Sink Current OUTA/OUTB = V
CC
/2,
200 ns Pulsed Current 5A
LM5111
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Electrical Characteristics (Continued)
T
J
= −40˚C to +125˚C, V
CC
= 12V, V
EE
= 0V, No Load on OUT_A or OUT_B, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Units
SWITCHING CHARACTERISTICS
td1 Propagation Delay Time Low to
High, IN rising (IN to OUT)
C
LOAD
= 2 nF, see Figure 1 25 40 ns
td2 Propagation Delay Time High to
Low, IN falling (IN to OUT)
C
LOAD
= 2 nF, see Figure 1 25 40 ns
t
r
Rise Time C
LOAD
= 2 nF, see Figure 1 14 25 ns
t
f
Fall Time C
LOAD
= 2 nF, see Figure 1 12 25 ns
LATCHUP PROTECTION
AEC - Q100, Method 004 T
J
= 150˚C 500 mA
THERMAL RESISTANCE
θ
JA
Junction to Ambient,
0 LFPM Air Flow
SOIC-8 Package
MSOP8-EP Package
170
60 ˚C/W
θ
JC
Junction to Case SOIC-8 Package
MSOP8-EP Package
70
4.7 ˚C/W
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The output resistance specification applies to the MOS device only. The total output current capability is the sum of the MOS and Bipolar devices.
Timing Waveforms
20112305
(a)
20112306
(b)
FIGURE 1. (a) Inverting, (b) Non-Inverting
LM5111
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Typical Performance Characteristics
Supply Current vs Frequency Supply Current vs Capacitive Load
20112310 20112311
Rise and Fall Time vs Supply Voltage Rise and Fall Time vs Temperature
20112312 20112313
Rise and Fall Time vs Capacitive Load Delay Time vs Supply Voltage
20112314 20112315
LM5111
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Typical Performance Characteristics (Continued)
Delay Time vs Temperature RDSON vs Supply Voltage
20112316 20112317
UVLO Thresholds and Hysteresis vs Temperature
20112318
LM5111
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Block Diagram
20112303
Block Diagram of LM5111
LM5111
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Detailed Operating Description
LM5111 dual gate driver consists of two independent and
identical driver channels with TTL compatible logic inputs
and high current totem-pole outputs that source or sink
current to drive MOSFET gates. The driver output consist of
a compound structure with MOS and bipolar transistor oper-
ating in parallel to optimize current capability over a wide
output voltage and operating temperature range. The bipolar
device provides high peak current at the critical threshold
region of the MOSFET VGS while the MOS devices provide
rail-to-rail output swing. The totem pole output drives the
MOSFET gate between the gate drive supply voltage V
CC
and the power ground potential at the V
EE
pin.
The control inputs of the drivers are high impedance CMOS
buffers with TTL compatible threshold voltages. The LM5111
pinout was designed for compatibility with industry standard
gate drivers in single supply gate driver applications.
The input stage of each driver should be driven by a signal
with a short rise and fall time. Slow rising and falling input
signals, although not harmful to the driver, may result in the
output switching repeatedly at a high frequency.
The two driver channels of the LM5111 are designed as
identical cells. Transistor matching inherent to integrated
circuit manufacturing ensures that the AC and DC pe-
formance of the channels are nearly identical. Closely
matched propagation delays allow the dual driver to be
operated as a single with inputs and output pins connected.
The drive current capability in parallel operation is precisely
2X the drive of an individual channel. Small differences in
switching speed between the driver channels will produce a
transient current (shoot-through) in the output stage when
two output pins are connected to drive a single load. Differ-
ences in input thresholds between the driver channels will
also produce a transient current (shoot-through) in the out-
put stage. Fast transition input signals are especially impor-
tant while operating in a parallel configuration. The efficiency
loss for parallel operation has been characterized at various
loads, supply voltages and operating frequencies. The
power dissipation in the LM5111 increases be less than 1%
relative to the dual driver configuration when operated as a
single driver with inputs/ outputs connected.
An Under Voltage Lock Out (UVLO) circuit is included in the
LM5111 , which senses the voltage difference between V
CC
and the chip ground pin, V
EE
. When the V
CC
to V
EE
voltage
difference falls below 2.8V both driver channels are disabled.
The UVLO hysteresis prevents chattering during brown-out
conditions and the driver will resume normal operation when
the V
CC
to V
EE
differential voltage exceeds approximately
3.0V.
The LM5111 is available in dual non-inverting (-1), dual
Inverting (-2) and the combination inverting plus non-
inverting (-3) configurations. All three configurations are of-
fered in the SOIC-8 plastic package.
Layout Considerations
Attention must be given to board layout when using LM5111.
Some important considerations include:
1. A Low ESR/ESL capacitor must be connected close to
the IC and between the V
CC
and V
EE
pins to support
high peak currents being drawn from V
CC
during turn-on
of the MOSFET.
2. Proper grounding is crucial. The drivers need a very low
impedance path for current return to ground avoiding
inductive loops. The two paths for returning current to
ground are a) between LM5111 V
EE
pin and the ground
of the circuit that controls the driver inputs, b) between
LM5111 V
EE
pin and the source of the power MOSFET
being driven. All these paths should be as short as
possible to reduce inductance and be as wide as pos-
sible to reduce resistance. All these ground paths should
be kept distinctly separate to avoid coupling between the
high current output paths and the logic signals that drive
the LM5111. A good method is to dedicate one copper
plane in a multi-layered PCB to provide a common
ground surface.
3. With the rise and fall times in the range of 10 ns to 30 ns,
care is required to minimize the lengths of current car-
rying conductors to reduce their inductance and EMI
from the high di/dt transients generated by the LM5111.
4. The LM5111 footprint is compatible with other industry
standard drivers including the TC4426/27/28 and
UCC27323/4/5.
5. If either channel is not being used, the respective input
pin (IN_A or IN_B) should be connected to either V
EE
or
V
CC
to avoid spurious output signals.
Thermal Performance
INTRODUCTION
The primary goal of thermal management is to maintain the
integrated circuit (IC) junction temperature (T
J
) below a
specified maximum operating temperature to ensure reliabil-
ity. It is essential to estimate the maximum T
J
of IC compo-
nents in worst case operating conditions. The junction tem-
perature is estimated based on the power dissipated in the
IC and the junction to ambient thermal resistance θ
JA
for the
IC package in the application board and environment. The
θ
JA
is not a given constant for the package and depends on
the printed circuit board design and the operating environ-
ment.
DRIVE POWER REQUIREMENT CALCULATIONS IN
LM5111
The LM5111 dual low side MOSFET driver is capable of
sourcing/sinking 3A/5A peak currents for short intervals to
drive a MOSFET without exceeding package power dissipa-
tion limits. High peak currents are required to switch the
MOSFET gate very quickly for operation at high frequencies.
The schematic above shows a conceptual diagram of the
LM5111 output and MOSFET load. Q1 and Q2 are the
switches within the gate driver. R
G
is the gate resistance of
20112307
FIGURE 2.
LM5111
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Thermal Performance (Continued)
the external MOSFET, and C
IN
is the equivalent gate capaci-
tance of the MOSFET. The gate resistance Rg is usually very
small and losses in it can be neglected. The equivalent gate
capacitance is a difficult parameter to measure since it is the
combination of C
GS
(gate to source capacitance) and C
GD
(gate to drain capacitance). Both of these MOSFET capaci-
tances are not constants and vary with the gate and drain
voltage. The better way of quantifying gate capacitance is
the total gate charge Q
G
in coloumbs. Q
G
combines the
charge required by C
GS
and C
GD
for a given gate drive
voltage V
GATE
.
Assuming negligible gate resistance, the total power dissi-
pated in the MOSFET driver due to gate charge is approxi-
mated by
P
DRIVER
=V
GATE
xQ
G
xF
SW
Where
F
SW
= switching frequency of the MOSFET.
For example, consider the MOSFET MTD6N15 whose gate
charge specified as 30 nC for V
GATE
= 12V.
The power dissipation in the driver due to charging and
discharging of MOSFET gate capacitances at switching fre-
quency of 300 kHz and V
GATE
of 12V is equal to
P
DRIVER
= 12V x 30 nC x 300 kHz = 0.108W.
If both channels of the LM5111 are operating at equal fre-
quency with equivalent loads, the total losses will be twice as
this value which is 0.216W.
In addition to the above gate charge power dissipation, -
transient power is dissipated in the driver during output
transitions. When either output of the LM5111 changes state,
current will flow from V
CC
to V
EE
for a very brief interval of
time through the output totem-pole N and P channel
MOSFETs. The final component of power dissipation in the
driver is the power associated with the quiescent bias cur-
rent consumed by the driver input stage and Under-voltage
lockout sections.
Characterization of the LM5111 provides accurate estimates
of the transient and quiescent power dissipation compo-
nents. At 300 kHz switching frequency and 30 nC load used
in the example, the transient power will be 8 mW. The 1 mA
nominal quiescent current and 12V V
GATE
supply produce a
12 mW typical quiescent power.
Therefore the total power dissipation
P
D
= 0.216 + 0.008 + 0.012 = 0.236W.
We know that the junction temperature is given by
T
J
=P
D
xθ
JA
+T
A
Or the rise in temperature is given by
T
RISE
=T
J
−T
A
=P
D
xθ
JA
For SOIC-8 package θ
JA
is estimated as 170˚C/W for the
conditions of natural convection. For MSOP8-EP θ
JA
is typi-
cally 60˚C/W.
Therefore for SOIC T
RISE
is equal to
T
RISE
= 0.236 x 170 = 40.1˚C
CONTINUOUS CURRENT RATING OF LM5111
The LM5111 can deliver pulsed source/sink currents of 3A
and 5A to capacitive loads. In applications requiring continu-
ous load current (resistive or inductive loads), package
power dissipation, limits the LM5111 current capability far
below the 5A sink/3A source capability. Rated continuous
current can be estimated both when sourcing current to or
sinking current from the load. For example when sinking, the
maximum sink current can be calculated as:
where R
DS
(on) is the on resistance of lower MOSFET in the
output stage of LM5111.
Consider T
J
(max) of 125˚C and θ
JA
of 170˚C/W for an SO-8
package under the condition of natural convection and no air
flow. If the ambient temperature (T
A
) is 60˚C, and the R
D-
S
(on) of the LM5111 output at T
J
(max) is 2.5Ω, this equation
yields I
SINK
(max) of 391mA which is much smaller than 5A
peak pulsed currents.
Similarly, the maximum continuous source current can be
calculated as
where V
DIODE
is the voltage drop across hybrid output stage
which varies over temperature and can be assumed to be
about 1.1V at T
J
(max) of 125˚C. Assuming the same param-
eters as above, this equation yields I
SOURCE
(max) of 347mA.
LM5111
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Physical Dimensions inches (millimeters) unless otherwise noted
NOTES: UNLESS OTHERWISE SPECIFIED
1. STANDARD LEAD FINISH TO BE 200 MICROINCHES/5.08 MICROMETERS MINIMUM LEAD/TIN(SOLDER) ON
COPPER.
2. DIMENSION DOES NOT INCLUDE MOLD FLASH.
3. REFERENCE JEDEC REGISTRATION MS-012, VARIATION AA, DATED MAY 1990.
8-Lead SOIC Package
NS Package Number M08A
LM5111
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead Exposed Pad MSOP Package
NS Package Number MUY08A
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the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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LM5111 Dual 5A Compound Gate Driver
