INTEGRATED CIRCUITS DATA SHEET 74LVC541A Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) Product specification Supersedes data of 2003 May 14 2003 Nov 12 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A FEATURES DESCRIPTION * 5 V tolerant inputs/outputs; for interfacing with 5 V logic The 74LVC541A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. * Wide supply voltage range from 2.7 to 3.6 V * CMOS low-power consumption This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. * Direct interface with TTL levels * Complies with JEDEC standard no. 8-1A * ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 and 5 V environment. The 74LVC541A is an octal non-inverting buffer/line driver with 5 V tolerant inputs/outputs. The 3-state outputs are controlled by the output enable inputs OE1and OE2. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL PARAMETER tPHL/tPLH propagation delay An to Yn CI input capacitance CPD power dissipation capacitance per buffer CONDITIONS CL = 50 pF; VCC = 3.3 V VCC = 3.3 V; notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL x VCC2 x fo) = sum of the outputs. 2. The condition is VI = GND to VCC. 2003 Nov 12 2 TYPICAL UNIT 3.3 ns 5.0 pF 20 pF Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A FUNCTION TABLE See note 1. INPUT OUTPUT OE1 OE2 An Yn L L L L L L H H X H X Z H X X Z Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74LVC541AD -40 to +125 C 20 SO20 plastic SOT163-1 74LVC541ADB -40 to +125 C 20 SSOP20 plastic SOT339-1 74LVC541APW -40 to +125 C 20 TSSOP20 plastic SOT360-1 74LVC541ABQ -40 to +125 C 20 DHVQFN20 plastic SOT764-1 PINNING PIN PIN SYMBOL DESCRIPTION SYMBOL DESCRIPTION 11 Y7 bus output 1 OE1 output enable input (active LOW) 12 Y6 bus output 13 Y5 bus output 2 A0 data input 14 Y4 bus output 3 A1 data input 15 Y3 bus output 4 A2 data input 16 Y2 bus output 5 A3 data input 17 Y1 bus output 6 A4 data input 18 Y0 bus output 7 A5 data input 19 OE2 8 A6 data input output enable input (active LOW) 20 VCC supply voltage 9 A7 data input 10 GND ground (0 V) 2003 Nov 12 3 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A handbook, halfpage handbook, halfpage VCC 1 20 A0 2 19 OE2 A1 3 18 Y0 18 Y0 A2 4 17 Y1 17 Y1 A3 5 16 Y2 OE1 1 20 VCC A0 2 19 OE2 A1 3 A2 4 GND(1) 16 Y2 A3 5 OE1 A4 6 15 Y3 14 Y4 A5 7 14 Y4 A6 8 13 Y5 A6 8 13 Y5 A7 9 12 Y6 A7 9 12 Y6 GND 10 11 Y7 541 A4 6 15 Y3 A5 7 MNA897 Top view 10 11 GND Y7 MDB202 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration SO20 and (T)SSOP20. handbook, halfpage 1 Fig.2 Pin configuration DHVQFN20. & EN 19 2 18 3 17 4 16 5 15 6 14 7 13 8 12 9 11 MNA898 Fig.3 Logic Symbol (IEEE/IEC). 2003 Nov 12 4 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A handbook, halfpage 2 3 4 5 6 7 8 9 A0 Y0 A1 Y1 A2 Y2 A3 Y3 A4 Y4 A5 Y5 A6 Y6 A7 Y7 handbook, halfpage 18 2 17 3 16 4 15 5 14 6 13 7 12 8 11 9 OE1 Y0 A1 Y1 A2 Y2 A3 Y3 A4 Y4 A5 Y5 A6 Y6 A7 Y7 18 17 16 15 14 13 12 11 OE1 1 19 A0 1 OE2 19 OE2 MNA900 MNA899 Fig.4 Logic symbol. 2003 Nov 12 Fig.5 Functional diagram. 5 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER supply voltage VI input voltage VO output voltage Tamb operating ambient temperature tr, tf input rise and fall times CONDITIONS MIN. MAX. UNIT for maximum speed performance 2.7 3.6 V for low-voltage applications 1.2 3.6 V 0 5.5 V output HIGH or LOW state 0 VCC V output 3-state 0 5.5 V in free air -40 +125 C VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage -0.5 +6.5 V IIK input diode current VI < 0 - -50 mA VI input voltage note 1 -0.5 +5.5 V IOK output diode current VO > VCC or VO < 0 - 50 mA VO output voltage output HIGH or LOW state; note 1 -0.5 VCC + 0.5 V output 3-state or power down; note 1 -0.5 +6.5 V IO output diode source or sink current VO = 0 to VCC - 50 mA ICC, IGND VCC or GND current - 100 mA Tstg storage temperature -60 +150 C Ptot power dissipation - 500 mW Tamb = -40 to +125 C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K. For (T)SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN20 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K. 2003 Nov 12 6 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = -40 to +85 C HIGH-level input voltage 1.2 VCC - - V 2.7 to 3.6 2.0 - - V VIL LOW-level input voltage 1.2 - - 0 V 2.7 to 3.6 - - 0.8 V VOH HIGH-level output voltage IO = -100 A 2.7 to 3.6 VCC - 0.2 VCC - V VIH VOL LOW-level output voltage VI = VIH or VIL IO = -12 mA 2.7 VCC - 0.5 - - V IO = -18 mA 3.0 VCC - 0.6 - - V IO = -24 mA 3.0 VCC - 0.8 - - V IO = 100 A 2.7 to 3.6 - 0 0.2 V IO = 12 mA 2.7 - - 0.4 V IO = 24 mA 3.0 - - 0.55 V VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND 3.6 - 0.1 5 A IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND 3.6 - 0.1 5 A Ioff power-off leakage supply VI or VO = 5.5 V 0.0 - 0.1 10 A ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 - 0.1 10 A ICC additional quiescent supply current per pin VI = VCC - 0.6 V; IO = 0 2.7 to 3.6 - 5 500 A 2003 Nov 12 7 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = -40 to +125 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage 1.2 VCC - - V 2.7 to 3.6 2.0 - - V 1.2 - - 0 V 2.7 to 3.6 - - 0.8 V VI = VIH or VIL IO = -100 A 2.7 to 3.6 VCC - 0.3 - - V IO = -12 mA 2.7 VCC - 0.65 - - V IO = -18 mA 3.0 VCC - 0.75 - - V IO = -24 mA 3.0 VCC - 1 - - V IO = 100 A 2.7 to 3.6 - - 0.3 V IO = 12 mA 2.7 - - 0.6 V IO = 24 mA 3.0 - - 0.8 V VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND 3.6 - - 20 A IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND 3.6 - - 20 A Ioff power-off leakage supply VI or VO = 5.5 V 0.0 - - 20 A ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 - - 40 A ICC additional quiescent supply current per pin VI = VCC - 0.6 V; IO = 0 2.7 to 3.6 - - 5000 A Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 C. 2003 Nov 12 8 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A AC CHARACTERISTICS GND = 0 V; tr = tf 2.5 ns; CL = 50 pF. TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP.(1) MAX. UNIT VCC (V) Tamb = -40 to +85 C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay An to Yn 3-state output enable time OEn to Yn 3-state output disable time OEn to Yn - 14 2.7 1.5 3.9 5.6 ns 3.0 to 3.6 1.0 3.3(2) 5.1 ns - 20 - ns 2.7 1.5 5.2 7.5 ns 3.0 to 3.6 1.0 4.4(2) 7.0 ns - 11 - ns 2.7 1.5 4.3 7.0 ns 3.0 to 3.6 1.0 3.8(2) 6.0 ns see Figs 6 and 8 1.2 see Figs 7 and 8 1.2 see Figs 7 and 8 1.2 - ns Tamb = -40 to +125 C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay An to Yn 3-state output enable time OEn to Yn 3-state output disable time OEn to Yn - - ns 1.5 - 7.0 ns 3.0 to 3.6 1.0 - 6.5 ns - - - ns 2.7 1.5 - 9.5 ns 3.0 to 3.6 1.0 - 9.0 ns - - - ns 2.7 1.5 - 9.0 ns 3.0 to 3.6 1.0 - 7.5 ns see Figs 7 and 8 1.2 see Figs 7 and 8 1.2 Notes 1. All typical values are measured Tamb = 25 C. 2. These typical values are measured at VCC = 3.3 V. 2003 Nov 12 - 2.7 see Figs 6 and 8 1.2 9 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A AC WAVEFORMS handbook, halfpage VI VM An input GND tPLH tPHL VOH VM Yn output VOL MNA901 INPUT VCC VM VI tr = tf 1.2 V 0.5 x VCC VCC 2.5 ns 2.7 V 1.5 V 2.7 V 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 Input (An) to output (YN) propagation delays. VI handbook, full pagewidth OEn input VM GND t PLZ t PZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL t PZH t PHZ VOH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled MNA902 VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.1 V at VCC < 2.7 V; INPUT VCC VM VI VY = VOH - 0.3 V at VCC 2.7 V; VY = VOH - 0.1 V at VCC < 2.7 V. tr = tf 1.2 V 0.5 x VCC VCC 2.5 ns 2.7 V 1.5 V 2.7 V 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 3-state enable and disable times. 2003 Nov 12 10 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A VEXT handbook, full pagewidth VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL MNA616 VCC VI CL RL (1) VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ 1.2 V VCC 50 pF 500 open GND 2 x VCC 2.7 V 2.7 V 50 pF 500 open GND 2 x VCC 3.0 to 3.6 V 2.7 V 50 pF 500 open GND 2 x VCC Note 1. The circuit performs better when RL = 1000 . Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.8 Load circuitry for switching times. 2003 Nov 12 11 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A PACKAGE OUTLINES SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.1 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 2003 Nov 12 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 12 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index Lp L 1 10 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 0o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 2003 Nov 12 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 13 o Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 2003 Nov 12 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 14 o Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 0.5 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- 2003 Nov 12 15 EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Philips Semiconductors Product specification Octal buffer/line driver with 5 V tolerant inputs/outputs (3-state) 74LVC541A DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Nov 12 16 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. SCA75 (c) Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/03/pp17 Date of release: 2003 Nov 12 Document order number: 9397 750 12259