2012 Microchip Technology Inc. DS41672A-page 1
MTCH810
Description:
The MTCH810 provides an easy way to add Haptic
feedback to any button/sliders capacitive touch inter-
face. The device integrates a single-channel Haptic
driver output with an industry standard I2C™ slave
interface to create a simple Haptic feedback peripheral.
Features:
Internal Library of Effects:
- 14 Haptic effect commands
- Firmware revision query command
- Abort Playback command
•I
2C Control Interface:
- 7-bit Addressing mode (address = 0x10)
- Supports 100 kHz and 400 kHz transfer rate
Wide Operating Voltage: 2.3V-5.5V
Minimal Number of External Components
Low-Power Consumption when Idle
Operating Temperature: -40˚C to +85˚C
Package Type:
The device is only offered in an 8-pin 3x3 DFN package
(see Figure 1).
FIGURE 1: 8-PIN DFN DIAGRAM
FOR MTCH810
Pin Description:
DR1
This is the non-inverting PWM Haptics drive output. It
should be connected to the non-inverting input of a
Haptic driver circuit designed for Eccentric Rotating
Mass Actuators (ERMs).
DR2
It should be connected to the inverting input of a Haptic
driver circuit designed for ERM Actuators.
SDA
This pin is the serial data connection of the I2C
interface. It should be connected to the I2C master SDA
signal with a pull-up resistor to VDD.
SCL
This pin is the serial clock connection of the I2C
interface. It should be connected to the I2C master SCL
signal with a pull-up resistor to VDD.
DR1
NC
VDD
DR2 NC
SDA
SCL
1
2
3
4 5
6
8
3x3 DFN
MTCH810
VSS
7
TABLE 1: 8-PIN DFN PINOUT
DESCRIPTION
Name 8-Pin DFN Description
VDD 1 Power supply input
DR2 2 Drive output 2
DR1 3 Drive output 1
NC 4 No connection
SDA 5 I2C™ Data
SCL 6 I2C™ Clock
NC 7 No connection
VSS 8 Ground
Haptics Controller
MTCH810
DS41672A-page 2 2012 Microchip Technology Inc.
Table of Contents
1.0 Device Overview ........................................................................................................................................................................ 3
2.0 I2C™ Serial Interface................................................................................................................................................................. 7
3.0 Electrical Characteristics.......................................................................................................................................................... 13
4.0 Packaging Information ............................................................................................................................................................. 20
Index ............................................................................................................ ........................................................................................25
The Microchip Web Site ....................................................................................................................................................................... 26
Customer Change Notification Service ................................................................................................................................................ 26
Customer Support ................................................................................................................................................................................ 26
Reader Response ................................................................................................................................................................................ 27
Product Identification System .............................................................................................................................................................. 28
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2012 Microchip Technology Inc. DS41672A-page 3
MTCH810
1.0 DEVICE OVERVIEW
The Microchip mTouch™ MTCH810 Haptics feedback
controller provides an easy way to add tactile feedback
to any application. The device implements all the digital
functions for a Haptics feedback system. The Haptic
effects are designed to provide feedback for a “Button
and Slider” type capacitive touch interface. When
combined with an analog power driver and an Eccentric
Rotating Mass (ERM) style actuator, the resulting
circuit comprises a complete tactile feedback Haptic
system.
The device is controlled through an I2C slave interface.
In response to a two-byte command, the MTCH810 (in
combination with the driver and ERM) generates one of
13 different Haptic vibration effects. The effects are
180-220 Hz vibrations with different amplitude
envelopes and durations. The effects create a variety
of different ‘feels’ to provide feedback for different
capacitive touch commands, status and error
conditions. Several effects are similar with different
power levels in order to allow the users to compensate
for the variations in the coupling of the vibrations to the
user’s finger tip.
Two additional commands allow the termination of an
effect early and the ability to read the effects table
revision.
1.1 Communications
•I
2C, Slave mode
1.2 Drive Outputs
DR1 is a dedicated PWM output
DR2 is a dedicated inverted PWM output
1.3 PWM Resolution
10 bits
1.4 Pin Description
1.4.1 DR1
This is the enable/non-inverting digital PWM Haptics
drive output. It should be connected to the
non-inverting input of a Haptic power driver circuit
design for ERM actuators. The PWM output should
only be active when an effect is in progress.
1.4.2 DR2
This is the inverting digital PWM Haptics driver output.
It should be connected to the inverting input of a Haptic
power driver circuit designed for ERM actuators. The
PWM output should only be active when an effect is in
progress.
1.4.3 I2C – SERIAL DATA PIN (SDA)
The SDA pin is the serial data pin of the I2C interface.
The SDA pin is used to write or read the registers and
Configuration bits. The SDA pin is an open-drain N-
channel driver. Therefore, it needs an external pull-up
resistor from the VDD line to the SDA pin. Except for the
Start and Stop conditions, the data on the SDA pin must
be stable during the high period of the clock. The high
or low state of the SDA pin can only change when the
clock signal on the SCL pin is low. Refer to
Section 2.1.2 “I2C Operation” for more details on the
I2C serial interface communication.
1.4.4 I2C – SERIAL CLOCK PIN (SCL)
The SCL pin is the serial clock pin of the I2C interface.
The I2C interface only acts as a slave and the SCL pin
accepts only external serial clocks. The input data from
the master device is shifted into the SDA pin on the
rising edges of the SCL clock, and the output from the
device occurs at the falling edges of the SCL clock. The
SCL pin is an open-drain N-channel driver. Therefore, it
needs an external pull-up resistor from the VDD line to
the SCL pin. Refer to Section Section 2.1.2 “I2C Oper-
ation” for more details on I2C serial interface communi-
cation. For more details, see Figure 1-1 and Table 1-1.
MTCH810
DS41672A-page 4 2012 Microchip Technology Inc.
1.4.4.1 Clock Stretching
A feature of the SCL pin is clock stretching. This allows
the I2C slave to hold communications at the end of
each byte from the master. Its purpose is to allow the
slave sufficient time to process the data before the next
byte is sent. It accomplishes the clock hold by turning
on the open-drain output, holding the clock line low.
This prevents the master from starting the transmission
of the next byte in the packet. For proper operation, the
I2C master must be capable of recognizing a clock
stretch condition, and suspending transmission until
the MTCH810 releases the SCL pin.
1.5 Haptic Commands
The commands are transmitted via the I2C serial
interface as a Start condition, address plus write bit,
two successive bytes and a Stop condition. For the
effect table revision number, the Write command is
followed by an I2C read of two bytes. Table 2 -2 and
Table 2-3 list all the commands supported by the
MTCH810.
1.6 Hardware
To build a complete Haptic system, the two digital PWM
outputs must be filtered to produce a DC drive signal,
and amplified to produce a minimum of 300 mA of drive
at 3V. This output is then used to drive an ERM actua-
tor. Figure 1-1 below shows a typical controller, driver
and actuator combination for a Haptic system.
The MTCH810 is the controller in the system,
accepting I2C commands and generating the
appropriate PWM signals to create the Haptic effect.
The outputs from the MTCH810 are then filtered and
amplified by the DRV8601. The amplifier stage is
essentially an audio frequency amplifier configured for
differential inputs and outputs. The output of the
amplifier then drives the ERM.
The RC network in the feedback path provides a pole
in the transfer function at 160 Hz to roll off the high
frequency gain and attenuate the ripple at the PWM
frequency. The connection between the DR1 output
and the enable of the amplifier allows the controller to
generate an output for the ERM with a drive/coast
format, rather than a drive/brake control. Using a
differential output eliminates the need for a large
capacitor on the output to AC couple the drive signal to
the ERM.
Table 1-1 lists the qualified ERM actuators and their
manufacturers.
Note: The MTCH810 includes a time-out
function on the clock stretching function
that will reset the I2C interface in the event
that the I2C interface hangs in a clock
stretch condition.
Note: Any audio frequency drive circuits will
work in the application, provided it can
supply 300 mA at 3V and turn on in less
than 1 mS. Amplifiers with built-in “click
and pop” elimination have soft-start
enables which have a turn on time of >10
mS and are not suitable for a Haptic driver.
TABLE 1-1: APPROVED ACTUATORS AND SPECIFICATIONS
Actuator Dimensions (mm) Rated Voltage Haptic Transient
Overdrive Voltage Impedance
Nidec NRS-3388i 4.6 ± 0.2D
15.6 ± 0.9L
1.3V ± 0.2V 3.3V 10.6 ± 20%
Johnson Electric
1999-1MB0037EP
6.0H x 8.0W
21.5L
4.5V 5.0V 10- typical
2012 Microchip Technology Inc. DS41672A-page 5
MTCH810
FIGURE 1-1: TYPICAL SCHEMATIC
VDD
R2
1.5K
R1
1.5K
SDA
SCL
VDD
SCL
5
6
8
1
SDA
C1
.1 uF
VDD
VSS
DR1
DR2
2
3
21
3
4
58
VDD
C2
.01 uF
C3
.01 uF
C4
.01 uF
R5
100K
R4
100K
R3
49.9K
R6
100K
R7
100K
ERM1
MTCH810
DRV8601
6
7
EN REF
IN1
IN2
OUT+ OUT-
VDD
VSS C6
4.7 uF
C5
.1 uF
MTCH810
DS41672A-page 6 2012 Microchip Technology Inc.
NOTES:
2012 Microchip Technology Inc. DS41672A-page 7
MTCH810
2.0 I2C™ SERIAL INTERFACE
This device supports the I2C serial protocol. The I2C
module operates in Slave mode, so it does not
generate the serial clock.
2.1 Overview
This I2C interface is a two-wire interface. Figure 2-1
shows a typical I2C Interface connection.
The I2C interface specifies different communication bit
rates. These are referred to as Standard, Fast or High
Speed modes. The MTCH810 device supports these
three modes. The bit rates of these modes are:
Standard mode: Bit Rates up to 100 kbit/s
Fast mode: Bit Rates up to 400 kbit/s
A device that sends data onto the bus is defined as a
transmitter, and a device receiving data is defined as a
receiver. The bus has to be controlled by a master
device which generates the serial clock (SCL), controls
the bus access and generates the Start and Stop
conditions. The MTCH810 device works as slave. Both
master and slave can operate as transmitter or
receiver, but the master device determines which mode
is activated. Communication is initiated by the master
(microcontroller) which sends the Start bit, followed by
the slave address byte. The first byte transmitted is
always the slave address byte, which contains the
device code, the address bits and the R/W bit.
FIGURE 2-1: TYPICAL I2C™
INTERFACE
The I2C serial protocol only defines the field types, field
lengths, timings, etc. of a frame. The frame content
defines the behavior of the device. For details on the
frame content (commands/data) refer to Section 2.3
“I2C Commands”.
Refer to the NXP User Manual (UM10204_3) for more
details on the I2C specifications.
2.1.1 SIGNAL DESCRIPTIONS
The I2C interface uses up to two pins (signals). These
are:
SDA (Serial Data) (see Section 1.4.3 “I2C –
Serial Data Pin (SDA)”)
SCL (Serial Clock) (see Section 1.4.4 “I2C –
Serial Clock Pin (SCL)”)
2.1.2 I2C OPERATION
The MTCH810 device I2C module is compatible with
the NXP I2C specification. The following lists some of
the module’s features:
7-bit Slave Addressing
Supports Three Clock Rate modes:
- Standard mode, clock rates up to 100 kHz
- Fast mode, clock rates up to 400 kHz
Support Multi-Master Applications
The I2C 10-bit addressing mode is not supported.
The NXP I2C specification only defines the field types,
field lengths, timings, etc. of a frame. The frame
content defines the behavior of the device. The frame
content for this device is defined in Section 2.3 “I2C
Commands”.
2.1.3 I2C BIT STATES AND SEQUENCE
Figure 2-8 shows an I2C 8-bit transfer sequence, while
Figure 2-7 shows the bit definitions. The serial clock is
generated by the master. The following definitions are
used for the bit states:
Start bit (S)
Data bit
Acknowledge (A) bit (driven low)/
No Acknowledge (A) bit (not driven low)
Repeated Start bit (Sr)
Stop bit (P)
2.1.4 START BIT
The Start bit (see Figure 2-2) indicates the beginning of
a data transfer sequence. The Start bit is defined as the
SDA signal falling when the SCL signal is high.
FIGURE 2-2: START BIT
SCL
SCL
MTCH810
SDA
SDA
Host
Controller
Typical I2C™ Interface Connections
SDA
SCL
S
1st Bit 2nd Bit
MTCH810
DS41672A-page 8 2012 Microchip Technology Inc.
2.1.5 DATA BIT
The SDA signal may change state while the SCL signal
is low. While the SCL signal is high, the SDA signal
MUST be stable (see Figure 2-3).
FIGURE 2-3: DATA BIT
2.1.6 ACKNOWLEDGE (A) BIT
The A bit (see Figure 2-4) is typically a response from
the receiving device to the transmitting device.
Depending on the context of the transfer sequence, the
A bit may indicate different things. Typically, the slave
device will supply an A response after the Start bit and
eight data bits have been received. An A bit has the
SDA signal low.
FIGURE 2-4: ACKNOWLEDGE
WAVEFORM
2.1.7 NOT A (A) RESPONSE
The A bit has the SDA signal high. Tab le 2- 1 shows the
conditions where the slave device will issue a Not A
(A).
SDA
SCL
Data Bit
1st Bit 2nd Bit
A
8
D0
9
SDA
SCL
TABLE 2-1: MTCH810 A / A RESPONSES
Event
Acknowledge
Bit
Response
Comment
General Call A
Slave Address valid A
Slave Address not valid A
Bus Collision N/A Treated as “Don’t Care” if the collision occurs on the Start
bit. Otherwise, I2C™ resets.
2012 Microchip Technology Inc. DS41672A-page 9
MTCH810
2.1.8 REPEATED START BIT
The Repeated Start bit (see Figure 2-5) indicates that
the current master device wishes to continue
communicating with the current slave device without
releasing the I2C bus. The Repeated Start condition is
the same as the Start condition, except that the
Repeated Start bit follows a Start bit (with the Data bits
+ A bit) and not a Stop bit.
The Start bit is the beginning of a data transfer
sequence and is defined as the SDA signal falling when
the SCL signal is high.
FIGURE 2-5: REPEAT START
CONDITION WAVEFORM
2.1.9 STOP BIT
The Stop bit (see Figure 2-6) indicates the end of the
I2C data transfer sequence. The Stop bit is defined as
the SDA signal rising when the SCL signal is high.
A Stop bit resets the I2C interface of the MTCH810
device.
FIGURE 2-6: STOP CONDITION
RECEIVE OR TRANSMIT
MODE
2.1.9.1 Aborting a Transmission
If any part of the I2C transmission does not meet the
command format, it is aborted. This can be intentionally
accomplished with a Start or Stop condition. This is
done so that noisy transmissions (usually an extra Start
or Stop condition) are aborted before they corrupt the
device.
FIGURE 2-7: TYPICAL 8-BIT I2C™ WAVEFORM FORMAT
FIGURE 2-8: I2C™ DATA STATES AND BIT SEQUENCE
Note 1: A bus collision during the Repeated Start
condition occurs if:
SDA is sampled low when SCL goes
from low-to-high.
• SCL goes low before SDA is
asserted low. This may indicate that
another master is attempting to
transmit a data 1’.
SDA
SCL
Sr = Repeated Start
1st Bit
SCL
SDA A / A
P
1st Bit
SDA
SCL
S2nd Bit 3rd Bit 4th Bit 5th Bit 6th Bit 7th Bit 8th Bit PA / A
SCL
SDA
Start
Condition Stop
Condition
Data allowed
to change
Data or
A valid
MTCH810
DS41672A-page 10 2012 Microchip Technology Inc.
2.1.9.2 Device Addressing
The address byte is the first byte received following the
Start condition from the master device. The full seven
bits of the I2C slave address is0010000”.
Figure 2-9 shows the I2C slave address byte format,
which contains the seven address bits and a Read/
Write (R/W) bit.
FIGURE 2-9: SLAVE ADDRESS BITS IN
THE I2C™ CONTROL
BYTE
2.2 Device Commands
This section documents the commands that the device
supports.
The commands can be grouped into the following
categories:
Effect Commands
Revision and Control Commands
Start bit Read/Write bit
Address Byte
R/W ACK
Acknowledge bit
Slave Address
A6 A5 A4 A3
Slave Address (7 bits)
A2 A1 A0
Note 1: Address Bits (A6:A0) can be reprogrammed
by the customer.
0010000A0 Address
Note 1
TABLE 2-2: EFFECT COMMANDS
Index I2C™ Message Haptic Effect
Description
0 0x00 0x00 Strong click
1 0x01 0xFF Med. strong click 60%
2 0x02 0xFE Low strong click 30%
3 0x03 0xFD Sharp click
4 0x04 0xFC Sharp click 60%
5 0x05 0xFB Sharp click 30%
6 0x06 0xFA Soft bump
7 0x07 0xF9 Med. soft bump 60%
8 0x08 0xF8 Soft bump 30%
9 0x09 0xF7 Double click
10 0x0A 0xF6 Double click 60%
11 0x0B 0xF5 Triple click
12 0x0C 0xF4 Soft buzz
13 0x0D 0xF3 Strong buzz
TABLE 2-3: REVISION AND CONTROL
COMMANDS
Index I2C™ Message Haptic Effect
Description
14 0x0E 0xF2 Read effect library version
number
15 0x0F 0xF1 Abort effect playback
2012 Microchip Technology Inc. DS41672A-page 11
MTCH810
2.3 I2C COMMANDS
The I2C protocol does not specify how commands are
formatted, so this section specifies the MTCH810
device I2C command formats and operation.
The commands can be grouped into the following
categories:
Effect Commands
Revision and Control Commands
The supported commands are shown in Ta b l e 2 - 2 and
Table 2-3.
2.3.1 EFFECT COMMANDS
Effect commands are used to initiate a specific Haptic
effect. The command consists of two bytes which are
the XOR of one another. The effect begins with the
completion of the I2C Stop condition.
2.3.2 REVISION AND CONTROL
COMMANDS
Revision and Control commands are used to either
retrieve the current revision of the effects table within
the controller, or to terminate early a Haptic effect. Just
like the Effect commands, the command codes are
two’s compliments of one another. The Terminate-early
command is executed at the completion of the I2C Stop
condition. When the Revision command is sent, the
controller then formats the revision data and waits for
an I2C read from the master.
2.3.3 ABORTING A COMMAND
TRANSMISSION
A Restart or Stop condition in an expected data bit
position will abort the current command sequence and
data will not be written to the MTCH810. Write
commands are automatically aborted if the binary XOR
checksum is not valid.
2.3.4 WRITE COMMAND
(NORMAL AND HIGH VOLTAGE)
The format of the command is shown in Figure 2-10.
The MTCH810 generates the A / A bits.
A Write command will only start a write cycle after a
properly formatted Write command has been received
and the Stop condition has occurred.
FIGURE 2-10: WRITE RANDOM ADDRESS COMMAND
S
0
A
I2C Slave Address
Write bit
AP
0010000 00001001
A
11110111
Command Message
MTCH810
DS41672A-page 12 2012 Microchip Technology Inc.
2.3.5 REVISION COMMAND
The format of the Revision command (see Figure 2-11)
includes the Start condition, I2C control byte (with R/W
bit set to 0), A bit, the first command byte, A bit, fol-
lowed by the two’s compliment of the command byte, a
Repeated Start bit, I2C control byte (with R/W bit set to
1) and the MTCH810 device transmitting the requested
data bytes one at a time, until the master sends a Stop
condition.
The I2C control byte requires the R/W bit to be equal to
a logic one (R/W = 1) in order to generate a read
sequence. The data read will start with the Most Signif-
icant Byte (MSB) of the revision date and automatically
increment to the next byte after each byte request. The
sequence is ended with the master generating a Stop
or Restart condition. Figure 2-11 shows the waveforms
for a single read.
2.3.5.1 Ignoring an I2C Transmission and
“Falling Off” the Bus
The MTCH810 device expects to receive complete,
valid I2C commands and will assume that any
command not defined as a valid command is due to a
bus corruption and will enter a passive high condition
on the SDA signal. All signals will be ignored until the
next valid Start condition and control byte are received.
FIGURE 2-11: READ REVISION COMMAND
Stop bit
1
1
1
0
I2C™ Slave Address Revision Command
DDDD D D DD
A1DDDDD DDDN1
1A
Read bit Revision LSB
Note 1: Master device is responsible for A / A signal. If a A signal occurs, the MTCH810 will abort this
transfer and release the bus.
0123456701234567
0
P
0010000
0010000
I2C™ Slave Address
Write bit
0A
SA
Sr
Repeated Start bit
00 0
Revision MSB
11110010A
2012 Microchip Technology Inc. DS41672A-page 13
MTCH810
3.0 ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings(†)
Ambient temperature under bias....................................................................................................... -40°C to +125°C
Storage temperature ........................................................................................................................ -65°C to +150°C
Voltage on VDD with respect to VSS .................................................................................................... -0.3V to +4.0V
Voltage on all other pins with respect to VSS ........................................................................... -0.3V to (VDD + 0.3V)
Total power dissipation(1) ............................................................................................................................... 800 mW
Maximum current out of VSS pin, -40°C TA +85°C for industrial................................................................. 85 mA
Maximum current into VDD pin, -40°C TA +85°C for industrial.................................................................... 80 mA
Clamp current, IK (VPIN < 0 or VPIN > VDD)20 mA
Maximum output current sunk by any DR pin ................................................................................................... 25 mA
Maximum output current sourced by any DR pin.............................................................................................. 25 mA
Note 1: Power dissipation is calculated as follows: PDIS = VDD x {IDD IOH} + {(VDD – VOH) x IOH} + (VOl x IOL).
NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
MTCH810
DS41672A-page 14 2012 Microchip Technology Inc.
FIGURE 3-1: POR AND POR REARM WITH SLOW RISING VDD
3.1 DC Characteristics: MTCH810
MTCH810 Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C T
A +85°C for industrial
Param.
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
D001 VDD Supply Voltage 1.8 3.6 V
D002
D003
VPOR*Power-on Reset Release Voltage —1.6 V
VPORR*Power-on Reset Rearm Voltage 0.8 V Device in Sleep mode
D004* SVDD VDD Rise Rate to ensure internal
Power-on Reset signal
0.05 V/ms
* These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and
are not tested.
Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
VDD
VPOR
VPORR
VSS
VSS
NPOR(1)
TPOR(3)
POR REARM
Note 1: When NPOR is low, the device is held in Reset.
2: TPOR 1 s typical.
3: TVLOW 2.7 s typical.
TVLOW(2)
2012 Microchip Technology Inc. DS41672A-page 15
MTCH810
3.2 DC Characteristics: MTCH810-I/E
DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated)
Operating temperature-40°C T
A +85°C for industrial
Param.
No. Sym. Characteristic Min. Typ† Max. Units Conditions
VIL Input Low Voltage
DR PORT:
D030A with TTL buffer 0.15 VD
D
V1.8V VDD 3.6V
D031 with I2C™ levels 0.3 VDD V
VIH Input High Voltage
DR Ports:
D040A with TTL buffer 0.25 VDD
+ 0.8
——V1.8V VDD 3.6V
D041 with I2C™ levels 0.7 VDD ——V
IIL Input Leakage Current(1)
D060 DR Ports
± 5
± 5
± 125
± 1000
nA
nA
VSS VPIN VDD,
Pin at high-impedance at 85°C
125°C
VOL Output Low Voltage(3)
D080 DR Ports —0.6V
IOL = 6 mA, VDD = 3.3V
IOL = 1.8 mA, VDD = 1.8V
VOH Output High Voltage(3)
D090 DR Ports VDD - 0.7 V IOH = 3 mA, VDD = 3.3V
IOH = 1 mA, VDD = 1.8V
Capacitive Loading Specs on Output Pins
D101A* CIO All DR pins 50 pF
* These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Negative current is defined as current sourced by the pin.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
3: Including OSC2 in CLKOUT mode.
MTCH810
DS41672A-page 16 2012 Microchip Technology Inc.
FIGURE 3-2: LOAD CONDITIONS
TABLE 3-1: DR TIMING PARAMETERS
V
SS
C
L
Legend: CL = 50 pF for all pins
Load Condition
Pin
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C T
A +125°C
Param.
No. Sym. Characteristic Min. Typ† Max. Units Conditions
OS18* TioR DR output rise time
90
55
140
80
ns VDD = 1.8V
VDD = 3.0-3.6V
OS19* TioF DR output fall time
60
44
80
60
ns VDD = 1.8V
VDD = 3.0-3.6V
* These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25C unless otherwise stated.
2012 Microchip Technology Inc. DS41672A-page 17
MTCH810
FIGURE 3-3: BROWN-OUT RESET TIMING AND CHARACTERISTICS
TABLE 3-2: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET PARAMETERS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C TA +125°C
Param.
No. Sym. Characteristic Min. Typ† Max. Units Conditions
31 TWDTLP Watchdog Timer Time-out Period 205 256 305 ms VDD = 1.8V-3.6V,
1:1 Prescaler used
33* TPWRT Power-up Timer Period 40 65 140 ms
* These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
VBOR
VDD
(Device in Brown-out Reset) (Device not in Brown-out Reset)
33
Reset
(due to BOR)
VBOR and VHYST
37
MTCH810
DS41672A-page 18 2012 Microchip Technology Inc.
FIGURE 3-4: I2C™ BUS START/STOP BITS TIMING
FIGURE 3-5: I2C™ BUS DATA TIMING
Note: Refer to Figure 3-2 for load conditions.
SP91
SP92
SP93
SCLx
SDAx
Start
Condition
Stop
Condition
SP90
Note: Refer to Figure 3-2 for load conditions.
SP90
SP91 SP92
SP100
SP101
SP103
SP106 SP107
SP109 SP109
SP110
SP102
SCLx
SDAx
In
SDAx
Out
2012 Microchip Technology Inc. DS41672A-page 19
MTCH810
TABLE 3-3: I2C™ BUS DATA REQUIREMENTS
Param.
No. Symbol Characteristic Min. Max. Units Conditions
SP100* THIGH Clock high time 400 kHz mode 0.6 s
SP101* TLOW Clock low time 400 kHz mode 1.3 s
SP102* TRSDAx and SCLx
rise time
400 kHz mode 20 + 0.1CB300 ns CB is specified to be from
10-400 pF
SP103* TFSDAx and SCLx
fall time
400 kHz mode 20 + 0.1CB250 ns CB is specified to be from
10-400 pF
SP106* THD:DAT Data input hold
time
400 kHz mode 0 0.9 s
SP107* T
SU:DAT Data input setup
time
400 kHz mode 100 ns
SP109* T
AA Output valid from
clock
400 kHz mode ns
SP110* TBUF Bus free time 400 kHz mode 1.3 s Time the bus must be free
before a new transmission
can start
SP111* CBBus capacitive loading 400 pF
SP112* TTIMEOUT Maximum message
time
400 kHz mode 29.5 36.0 ms
* These parameters are characterized but not tested.
MTCH810
DS41672A-page 20 2012 Microchip Technology Inc.
4.0 PACKAGING INFORMATION
4.1 Package Marking Information
XXXX
NNN
YYWW
PIN 1 PIN 1
3
e
3
e
2012 Microchip Technology Inc. DS41672A-page 21
MTCH810
4.2 Package Details
The following sections give the technical details of the packages.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MTCH810
DS41672A-page 22 2012 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2012 Microchip Technology Inc. DS41672A-page 23
MTCH810
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MTCH810
DS41672A-page 24 2012 Microchip Technology Inc.
APPENDIX A: DATA SHEET
REVISION HISTORY
Revision A (12/2012)
Initial release.
2012 Microchip Technology Inc. DS41672A-page 25
MTCH810
INDEX
Symbols
I2C Hardware Interface......................................................... 7
A
Absolute Maximum Ratings ................................................ 13
B
Brown-out Reset (BOR)
Specifications.............................................................. 17
Timing and Characteristics ......................................... 17
C
Communications ................................................................... 3
Customer Change Notification Service ............................... 26
Customer Notification Service............................................. 26
Customer Support ............................................................... 26
D
DC Characteristics
MTCH810.................................................................... 14
Description ............................................................................ 1
Device Overview ................................................................... 3
DR1....................................................................................... 3
DR2....................................................................................... 3
Drive Outputs ........................................................................ 3
E
Electrical Specifications ...................................................... 13
Errata .................................................................................... 2
F
Features................................................................................ 1
I
I2C™ Communications and Protocol.................................... 7
Internet Address.................................................................. 26
M
Microchip Internet Web Site................................................ 26
O
Oscillator Start-up Timer (OST)
Specifications.............................................................. 17
P
Package Type ....................................................................... 1
Packaging
DFN............................................................................. 21
Packaging Information ........................................................ 20
Pin Description.................................................................. 1, 3
Power-up Timer (PWRT)
Specifications.............................................................. 17
PWM Resolution ................................................................... 3
R
Reader Response ............................................................... 27
Revision History .................................................................. 24
T
Timing Diagrams
Brown-out Reset (BOR) .............................................. 17
I2C Bus Data............................................................... 18
W
WWW Address ................................................................... 26
WWW, On-Line Support ....................................................... 2
MTCH810
DS41672A-page 26 2012 Microchip Technology Inc.
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance
through several channels:
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Development Systems Information Line
Customers should contact their distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the web site
at: http://microchip.com/support
2012 Microchip Technology Inc. DS41672A-page 27
MTCH810
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
(480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
TO: Technical Publications Manager
RE: Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
FAX: (______) _________ - _________
DS41672AMTCH810
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
MTCH810
DS41672A-page 28 2012 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X/XX XXX
PatternPackageTemperature
Range
Device
Device: MTCH810
Tape and Reel
Option:
Blank = Standard packaging (tube or tray)
T = Tape and Reel(1)
Temperature
Range:
I= -40C to +85C (Industrial)
Package:(2) MF = DFN
Pattern: QTP, SQTP, Code or Special Requirements
(blank otherwise)
Examples:
a) MTCH810 - I/MF
Industrial temperature,
DFN package
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and is
not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
2: For other small form-factor package
availability and marking information, please
visit www.microchip.com/packaging or
contact your local sales office.
[X](1)
Tape and Reel
Option
-
2012 Microchip Technology Inc. DS41672A-page 29
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2012, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768174
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS41672A-page 30 2012 Microchip Technology Inc.
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