Document Number: 91221 www.vishay.com
S11-0448-Rev. C, 14-Mar-11 1
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Power MOSFET
IRFP32N50K, SiHFP32N50K
Vishay Siliconix
FEATURES
• Low Gate Charge Qg Results in Simple Drive
Requirement
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
• Fully Characterized Capacitance and Avalanche Voltage
and Current
•Low R
DS(on)
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• High Speed Power Switching
• Hard Switching and High Frequency Circuits
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. Starting TJ = 25 °C, L = 0.87 mH, Rg = 25 Ω, IAS = 32 A.
c. ISD ≤ 32 A, dI/dt ≤ 197 A/μs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
PRODUCT SUMMARY
VDS (V) 500
RDS(on) (Ω)V
GS = 10 V 0.135
Qg (Max.) (nC) 190
Qgs (nC) 59
Qgd (nC) 84
Configuration Single
N-Channel MOSFET
G
D
S
TO-247AC
G
D
S
Available
RoHS*
COMPLIANT
ORDERING INFORMATION
Package TO-247AC
Lead (Pb)-free IRFP32N50KPbF
SiHFP32N50K-E3
SnPb IRFP32N50K
SiHFP32N50K
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 500 V
Gate-Source Voltage VGS ± 30
Continuous Drain Current VGS at 10 V TC = 25 °C ID
32
ATC = 100 °C 20
Pulsed Drain CurrentaIDM 130
Linear Derating Factor 3.7 W/°C
Single Pulse Avalanche EnergybEAS 450 mJ
Repetitive Avalanche CurrentaIAR 32 A
Repetitive Avalanche EnergyaEAR 46 mJ
Maximum Power Dissipation TC = 25 °C PD460 W
Peak Diode Recovery dV/dtcdV/dt 13 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C
Soldering Recommendations (Peak Temperature) for 10 s 300d
Mounting Torque 6-32 or M3 screw 10 lbf · in
1.1 N · m
* Pb containing terminations are not RoHS compliant, exemptions may apply
www.vishay.com Document Number: 91221
2S11-0448-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP32N50K, SiHFP32N50K
Vishay Siliconix
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. Pulse width ≤ 400 μs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA -40
°C/WCase-to-Sink, Flat, Greased Surface RthCS 0.24 -
Maximum Junction-to-Case (Drain) RthJC -0.26
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.54 - V/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V
Gate-Source Leakage IGSS V
GS = ± 30 V - - ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 500 V, VGS = 0 V - - 50 μA
VDS = 400 V, VGS = 0 V, TJ = 150 °C - - 250
Drain-Source On-State Resistance RDS(on) V
GS = 10 V ID = 32 Ab- 0.135 0.16 Ω
Forward Transconductance gfs VDS = 50 V, ID = 32 A 14 - - S
Dynamic
Input Capacitance Ciss VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
- 5280 -
pF
Output Capacitance Coss - 550 -
Reverse Transfer Capacitance Crss -45-
Output Capacitance Coss VGS = 0 V
VDS = 1.0 V, f = 1.0 MHz - 5630 -
VDS = 400 V, f = 1.0 MHz - 155 -
Effective Output Capacitance Coss eff. VDS = 0 V to 400 Vc- 265 -
Total Gate Charge Qg
VGS = 10 V ID = 32 A, VDS = 400 Vb
- - 190
nC Gate-Source Charge Qgs --59
Gate-Drain Charge Qgd --84
Turn-On Delay Time td(on)
VDD = 250 V, ID = 32 A,
Rg = 4.3 Ω, VGS = 10 Vb
-28-
ns
Rise Time tr - 120 -
Turn-Off Delay Time td(off) -48-
Fall Time tf -54-
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current IS
MOSFET symbol
showing the
integral reverse
p - n junction diode
--32
A
Pulsed Diode Forward CurrentaISM - - 130
Body Diode Voltage VSD TJ = 25 °C, IS = 32 A, VGS = 0 Vb--1.5V
Body Diode Reverse Recovery Time trr
TJ = 25 °C, IF = 32 A, dI/dt = 100 A/μsb
- 530 800 ns
Body Diode Reverse Recovery Charge Qrr - 9.0 13.5 μC
Body Diode Reverse Recovery Current IRRM -30-A
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
S
D
G
Document Number: 91221 www.vishay.com
S11-0448-Rev. C, 14-Mar-11 3
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP32N50K, SiHFP32N50K
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
VDS, Drain-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
0.1 110 100
0.01
0.1
1
10
1000 VGS
15 V
12 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
To p
Bottom
5.0 V
20 μs PULSE WIDTH
TJ = 25 °C
100
VGS
15 V
12 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom
To p
5.0 V
20 μs PULSE WIDTH
TJ = 150 °C
ID, Drain-to-Source Current (A)
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1 110 100
5
48
7911
12
0.1
100
1000
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
10
1
VDS = 50 V
20 μs PULSE WIDTH
TJ = 25 °C
TJ = 150 °C
TJ, Junction Temperature
RDS(on), Drain-to-Source On Resistance (Normalized)
- 60 - 20
- 40 0 20 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
2.5
3.0 ID = 32 A
VGS = 10 V
www.vishay.com Document Number: 91221
4S11-0448-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP32N50K, SiHFP32N50K
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
110 100 1000
10
100
1000
10 000
100 000
C, Capacitance (pF)
VDS, Drain-to-Source Voltage (V)
Crss
Coss
Ciss
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
VDS = 400 V
VDS = 250 V
VDS = 100 V
ID = 32 A
040 80 120 160 200
0
4
8
12
16
20
QG, Total Gate Charge (nC)
VGS, Gate-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
ISD, Reverse Drain Current (A)
1000
0.2 0.9
0.6 1.3 1.6
0.1
100
10
1
TJ = 150 °C
TJ = 25 °C
VGS = 0 V
Document Number: 91221 www.vishay.com
S11-0448-Rev. C, 14-Mar-11 5
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP32N50K, SiHFP32N50K
Vishay Siliconix
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
TC, Case Temperature (°C)
ID, Drain Current (A)
50 75 100 125 150
0
5
10
15
20
25
25
30
35
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10 V
+
-
VDS
VDD
VDS
90 %
10 %
VGS
td(on) trtd(off) tf
0.001
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
t , Rectangular Pulse Duration (sec)
Thermal Response (ZthJC)
0.01
0.05
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.10
t1
t2
Notes:
1. Duty factor D = t1/ t2
2. Peak TJ = PDM x ZthJC + TC
PDM
www.vishay.com Document Number: 91221
6S11-0448-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP32N50K, SiHFP32N50K
Vishay Siliconix
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
A
R
G
I
AS
0.01 Ω
t
p
D.U.T
L
V
DS
+
-V
DD
Driver
15 V
20 V
I
AS
V
DS
t
p
25
800
640
480
320
160
0
150
125
100
75
50
Starting TJ, Junction Temperature (°C)
EAS, Single Pulse Avalanche Energy (mJ)
ID
TOP 7 A
10 A
BOTTOM 16 A
QGS QGD
QG
V
G
Charge
10 V
D.U.T.
3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
Document Number: 91221 www.vishay.com
S11-0448-Rev. C, 14-Mar-11 7
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFP32N50K, SiHFP32N50K
Vishay Siliconix
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91221.
P.W. Period
dI/dt
Diode recovery
dV/dt
Ripple ≤ 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
VGS = 10 Va
ISD
Driver gate drive
D.U.T. lSD waveform
D.U.T. VDS waveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
VDD
• dV/dt controlled by Rg
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
• D.U.T. - device under test
D.U.T. Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
Rg
Note
a. VGS = 5 V for logic level devices
VDD
Package Information
www.vishay.com Vishay Siliconix
Revision: 24-Sep-12 1Document Number: 91360
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TO-247AC (High Voltage)
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Contour of slot optional.
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body.
4. Thermal pad contour optional with dimensions D1 and E1.
5. Lead finish uncontrolled in L1.
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154").
7. Outline conforms to JEDEC outline TO-247 with exception of dimension c.
8. Xian and Mingxin actually photo.
MILLIMETERS INCHES MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.
A 4.58 5.31 0.180 0.209 D2 0.51 1.30 0.020 0.051
A1 2.21 2.59 0.087 0.102 E 15.29 15.87 0.602 0.625
A2 1.17 2.49 0.046 0.098 E1 13.72 - 0.540 -
b 0.99 1.40 0.039 0.055 e 5.46 BSC 0.215 BSC
b1 0.99 1.35 0.039 0.053 Ø k 0.254 0.010
b2 1.53 2.39 0.060 0.094 L 14.20 16.25 0.559 0.640
b3 1.65 2.37 0.065 0.093 L1 3.71 4.29 0.146 0.169
b4 2.42 3.43 0.095 0.135 N 7.62 BSC 0.300 BSC
b5 2.59 3.38 0.102 0.133 Ø P 3.51 3.66 0.138 0.144
c 0.38 0.86 0.015 0.034 Ø P1 - 7.39 - 0.291
c1 0.38 0.76 0.015 0.030 Q 5.31 5.69 0.209 0.224
D 19.71 20.82 0.776 0.820 R 4.52 5.49 0.178 0.216
D1 13.08 - 0.515 - S 5.51 BSC 0.217 BSC
ECN: X12-0167-Rev. B, 24-Sep-12
DWG: 5971
0.10 AC
M M
E
E/2
(2)
(4)
R/2
B
2 x R
S
D
See view B
2 x e
b4
3 x b
2 x b2
L
C
L1
123
Q
D
A
A2
A
A
A1
C
Ø k BD
M M
A
ØP (Datum B)
ØP1
D1
4
E1
0.01 BD
M M
View A - A
Thermal pad
D2
DDE E
CC
View B
(b1, b3, b5) Base metal
c1
(b, b2, b4)
Section C - C, D - D, E - E
(c)
Planting
4
3
5
7
5
5
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Revision: 12-Mar-12 1Document Number: 91000
Disclaimer
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