LTC3824
9
3824fh
For more information www.linear.com/LTC3824
applicaTions inForMaTion
Burst Mode Operation
The LTC3824 can be configured for Burst Mode operation
to enhance light load efficiency (only 40µA quiescent cur-
rent) and extend battery run time by leaving the SYNC/
MODE pin open or pulling it higher than 2V. In this mode,
when output load drops the loop control voltage VC also
drops and when VC reaches approximately 0.9V at low
duty cycle the LTC3824 goes into sleep mode with the
switch turned off. During sleep mode the output voltage
drops and VC rises up. When VC goes up to around 70mV
the LTC3824 will turn on the switch and the burst cycle
repeats. If the SYNC/MODE pin is grounded the Burst
Mode operation will be disabled and the LTC3824 skips
cycles at light load.
Oscillation Frequency Setting and Synchronization
The switching frequency of the LTC3824 can be set up to
600kHz by a resistor, RFREQ, from the RSET pin to ground.
For 200kHz, RFREQ = 392k. See the Switching Frequency
vs RFREQ graph in the Typical Performance Characteris-
tics section. With a 100ns one-shot timer on-chip, the
LTC3824 provides flexibility on the sync pulse width. The
sync pulse threshold voltage level is about 1.2V.
Short-Circuit Protection
In normal operation when the output voltage is in regulation,
VFB is regulated to 0.8V. If the output is shorted to ground
and VFB drops below 0.5V the switching frequency will be
reduced to 50kHz to allow the inductor current to discharge
and prevent current runaway. Note that synchronization
is enabled only when VFB is above 0.5V.
Soft-Start
During soft-start, the voltage on the SS pin (VSS) is the
reference voltage that controls the output voltage and the
output ramps up following VSS. The effective range of VSS
is from 0V to 0.8V. The typical time for the output to reach
the programmed level is:
tSS =
SS
5μA
where CSS is the capacitor connected from the SS pin to
GND.
If shutdown mode will be invoked after startup, it is
recommended to connect a 1MΩ to 10MΩ resistor from
SS to ground to reset the SS capacitor during shutdown.
This ensures proper soft-start operation when exiting
shutdown mode.
Overvoltage Protection
To achieve good output regulation in Burst Mode operation,
an overvoltage comparator, OVP, with a threshold adap-
tive to the VC voltage is used to monitor the FB voltage.
In Burst Mode operation with low VC voltage, the OVP
threshold is approximately 2% above VREF and the VREF
is also shifted lower by 2% to contain the output ripple
and to keep output regulation constant. As output load
increases, OVP threshold increases with VC voltage to up
to 8% above VREF.
Shutdown Mode Quiescent Current
When the VC pin is pulled down below 25mV the LTC3824
goes into micropower shutdown mode and only draws 7µA.
For proper operation, shutdown mode should not be
engaged again too soon after exiting shutdown mode.
This minimum time is a function of CSS and is calculated
by tMIN = 5.5e5•CSS. For example, if CSS=0.1μF, then
a minimum of 55ms must elapse after exiting shutdown
before engaging it again.
Output Voltage Programming
With a 0.8V feedback reference voltage, VREF, the output
voltage, VOUT, is programmed by a resistor divider as
shown in the Block Diagram.
VOUT = 0.8V (1+RF1/RF2)
Current Sense Resistor RS and Current Limit
The maximum current the LTC3824 can deliver is deter-
mined by:
IOUT(MAX) = 100mV/RS – IRIPPLE/2
where 100mV is the internal 100mV threshold across VCC
and VSENSE, and IRIPPLE is the inductor peak-to-peak ripple
current. RS should be placed very close to the power switch
with very short traces. Good kelvin sensing is required for
accurate current limit.