LP38841-ADJ LP38841-ADJ 0.8A Ultra Low Dropout Adjustable Linear Regulators Stable with Ceramic Output Capacitors Literature Number: SNVS305B LP38841-ADJ 0.8A Ultra Low Dropout Adjustable Linear Regulators Stable with Ceramic Output Capacitors General Description Features The LP38841-ADJ is a high current, fast response regulator which can maintain output voltage regulation with minimum input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: Vbias provides voltage to drive the gate of the N-MOS power transistor, while Vin is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra low Vin voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability. The fast transient response of these devices makes them suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The parts are available in the PSOP package. Dropout Voltage: 75 mV (typ) @ 0.8A load current. Quiescent Current: 30 mA (typ) at full load. Shutdown Current: 30 nA (typ) when S/D pin is low. Precision Reference Voltage: 1.5% room temperature accuracy. Ideal for conversion from 1.8V or 1.5V inputs Designed for use with low ESR ceramic capacitors Ultra low dropout voltage (75mV @ 0.8A typ) 0.56V to 1.5V adjustable output range Load regulation of 0.1%/A (typ) 30nA quiescent current in shutdown (typ) Low ground pin current at all loads Over temperature/over current protection Available in 8 lead PSOP package -40C to +125C junction temperature range UVLO disables output when VBIAS < 3.8V Applications ASIC Power Supplies In: - Desktops, Notebooks, and Graphics Cards, Servers - Gaming Set Top Boxes, Printers and Copiers Server Core and I/O Supplies DSP and FPGA Power Supplies SMPS Post-Regulators Typical Application Circuit 20117701 * Minimum value required if Tantalum capacitor is used (see Application Hints). (c) 2007 National Semiconductor Corporation 201177 www.national.com LP38841-ADJ 0.8A Ultra Low Dropout Linear Regulators Stable with Ceramic Output Capacitors December 2006 LP38841-ADJ Connection Diagram 20117735 PSOP-8, Top View Pin Description Pin Number Pin Name Pin Description 1 ADJ The Adjust pin is used to set the regulated output voltage by connecting it to the external resistors R1 and R2 (see Typical Application Circuit). 2 OUTPUT 3 BIAS The Bias pin is used to provide the low current bias voltage to the chip which operates the internal circuitry and provides drive voltage for the N-FET. 4, 5 GND These are the power and analog grounds for the IC. Connect both pins to ground. 6 SHUTDOWN This provides a low power shutdown function which turns the regulated output OFF. Tie to VBIAS if this function is not used. 7 INPUT The high current input voltage which is regulated down to the nominal output voltage must be connected to this pin. Because the bias voltage to operate the chip is provided separately, the input voltage can be as low as a few hundred millivolts above the output voltage. 8 N/C This pin is floating, it has no internal connection. DAP DAP The PSOP DAP is a thermal connection that is physically connected to the backside of the die, and is used as a thermal connection to the PC Board copper. The DAP is not a ground pin connection, but should be connected to ground potential. The regulated output voltage is connected to this pin. Ordering Information Order Number Package Type Package Drawing Supplied As LP38841MR-ADJ PSOP-8 MRA08A 95 Units Tape and Reel LP38841MRX-ADJ PSOP-8 MRA08A 2500 Units Tape and Reel Block Diagram 20117724 www.national.com 2 If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Range Lead Temp. (Soldering, 5 seconds) ESD Rating Human Body Model (Note 3) Machine Model (Note 9) Power Dissipation (Note 2) VIN Supply Voltage (Survival) VBIAS Supply Voltage (Survival) Shutdown Input Voltage (Survival) VADJ Internally Limited -0.3V to +6V -40C to +150C Operating Ratings -65C to +150C 260C VIN Supply Voltage Shutdown Input Voltage IOUT Operating Junction Temperature Range VBIAS Supply Voltage VOUT 2 kV 200V Internally Limited -0.3V to +6V -0.3V to +7V -0.3V to +7V -0.3V to +6V (VOUT + VDO) to 5.5V 0 to +5.5V 0.8A -40C to +125C 4.5V to 5.5V 0.56V to 1.5V Electrical Characteristics Limits in standard typeface are for TJ = 25C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, VBIAS = 4.5V, IL = 10 mA, CIN = 10 F CER, COUT = 22 F CER, VS/D = VBIAS. Min/Max limits are guaranteed through testing, statistical correlation, or design. Symbol VADJ Parameter Adjust Pin Voltage Conditions 10 mA < IL < 0.8A VO(NOM) + 1V VIN 5.5V MIN 0.552 0.543 TYP (Note 4) 0.56 MAX Units 0.568 0.577 V 4.5V VBIAS 5.5V IADJ Adjust Pin Bias Current 10 mA < IL < 0.8A VO(NOM) + 1V VIN 5.5V 1 A %/V 4.5V VBIAS 5.5V VO/VIN Output Voltage Line Regulation (Note 6) VO(NOM) + 1V VIN 5.5V 0.01 VO/IL Output Voltage Load Regulation (Note 7) 10 mA < IL < 0.8A 0.1 0.4 1.3 %/A VDO Dropout Voltage (Note 8) IL = 0.8A 75 120 205 mV IQ(VIN) Quiescent Current Drawn from VIN Supply 10 mA < IL < 0.8A 30 35 40 mA 0.06 1 30 A 2 4 6 mA 0.03 1 30 A V S/D 0.3V IQ(VBIAS) Quiescent Current Drawn from VBIAS Supply 10 mA < IL < 0.8A V S/D 0.3V UVLO VBIAS Voltage Where Regulator Output Is Enabled ISC Short-Circuit Current 3.8 V VOUT = 0V 2.6 A Output = ON 0.7 Shutdown Input VSDT Output Turn-off Threshold Output = OFF 0.3 0.7 Td (OFF) Turn-OFF Delay RLOAD X COUT << Td (OFF) 20 Td (ON) Turn-ON Delay RLOAD X COUT << Td (ON) 15 IS/D S/D Input Current V S/D =1.3V 1 V S/D 0.3V -1 J-A Junction to Ambient Thermal Resistance PSOP-8 Package (Note 10) 43 1.3 V s A C/W AC Parameters 3 www.national.com LP38841-ADJ IOUT (Survival) Output Voltage (Survival) Junction Temperature Absolute Maximum Ratings (Note 1) LP38841-ADJ Symbol PSRR (VIN) Parameter Ripple Rejection for VIN Input Voltage Conditions TYP (Note 4) VIN = VOUT +1V, f = 120 Hz 80 VIN = VOUT + 1V, f = 1 kHz 65 PSRR (VBIAS) Ripple Rejection for VBIAS Voltage VBIAS = VOUT + 3V, f = 120 Hz en MIN MAX Units dB 58 VBIAS = VOUT + 3V, f = 1 kHz 58 Output Noise Density f = 120 Hz 1 Output Noise Voltage VOUT = 1.5V BW = 10 Hz - 100 kHz 150 BW = 300 Hz - 300 kHz 90 V/root-Hz V (rms) Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not apply when operating the device outside of its rated operating conditions. Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink thermal values. If power dissipation causes the junction temperature to exceed specified limits, the device will go into thermal shutdown. Note 3: The human body model is a 100 pF capacitor discharged through a 1.5k resistor into each pin. Note 4: Typical numbers represent the most likely parametric norm for 25C operation. Note 5: If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground. Note 6: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage. Note 7: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load to full load. Note 8: Dropout voltage is defined as the minimum input to output differential required to maintain the output with 2% of nominal value. Note 9: The machine model is a 220 pF capacitor discharged directly into each pin. Note 10: For optimum heat dissipation, the exposed DAP on the bottom of the PSOP package must be soldered to a copper plane or connected using thermal vias to an internal copper plane. www.national.com 4 Unless otherwise specified: TJ = 25C, CIN = 10 F CER, COUT = 22 F CER, CBIAS = 1 F CER, S/D Pin is tied to VBIAS, VOUT = 1.2V, IL = 10mA, VBIAS = 5V, VIN = VOUT + 1V. VBIAS Transient Response Dropout Voltage Over Temperature 20117736 20117739 VBIAS PSRR VBIAS PSRR 20117751 20117741 VIN PSRR VADJ / IADJ vs Temperature 20117742 20117760 5 www.national.com LP38841-ADJ Typical Performance Characteristics LP38841-ADJ Load Transient Response Load Transient Response 20117762 20117764 sufficient capacitance is provided. The input capacitor must be located less than one centimeter from the input pin and returned to a clean analog ground. Application Hints SETTING THE OUTPUT VOLTAGE (Refer to Typical Application Circuit) The output voltage is set using the resistive divider R1 and R2. The output voltage is given by the formula: FEED FORWARD CAPACITOR (Refer to Typical Application Circuit) A capacitor placed across R1 can provide some additional phase margin and improve transient response. The capacitor CFF and R1 form a zero in the loop response given by the formula: VOUT = VADJ x (1 + R1 / R2) The value of R2 must be 10k or less for proper operation. EXTERNAL CAPACITORS To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit. FZ = 1 / (2 x x CFF x R1) For best effect, select CFF so the zero frequency is approximately 70 kHz. The phase lead provided by CFF drops as the output voltage gets closer to 0.56V (and R1 reduces in value). The reason is that CFF also forms a pole whose frequency is given by: OUTPUT CAPACITOR An output capacitor is required on the LP3884X devices for loop stability. The minimum value of capacitance necessary depends on type of capacitor: if a solid Tantalum capacitor is used, the part is stable with capacitor values as low as 4.7F. If a ceramic capacitor is used, a minimum of 22 F of capacitance must be used (capacitance may be increased without limit). The reason a larger ceramic capacitor is required is that the output capacitor sets a pole which limits the loop bandwidth. The Tantalum capacitor has a higher ESR than the ceramic which provides more phase margin to the loop, thereby allowing the use of a smaller output capacitor because adequate phase margin can be maintained out to a higher crossover frequency. The tantalum capacitor will typically also provide faster settling time on the output after a fast changing load transient occurs, but the ceramic capacitor is superior for bypassing high frequency noise. The output capacitor must be located less than one centimeter from the output pin and returned to a clean analog ground. Care must be taken in choosing the output capacitor to ensure that sufficient capacitance is provided over the full operating temperature range. If ceramics are selected, only X7R or X5R types may be used because Z5U and Y5F types suffer severe loss of capacitance with temperature and applied voltage and may only provide 20% of their rated capacitance in operation. FP = 1 / (2 x x CFF x R1 // R2) As R1 reduces, the two equations come closer to being equal and the pole and zero begin to cancel each other out which removes the beneficial phase lead of the zero. BIAS CAPACITOR The 0.1F capacitor on the bias line can be any good quality capacitor (ceramic is recommended). BIAS VOLTAGE The bias voltage is an external voltage rail required to get gate drive for the N-FET pass transistor. Bias voltage must be in the range of 4.5 - 5.5V to assure proper operation of the part. UNDER VOLTAGE LOCKOUT The bias voltage is monitored by a circuit which prevents the regulator output from turning on if the bias voltage is below approximately 3.8V. SHUTDOWN OPERATION Pulling down the shutdown (S/D) pin will turn-off the regulator. The S/D pin must be actively terminated through a pull-up resistor (10 k to 100 k) for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be tied to Vin if not used. INPUT CAPACITOR The input capacitor is also critical to loop stability because it provides a low source impedance for the regulator. The minimum required input capacitance is 10 F ceramic (Tantalum not recommended). The value of CIN may be increased without limit. As stated above, X5R or X7R must be used to ensure www.national.com POWER DISSIPATION/HEATSINKING Heatsinking for the PSOP-8 package is accomplished by allowing heat to flow through the exposed DAP on the bottom 6 nected to the backside of the die, it must be held at ground potential. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. 7 www.national.com LP38841-ADJ of the package into the copper on the PC board. The exposed DAP must be soldered down to a copper plane to get good heat transfer. It can also be connected through thermal vias to internal copper planes. Since the DAP is physically con- LP38841-ADJ Physical Dimensions inches (millimeters) unless otherwise noted PSOP-8 8-Lead Molded PSOP-2 NS Package Number MRA08B www.national.com 8 LP38841-ADJ Notes 9 www.national.com LP38841-ADJ 0.8A Ultra Low Dropout Linear Regulators Stable with Ceramic Output Capacitors Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL'S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright(c) 2007 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530-85-86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +49 (0) 870 24 0 2171 Francais Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Audio www.ti.com/audio Communications and Telecom www.ti.com/communications Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps DLP(R) Products www.dlp.com Energy and Lighting www.ti.com/energy DSP dsp.ti.com Industrial www.ti.com/industrial Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical Interface interface.ti.com Security www.ti.com/security Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive Microcontrollers microcontroller.ti.com Video and Imaging RFID www.ti-rfid.com OMAP Mobile Processors www.ti.com/omap Wireless Connectivity www.ti.com/wirelessconnectivity TI E2E Community Home Page www.ti.com/video e2e.ti.com Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2011, Texas Instruments Incorporated