International PD-9.386G Rectifier | | IRFD210 HEXFET Power MOSFET Dynamic dv/dt Rating Repetitive Avalanche Rated D For Automatic Insertion Voss = 200V @ End Stackable e Fast Switching @ Ease of Paralleling @ Simple Drive Requirements Rogvon) = 1.50 5 Ip = 0.60A Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The 4-pin DIP package is a low cost machine-insertable case style which can be stacked in multiple combinations on standard 0.1 inch pin centers. The dual drain serves as a thermal link to the mounting surface for power dissipation levels up to 1 wait. HD-1 Absolute Maximum Ratings Parameter Max. Units Ip @ To = 25C Continuous Drain Current, Veg @ 10 V 0.60 Ip @ Tc =100C | Continuous Drain Current, Vag @ 10 V 0.38 A lom Pulsed Drain Current 48 Pp @ Tc = 25C_ | Power Dissipation 1.0 Ww Linear Derating Factor 0.0083 WrC Ves : Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy @ 79 mJ lar Avalanche Current 0.60 A Ear Repetitive Avalanche Energy 0.10 mJ dv/dt Peak Diode Recovery dv/dt 5.0 Vins Ty Operating Junction and -55 to +150 Tsta Storage Temperature Range C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. Units Rea Junction-to-Ambient . _ 120 oChN 515IRFD210 | Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Vierypss Drain-to-Source Breakdown Voltage 200 | _- V_ | Vas=0V, In= 250A AVer)pss/ATy} Breakdown Voltage Temp. Coefficient | 0.30 | V#C | Reference to 25C, Ip= 1mA Roston) Static Drain-to-Source On-Resistance - _- 1.5 Q | Ves=10V, Ip=0.36A @ Vasith) Gate Threshold Voltage 2.0 | 40 V__ | Vos=Ves, Ip= 250A Gis Forward Transconductance 010; = S__| Vos=50V, Ip=0.36A_@ loss Drain-to-Source Leakage Current 28 HA Vns=200V, Vas=0V : _ _ 250 Vps=160V, Vas=0V, Ty=125C less Gate-to-Source Forward Leakage _ 100 nA Vas=20V Gate-to-Source Reverse Leakage | -100 Ves=-20V Qg Total Gate Charge _ _ 8.2 Ip=3.3A Qgs Gate-to-Source Charge = | 1.8 | nC | Vos=160V Qog Gate-to-Drain ("Miller") Charge _ _ 45 Vas=10V See Fig. 6 and 13 @ tdjon) Turn-On Delay Time _ 8.2 _ Vpp=100V tr Rise Time - 17 - ns [p=3.3A tavorty Turn-Off Delay Time _ 14 _ Re=24Q tt Fall Time _ 8.9 _ Rp=30Q_ See Figure 10 @ Lo Internal Drain Inductance _ 4.0 _ B ono. pend ) g - nH | from package fiz Ls Internal Source Inductance | 60; and center of ay die contact s Ciss Input Capacitance - 140 - Vas=0V Coss Output Capacitance 53 _ PF | Vos= 25V Ciss Reverse Transfer Capacitance _ 15 _ f=1,.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ | 060 MOSFET symbol D (Body Diode) A showing the Is Pulsed Source Current | | ag integral reverse @ (Body Diode) p-n junction diode. s Vsp Diode Forward Voltage _ 2.0 V | Ty=25C, Is=0.60A, Vas=0V @ tir Reverse Recovery Time _ 160 | 310 ns | Ty=25C, Ip=3.3A Qn Reverse Recovery Charge | 060) 14 | pC |di/dt=100A/us ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: Repetitive rating; pulse width limited by Isps3.3A, di/dt<70A/us, Vop<V(BR)Dss, max. junction temperature (See Figure 11) Tus150C Vpp=50V, starting Ty=25C, L=82mH @ Pulse width < 300 ys; duty cycle <2%. Ra=250, las=1.2A (See Figure 12) 516IRFD210 Ip, Drain Current (Amps) Ip, Drain Current (Amps) 101 a = 00 x 100 = 2 5 Oo gs 10-1 a soi 4.5 20us PULSE WIDTH 20us WIDTH To = 25C Te = 150C so-4 407 Vos, Drain-to-Source Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics, To=25C Tc=150C Qo 5 2 a ec c Og 8 8 5 = wo BE es TZ i g oO 2 oD Vpg = 50V g 20us PULSE WIDTH o 00 ves = 10V 6 3 40 -60 -40 -20 0 20 40 60 80 100 120 140 160 Vas, Gate-to-Source Voltage (volts) Ty, Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 517IRFD210 Gs = > f = IMHzZ iss Cgg + Cgq Egg SHORTED Cog + Capacitance (pF) Ves, Gate-to-Source Voltage (volts) SEE FIGURE 13 Vos, Drain-to-Source Voltage (volts) Qg, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 102 _~ 6 OPERATION IN THIS AREA LIMITED ey BY Fos (ON) g z = & 10 S go: a ~ 5 5 2 & 5 1 Qa 5 ow 2 g Coe a 40.1 c = : a Tq225C wf 2 Ty=4150C Veg = OV - SINGLE son! 10 , 0. . 4. -0 0.1 2 gS 4 2 5 10 2 6 102 2 5 403 Vgp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 5180.6 Ip, Drain Current (Amps) 2 8 2 8 0.0 25 Fig 9. Fig 11. 50 78 100 4125 450 Tc, Case Temperature (C) Maximum Drain Current Vs. Case Temperature 103 102 2B N N a 2 S 40 Q 7] D ira SB 1 E o cE SINGLE PULSE (THEAMAL RESPONSE) 0.4 10 105 10-4 103 10 NOTES: 4. DUTY FACTOR, IRFD210 D Vos WA DUT. LD x et 7 - Vop If10v Pulse Width < ips Duty Factor <$ 0.1% t Fig 10a. Switching Time Test Circuit Vps 90% tayo te Fig 10b. Switching Time Waveforms ro | etl }-t2+ O=t1/t2 2. PEAK Tj=Pom x Zthje * To 0.4 1 10 102 103 t;, Rectangular Pulse Duration (seconds) Maximum Effective Transient Thermal Impedance, Junction-to-CaseIRFD210 Vary tp to obtain Vps> required las 200 Top 786A BOTTOM 1.2A 160 0.012 420 Fig 12a. Unclamped Inductive Test Circuit 80 Viprypss 40 Eas, Single Pulse Energy (mJ) 0 25 75 100 125 150 50 Starting Ty, Junction Temperature(C) lag Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator ! <4) | 50K | ye Lone | | pF \ 10V L Sebe tee a + put. 7.08 a Ves 4) Ve ama fT]. Ig = I Charge Current Samping nesietore Fig 13a. .Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See page 1507 Appendix C: Part Marking information See page 1515 Intemational Rectifier 520