3-62
File Number
3182.4
ICL7665S
CMOS Micropower Over/Under Voltage
Detector
The ICL7665S Super CMOS Micropower Over/Under
Voltage Detector contains two low power, individually
programmable Voltage detectors on a single CMOS chip.
Requiring typically 3µA for operation, the device is intended
for battery-operated systems and instruments which require
high or low voltage warnings, settable trip points, or fault
monitoring and correction. The trip points and hysteresis of
the two voltage detectors are individually programmed via
external resistors. An internal bandgap-type reference
provides an accurate threshold voltage while operating from
any supply in the 1.6V to 16V range.
The ICL7665S, Super Programmable Over/Under Voltage
Detector is a direct replacement for the industry standard
ICL7665B offering
wider
operating voltage and temperature
ranges,
improved
threshold accuracy (ICL7665SA), and
temperature coefficient, and
guaranteed
maximum supply
current. All improvements are highlighted in the electrical
characteristics section.
All critical parameters are
guaranteed over the entire commercial and industrial
temperature ranges.
Features
• Guaranteed 10µA Maximum Quiescent Current Over
Temperature
• Guaranteed Wider Operating Voltage Range Over Entire
Operating Temperature Range
• 2% Threshold Accuracy (ICL7665SA)
• Dual Comparator with Precision Internal Reference
• 100ppm/oC Temperature Coefficient of Threshold Voltage
• 100% Tested at 2V
• Output Current Sinking Ability . . . . . . . . . . . . Up to 20mA
• Individually Programmable Upper and Lower Trip Voltages
and Hysteresis Levels
Applications
• Pocket Pagers
• Portable Instrumentation
• Charging Systems
• Memory Power Back-Up
• Battery Operated Systems
• Portable Computers
• Level Detectors
Pinout
ICL7665S
(SOIC, PDIP)
TOP VIEW
Ordering Information
PART NUMBER TEMP. RANGE
(oC) PACKAGE PKG. NO.
ICL7665SCBA 0 to 70 8 Ld SOIC (N) M8.15
ICL7665SCPA 0 to 70 8 Ld PDIP E8.3
ICL7665SACBA 0 to 70 8 Ld SOIC (N) M8.15
ICL7665SACPA 0 to 70 8 Ld PDIP E8.3
ICL7665SIBA -40 to 85 8 Ld SOIC (N) M8.15
ICL7665SIPA -40 to 85 8 Ld PDIP E8.3
ICL7665SAIBA -40 to 85 8 Ld SOIC (N) M8.15
ICL7665SAIPA -40 to 85 8 Ld PDIP E8.3
OUT 1
HYST 1
SET 1
GND
1
2
3
4
8
7
6
5
V+
OUT 2
SET 2
HYST 2
Data Sheet April 1999
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
3-63
Absolute Maximum Ratings Thermal Information
Supply Voltage (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +18V
Output Voltages OUT1 and OUT2. . . . . . . . . . . . . . . . .-0.3V to 18V
(with respect to GND) (Note 2)
Output Voltages HYST1 and HYST2 . . . . . . . . . . . . . .-0.3V to +18V
(with respect to V+) (Note 2)
Input Voltages SET1 and SET2. . . . . (GND -0.3V) to (V+ V- +0.3V)
(Note 2)
Maximum Sink Output OUT1 and OUT2 . . . . . . . . . . . . . . . . . 25mA
Maximum Source Output Current
HYST1 and HYST2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25mA
Operating Conditions
Temperature Range
ICL7665SC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
ICL7665SI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 150 N/A
Plastic SOIC Package . . . . . . . . . . . . . 180 N/A
Maximum Junction Temperature (Plastic) . . . . . . . . . . . . . . . .150oC
Maximum Junction Temperature (CERDIP). . . . . . . . . . . . . . .175oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
2. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to voltages greater than (V+
+0.3V) or less than (GND - 0.3V) may cause destructive device latchup. For these reasons, it is recommended that no inputs from external
sources not operating from the same power supply be applied to the device before its supply is established, and that in multiple supply systems,
the supply to the ICL7665S be turned on first. If this is not possible, current into inputs and/or outputs must be limited to ±0.5mA and voltages
must not exceed those defined above.
Electrical Specifications The specifications below are applicable to both the ICL7665S and ICL7665SA. V+ = 5V, TA = 25oC,
Test Circuit Figure 7. Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Operating Supply Voltage V+ ICL7665S TA = 25oC 1.6 - 16 V
0oC≤ TA≤ 70oC 1.8 - 16 V
-25oC≤ TA≤ 85oC 1.8 - 16 V
ICL7665SA 0oC≤ TA≤ 70oC 1.8 - 16 V
-25oC≤ TA≤ 85oC 1.8 - 16 V
Supply Current I+ GND ≤ VSET1, VSET2 ≤ V+, All Outputs Open Circuit
0oC≤ TA≤ 70oC V+ = 2V - 2.5 10 µA
V+ = 9V - 2.6 10 µA
V+ = 15V - 2.9 10 µA
-40oC≤ TA≤ 85oC V+ = 2V - 2.5 10 µA
V+ = 9V - 2.6 10 µA
V+ = 15V - 2.9 10 µA
Input Trip Voltage VSET1 ICL7665S 1.20 1.30 1.40 V
VSET2 1.20 1.30 1.40 V
VSET1 ICL7665SA 1.275 1.30 1.325 V
VSET2 1.275 1.30 1.325 V
Temperature Coefficient of
VSET ∆VSET
∆T
ICL7665S - 200 - ppm
ICL7665SA - 100 - ppm
Supply Voltage Sensitivity of
VSET1, VSET2 ∆VSET
∆VS
ROUT1, ROUT2, RHYST1, R2HYST2 = 1MΩ,
2V ≤ V+ ≤ 10V - 0.03 - %/V
ICL7665S
3-64
Output Leakage Currents of
OUT and HYST IOLK VSET = 0V or VSET ≥ 2V - 10 200 nA
IHLK - -10 -100 nA
IOLK V+ = 15V, TA = 70oC - - 2000 nA
IHLK - - -500 nA
Output Saturation Voltages VOUT1 VSET1 = 2V,
IOUT1 = 2mA V+ = 2V - 0.2 0.5 V
V+ = 5V - 0.1 0.3 V
V+ = 15V - 0.06 0.2 V
Output Saturation Voltages VHYST1 VSET1 = 2V,
IHYST1 = -0.5mA V+ = 2V - -0.15 -0.30 V
V+ = 5V - -0.05 -0.15 V
V+ = 15V - -0.02 -0.10 V
Output Saturation Voltages VOUT2 VSET2 = 0V,
IOUT2 = 2mA V+ = 2V - 0.2 0.5 V
V+ = 5V - 0.15 0.3 V
V+ = 15V - 0.11 0.25 V
Output Saturation Voltages VHYST2 VSET2 = 2V V+ = 2V, IHYST2 = -0.2mA - -0.25 -0.8 V
V+ = 5V, IHYST2 = -0.5mA - -0.43 -1.0 V
V+ = 15V, IHYST2 = -0.5mA - -0.35 -0.8 V
VSET Input Leakage Current ISET GND ≤ VSET ≤ V+ - 0.01 10 nA
∆ Input for Complete Output
Change ∆VSET ROUT = 4.7kΩ,
RHYST = 20kΩ,
VOUTLO = 1% V+,
VOUTHI = 99% V+
ICL7665S - 1.0 - mV
ICL7665SA - 0.1 - mV
Difference in Trip Voltages VSET1 -
VSET2 ROUT, RHYST = 1mW - ±5±50 mV
Output/Hysteresis
Difference ROUT, RHYST = 1mW ICL7665S - ±1-mV
ICL7665SA - ±0.1 - mV
NOTES:
3. Derate above 25oC ambient temperature at 4mW/oC
4. All significant improvements over the industry standard ICL7665 are highlighted.
Electrical Specifications The specifications below are applicable to both the ICL7665S and ICL7665SA. V+ = 5V, TA = 25oC,
Test Circuit Figure 7. Unless Otherwise Specified (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
AC Electrical Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OUTPUT DELAY TIMES
Input Going HI tSO1D VSET Switched between 1.0V to 1.6V
ROUT = 4.7kΩ, CL = 12pF
RHYST = 20kΩ, CL = 12pF
-85-µs
t
SH1D -90-µs
t
SO2D -55-µs
t
SH2D -55-µs
Input Going LO tSO1D VSET Switched between 1.6V to 1.0V
ROUT = 4.7kΩ, CL = 12pF
RHYST = 20kΩ, CL = 12pF
-75-µs
t
SH1D -80-µs
t
SO2D -60-µs
t
SH2D -60-µs
ICL7665S
3-65
Functional Block Diagram
Output Rise Times tO1R VSET Switched between 1.0V to 1.6V
ROUT = 4.7kΩ, CL = 12pF
RHYST = 20kΩ, CL = 12pF
- 0.6 - µs
tO2R - 0.8 - µs
tH1R - 7.5 - µs
tH2R - 0.7 - µs
Output Fall Times tO1F VSET Switched between 1.0V to 1.6V
ROUT = 4.7kΩ, CL = 12pF
RHYST = 20kΩ, CL = 12pF
- 0.6 - µs
tO2F - 0.7 - µs
tH1F - 4.0 - µs
tH2F - 1.8 - µs
AC Electrical Specifications (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
REF
SET1
SET2
+
-
+
-
V+
HYST2
HYST1
OUT2
OUT1
GND
CONDITIONS (Note 5)
VSET1 > 1.3V, OUT1 Switch ON, HYST1 Switch ON
VSET1 < 1.3V, OUT1 Switch OFF, HYST1 Switch OFF
VSET2 > 1.3V, OUT2 Switch OFF, HYST2 Switch ON
VSET2 < 1.3V, OUT2 Switch ON, HYST2 Switch OFF
NOTE:
5. See Electrical Specifications for exact thresholds.
ICL7665S
3-66
Typical Performance Curves
FIGURE 1. OUT1 SATURATION VOLTAGE AS A FUNCTION
OF OUTPUT CURRENT FIGURE 2. OUT2 SATURATION VOLTAGE AS A FUNCTION
OF OUTPUT CURRENT
FIGURE 3. HYST1 OUTPUT SATURATION VOLTAGE vs
HYST1 OUTPUT CURRENT FIGURE 4. HYST2 OUTPUT SATURATION VOLTAGE vs
HYST2 OUTPUT CURRENT
FIGURE5. SUPPLY CURRENT AS A FUNCTION OF AMBIENT
TEMPERATURE FIGURE 6. SUPPLY CURRENT AS A FUNCTION OF SUPPLY
VOLTAGE
VOLTAGE SATURATION (V)
2.0
1.5
1.0
0.5
00 5 10 15 20
IOUTOUT1 (mA)
V+ = 2V
V+ = 5V
V+ = 15V
V+ = 9V
0 5 10 15 20
2.0
1.5
1.0
0.5
0
VOLTAGE SATURATION (V)
IOUTOUT2 (mA)
V+ = 2V
V+ = 5V
V+ = 9V
V+ = 15V
-20 -16 -12 -8 -4 0 0
-0.4
-0.8
-1.2
-1.6
-2.0
HYST1 OUTPUT SATURATION VOLTAGE (V)
HYST1 OUTPUT CURRENT (mA)
V+ = 15V
V+ = 9V
V+ = 5V V+ = 2V
TA = 25oC
-5.0 -4.0 -3.0 -2.0 -1.0 0 0
-1.0
-2.0
-3.0
-4.0
-5.0
HYST2 OUTPUT CURRENT (mA)
HYST2 OUTPUT SATURATION VOLTAGE (V)
TA = 25oC
V+ = 15V
V+ = 9V
V+ = 5V V+ = 2V
V+ = 2V
V+ = 15V V+ = 9V
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
-25 0 +20 +40 +60
AMBIENT TEMPERATURE (oC)
SUPPLY CURRENT (µA)
0V ≤ VSET1, VSET2 ≤ V+ 0V ≤ VSET1, VSET2 ≤ V+
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
00 2 4 6 8 10 12 14 16
SUPPLY VOLTAGE (V+)
SUPPLY CURRENT (µA)
TA = -20oC
TA = 25oC
TA = 70oC
ICL7665S
3-67
Detailed Description
As shown in the Functional Diagram, the ICL7665S consists
of two comparators which compare input voltages on the
SET1 and SET2 terminals to an internal 1.3V bandgap
reference. The outputs from the two comparators drive open-
drain N-channel transistors for OUT1 and OUT2, and open-
drain P-channel transistors for HYST1 and HYST2 outputs.
Each section, the Under Voltage Detector and the Over
Voltage Detector, is independent of the other, although both
use the internal 1.3V reference. The offset voltages of the
two comparators will normally be unequal so VSET1 will
generally not quite equal VSET2.
The input impedance of the SET1 and SET2 pins are
extremely high, and for most practical applications can be
ignored. The four outputs are open-drain MOS transistors,
and when ON behave as low resistance switches to their
respective supply rails. This minimizes errors in setting up
the hysteresis, and maximizes the output flexibility. The
operating currents of the bandgap reference and the
comparators are around 100nA each.
Precautions
Junction isolated CMOS devices like the ICL7665S have an
inherent SCR or 4-layer PNPN structure distributed
throughout the die. Under certain circumstances, this can be
triggered into a potentially destructive high current mode.
This latchup can be triggered by forward-biasing an input or
output with respect to the power supply, or by applying
excessive supply voltages. In very low current analog
circuits, such as the ICL7665S, this SCR can also be
triggered by applying the input power supply extremely
rapidly (“instantaneously”), e.g., through a low impedance
battery and an ON/OFF switch with short lead lengths. The
rate-of-rise of the supply voltage can exceed 100V/µs in
such a circuit. A low impedance capacitor (e.g., 0.05µF disc
ceramic) between the V+ and GND pins of the ICL7665S
can be used to reduce the rate-of-rise of the supply voltage
in battery applications. In line operated systems, the rate-of-
rise of the supply is limited by other considerations, and is
normally not a problem.
If the SET voltages must be applied before the supply
voltage V+, the input current should be limited to less than
0.5mA by appropriate external resistors, usually required for
voltage setting anyway. A similar precaution should be taken
with the outputs if it is likely that they will be driven by other
circuits to levels outside the supplies at any time.
Simple Threshold Detector
Figure 9 shows the simplest connection of the ICL7665S for
threshold detection. From the graph 9B, it can be seen that
at low input voltage OUT1 is OFF, or high, while OUT2 is
ON, or low. As the input rises (e.g., at power-on) toward
VNOM (usually the eventual operating voltage), OUT2 goes
high on reaching VTR2. If the voltage rises above VNOM as
much as VTR1, OUT1 goes low. The equation giving VSET1
and VSET2 are from Figure 9A:
Since the voltage to trip each comparator is nominally 1.3V,
the value VIN for each trip point can be found from
and
1
2
3
4
8
7
6
5
OUT1
HYST1
SET1
GND
V+
OUT2
SET2
HYST2
INPUT
HYST2
OUT2
OUT1
V+
20
kΩ12
pF 12
pF 12
pF 12
pF
20
kΩ
4.7kΩ
HYST1
4.7
kΩ
1.0V
1.6V
FIGURE 7. TEST CIRCUITS
VSET1 =
VIN
R11 ; VSET2 =
VIN
R12
(R11 + R21)(R
12 + R22)
VTR1 =
VSET1
(R11 + R21)= 1.3 (R11 + R21)for detector 1
R11 R11
VTR2 =
VSET2
(R12 + R22)= 1.3 (R12 + R22)for detector 2
R12 R12
VSET1,
VSET2
tSO1D
tO1F tSO1D
tO1R
tSH1D
tH1R
tSH1D
tH1F
tSO2D
tO2R
tSO2D
tO2F
tSH2D
tH2R
tSH2D
tH2F
1.6V
1.0V
V+
GND
GND
GND
GND
(5V)
V+
(5V)
V+
(5V)
V+
(5V)
INPUT
OUT1
HYST1
OUT2
HYST2
FIGURE 8. SWITCHING WAVEFORMS
ICL7665S
3-68
Either detector may be used alone, as well as both together,
in any of the circuits shown here.
When VIN is very close to one of the trip voltage, normal
variations and noise may cause it to wander back and forth
across this level, leading to erratic output ON and OFF
conditions. The addition of hysteresis, making the trip points
slightly different for rising and falling inputs, will avoid this
condition.
Threshold Detector with Hysteresis
Figure 10A shows how to set up such hysteresis, while
Figure 10B shows how the hysteresis around each trip point
produces switching action at different points depending on
whether VIN is rising or falling (the arrows indicated direction
of change. The HYST outputs are basically switches which
short out R31 or R32 when VIN is above the respective trip
point. Thus if the input voltage rises from a low value, the trip
point will be controlled by R1N, R2N, and R3N, until the trip
point is reached. As this value is passed, the detector
changes state, R3N is shorted out, and the trip point
becomes controlled by only R1N and R2N, a lower value.
The input will then have to fall to this new point to restore the
initial comparator state, but as soon as this occurs, the trip
point will be raised again.
An alternative circuit for obtaining hysteresis is shown in
Figure 11. In this configuration, the HYST pins put the extra
resistor in parallel with the upper setting resistor. The values
of the resistors differ, but the action is essentially the same.
The governing equations are given in Table 1. These ignore
the effects of the resistance of the HYST outputs, but these
can normally be neglected if the resistor values are above
about 100kΩ.
OUT1
SET1 SET2
OUT2
V+
R21
RP2
VIN
RP1
R22
R11 R12
FIGURE 9A. CIRCUIT CONFIGURATION
OFF
VOUT
ON VTR2 VNOM VTR1
DETECTOR 2 DETECTOR 1
FIGURE 9B. TRANSFER CHARACTERISTICS
FIGURE 9. SIMPLE THRESHOLD DETECTOR
HYST1
SET1 SET2
HYST2
V+
VIN
OUT1 OUT2
R31 R32
R12
R11
R21 R22
OVERVOLTAGE OVERVOLTAGE
FIGURE 10A. CIRCUIT CONFIGURATION
VTR2 =
VSET2
(R12 + R22)= 1.3 (R12 + R22)for detector 2
R12 R12
VL2 VU2 VL1 VU1
ON
OUT
OFF VNOM
DETECTOR 2 DETECTOR 1
VIN
FIGURE 10B. TRANSFER CHARACTERISTICS
FIGURE 10. THRESHOLD DETECTOR WITH HYSTERESIS
ICL7665S
3-69
Applications
Single Supply Fault Monitor
Figure 12 shows an over/under voltage fault monitor for a
single supply. The over voltage trip point is centered around
5.5V and the under voltage trip point is centered around
4.5V. Both have some hysteresis to prevent erratic output
ON and OFF conditions. The two outputs are connected in a
wired OR configuration with a pullup resistor to generate a
power OK signal.
Multiple Supply Fault Monitor
The ICL7665S can simultaneously monitor several supplies
when connected as shown in Figure 13. The resistors are
chosen such that the sum of the currents through R21A,
R21B, and R31 is equal to the current through R11 when the
two input voltage are at the desired low voltage detection
point. The current through R11 at this point is equal to
1.3V/R11. The voltage at the VSET input depends on the
voltage of both supplies being monitored. The trip voltage of
one supply while the other supply is at the nominal voltage
will be different that the trip voltage when both supplies are
below their nominal voltages.
The other side of the ICL7665S can be used to detect the
absence of negative supplies. The trip points for OUT1
depend on both the negative supply voltages and the actual
voltage of the +5V supply.
TABLE 1. SET-POINT EQUATIONS
NO HYSTERESIS
Over-Voltage VTRIP =R11 + R21
R11 x VSET1
Over-Voltage VTRIP =R12 + R22
R12 x VSET2
HYSTERESIS PER FIGURE 10A
VU1 =R11 + R21 + R31
R11 x VSET1
Over-Voltage VTRIP
VL1 =R11 + R21
R11 x VSET1
VU2 =R12 + R22 + R32
R12 x VSET2
Under-Voltage VTRIP
VL2 =R12 + R22
R12 x VSET2
HYSTERESIS PER FIGURE 11
VU1 =R11 + R21
R11 x VSET1
Over-Voltage VTRIP
VL1 =R11 +
R21R31
R21 +
R31 x VSET1
R11
VU2 =R12 + R22
R12 x VSET2
Over-Voltage VTRIP
VL2 =R12 + R22R32
R22 + R32 x VSET2
R12
OUT1
SET1 SET2
OUT2
V+
R21
RP
VIN
RP
R22
R11 R12
HYST1 HYST2
R31 R32
FIGURE 11. AN ALTERNATIVE HYSTERESIS CIRCUIT
HYST1
VSET1 VSET2
HYST2
V+
OUT1 OUT2
324KΩ
13MΩ
5%
100KΩ
249KΩ
7.5MΩ
5%
+5V SUPPLY
POWER
OK
100KΩ
1MΩ
V+
OPEN VOLTAGE
DETECTOR
VU = 5.55V
VL = 5.45V
OPEN VOLTAGE
DETECTOR
VU = 4.55V
VL = 4.45V
R22
R32
R12
R11
R31
R21
FIGURE 12. FAULT MONITOR FOR A SINGLE SUPPLY
ICL7665S
3-70
Combination Low Battery Warning and Low
Battery Disconnect
When using rechargeable batteries in a system, it is
important to keep the batteries from being overdischarged.
The circuit shown in Figure 14 provides a low battery
warning and also disconnects the low battery from the rest of
the system to prevent damage to the battery. OUT1 is used
to shutdown the ICL7663S when the battery voltage drops to
the value where the load should be disconnected. As long as
VSET1 is greater than 1.3V, OUT1 is low, but when VSET1
drops below 1.3V, OUT1 goes high shutting off the
ICL7663S. OUT2 is used for low battery warning. When
VSET2 is greater than 1.3V, OUT2 is high and the low battery
warning is on. When VSET2 drops below 1.3V, OUT2 is low
and the low battery warning goes off. The trip voltage for low
battery warning can be set higher than the trip voltage for
shutdown to give advance low battery warning before the
battery is disconnected.
Power Fail Warning and Powerup/Powerdown
Reset
Figure 15 shows a power fail warning circuit with
powerup/powerdown reset. When the unregulated DC input
is above the trip point, OUT1 is low. When the DC input
drops below the trip point, OUT1 shuts OFF and the power
fail warning goes high. The voltage on the input of the 7805
will continue to provide 5V out at 1A until VIN is less than
7.3V, this circuit will provide a certain amount of warning
before the 5V output begins to drop.
The ICL7665S OUT2 is used to prevent a microprocessor
from writing spurious data to a CMOS battery backup
memory by causing OUT2 to go low when the 7805 5V
output drops below the ICL7665S trip point.
FIGURE 13. MULTIPLE SUPPLY FAULT MONITOR
HYST1
VSET1 VSET2
HYST2
V+
OUT1 OUT2
274kΩ
R21 100kΩ
22
POWER
OK
301
R11
+5V
-15V-5V
MΩ
kΩ787
kΩ+5V
1
MΩ
1.02MΩ
R21A
R21B
22MΩ
49.9kΩ
+5V
+15V
HYST1
SET1 SET2
HYST2
V+
OUT1 OUT2
R31 R32
R12
R11
R21 R22
GND
+
-
LOW BATTERY SHUTDOWN
1MΩ
V+
OUT1
SHUTDOWN VSET
OUT2
V+
GND
1MΩ
LOW BATTERY WARNING
SENSE
100Ω+5V
1A
ICL7663S
ICL7665S
FIGURE 14. LOW BATTERY WARNING AND LOW BATTERY DISCONNECT
ICL7665S
3-71
Simple High/Low Temperature Alarm
Figure 16 illustrates a simple high/low temperature alarm
which uses the ICL7665S with an NPN transistor. The
voltage at the top of R1 is determined by the VBE of the
transistor and the position of R1’s wiper arm. This voltage
has a negative temperature coefficient. R1 is adjusted so
that VSET2 equals 1.3V when the NPN transistor’s
temperature reaches the temperature selected for the high
temperature alarm. When this occurs, OUT2 goes low. R2is
adjusted so that VSET1 equals 1.3V when the NPN
transistor’s temperature reaches the temperature selected
for the low temperature alarm. When the temperature drops
below this limit, OUT1 goes low.
AC Power Fail and Brownout Detector
Figure 17 shows a circuit that detects AC undervoltage by
monitoring the secondary side of the transformer. The
capacitor, C1, is charged through R1 when OUT1 is OFF.
With a normal 100 VAC input to the transformer, OUT1 will
discharge C1once every cycle, approximately every 16.7ms.
When the AC input voltage is reduced, OUT1 will stay OFF,
so that C1 does not discharge. When the voltage on C1
reaches 1.3V, OUT2 turns OFF and the power fail warning
goes high. The time constant, R1C1, is chosen such that it
takes longer than 16.7ms to charge C1 1.3V.
HYST1
VSET1 VSET2
HYST2
V+
OUT1 OUT2
5.86kΩ
130kΩ
BACKUP
BATTERY
7805
5V REGULATOR
UNREGULATED
DC INPUT
1MΩ
22MΩ
2.2MΩ
1MΩ
715kΩ
1MΩ
RESET OR
WRITE
ENABLE
POWER
FAIL
WARNING
470µF
4700µF
ICL7665S
FIGURE 15. POWER FAIL WARNING AND POWERUP/POWERDOWN RESET
ICL7665S
3-72
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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HYST1
VSET1 VSET2
HYST2
V+
OUT1 OUT2
22kΩ
1.5MΩ
22MΩ
1MΩ
27kΩR4
R5
V+
1MΩ
R7
R2
R6
ALARM SIGNAL
FOR DRIVING
LEDS, BELLS,
ETC.
LOW TEMPERATURE
LIMIT ADJUST
+-
5V
470kΩ
R3
TEMPERATURE
SENSOR
(GENERAL PURPOSE
NPN TRANSISTOR)
10KΩ
HIGH
TEMPERATURE
LIMIT ADJUST
R1
ICL7665S
FIGURE 16. SIMPLE HIGH/LOW TEMPERATURE ALARM
110VAC
60Hz
20V
CENTERED
TAPPED
TRANS.
4700µF
601kΩ
100kΩ
HYST1
VSET1 VSET2
HYST2
OUT1 OUT2
1MΩ
1MΩ
7805
5V REGULATOR 5V, 1A
C1
R11MΩ
+5V
POWER FAIL
WARNING
ICL7665S
FIGURE 17. AC POWER FAIL AND BROWNOUT DETECTOR
ICL7665S
