HEF4794B
8-stage shift-and-store register LED driver
Rev. 9 — 7 November 2018 Product data sheet
1. General description
The HEF4794B is an 8-stage serial shift register. It has a storage latch associated with each
stage for strobing data from the serial input (D) to the parallel LED driver outputs (QP0 to QP7).
Data is shifted on the positive-going clock (CP) transitions. The data in each shift register stage
is transferred to the storage register when the strobe input (STR) is HIGH. Data in the storage
register appears at the outputs whenever the output enable input (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4794B devices.
Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in
cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next
negative going clock edge. This is used for cascading HEF4794B devices when the clock has a
slow rise time.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually
ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information
All types operate from -40 °C to +125 °C.
PackageType number
Name Description Version
HEF4794BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Nexperia HEF4794B
8-stage shift-and-store register LED driver
4. Functional diagram
15
2
OE
D
CP STR
3 1
QP0
QP1
QP2
QP3
QP4
QP5
QP6
QP7
QS1
QS2
9
10
4
5
6
7
14
13
12
11
001aaf111
Fig. 1. Logic symbol
001aag798
8-STAGE SHIFT
REGISTER
8-BIT STORAGE
REGISTER
OPEN-DRAIN
OUTPUTS
4
QP0
5
QP1
6
QP2
7
QP3
14
QP4
13
QP5
12
QP6
11
QP7
10 QS2
9QS1
D2
CP 3
STR 1
OE 15
Fig. 2. Functional diagram
aaa-029301
DD
CP
CP
Q
FF 0
D
LE
Q
LATCH 0
D
CP
Q
FF 7
D
LE
Q
LATCH 7
D
CP
Q
STAGES 1 TO 6STAGE 0 STAGE 7
QP2QP0
D QS2
QS1
LE
Q
LATCH
QP1
QP4
QP3
QP6
QP5 QP7
STR
OE
Fig. 3. Logic diagram
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 2 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
5. Pinning information
5.1. Pinning
HEF4794B
STR VDD
D OE
CP QP4
QP0 QP5
QP1 QP6
QP2 QP7
QP3 QS2
VSS QS1
001aag800
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Fig. 4. Pin configuration
5.2. Pin description
Table 2. Pin description
Symbol Pin Description
D 2 serial input
QP0 to QP7 4, 5, 6, 7, 14, 13, 12, 11 parallel output (open-drain)
QS1 9 serial output
QS2 10 serial output
CP 3 clock input
STR 1 strobe input
OE 15 output enable input
VDD 16 supply voltage
VSS 8 ground (0 V)
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 3 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state;
↑ = LOW-to-HIGH clock transition; ↓ = HIGH-to-LOW clock transition.
Input Parallel output Serial output
CP OE STR D QP0 QPn QS1[1] QS2[2]
L X X Z Z Q6S no change
L X X Z Z n.c. Q7S
H L X no change no change Q6S no change
H H L Z QPn - 1 Q6S no change
H H H L QPn - 1 Q6S no change
H H H no change no change no change Q7S
[1] Q6S = the data in register stage 6 before the LOW to HIGH clock transition.
[2] Q7S = the data in register stage 7 before the HIGH to LOW clock transition.
001aag801
clock input
data input
strobe input
output enable
input
internal Q0S
(FF0)
QP0 output
internal Q6S
(FF6)
QP6 output
serial QS1
output
serial QS2
output
Z-state
Z-state
Fig. 5. Timing diagram
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 4 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage -0.5 +18 V
IIK input clamping current VI < -0.5 V or VI > VDD + 0.5 V - ±10 mA
VIinput voltage -0.5 VDD + 0.5 V
QSn outputs;
VO < -0.5 V or VO > VDD + 0.5 V
- ±10 mAIOK output clamping current
QPn outputs; VO < -0.5 V - 40 mA
IIinput leakage current - ±10 mA
QSn outputs - ±10 mAIOoutput current
QPn outputs - 40 mA
Tstg storage temperature -65 +150 °C
Tamb ambient temperature -40 +125 °C
Tamb = -40 °C to +125 °CPtot total power dissipation
SO16 package [1] - 500 mW
P power dissipation per output - 100 mW
[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Max Unit
VDD supply voltage 3 15 V
VIinput voltage 0 VDD V
Tamb ambient temperature in free air -40 +125 °C
VDD = 5 V - 3.75 μs/V
VDD = 10 V - 0.5 μs/V
Δt/ΔV input transition rise and fall rate
VDD = 15 V - 0.08 μs/V
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 5 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
9. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.
Tamb = -40 °C Tamb = 25 °C Tamb = 85 °C Tamb = 125 °CSymbol Parameter Conditions VDD
Min Max Min Max Min Max Min Max
Unit
5 V 3.5 - 3.5 - 3.5 - 3.5 - V
10 V 7.0 - 7.0 - 7.0 - 7.0 - V
VIH HIGH-level
input voltage
|IO| < 1 μA
15 V 11.0 - 11.0 - 11.0 - 11.0 - V
5 V - 1.5 - 1.5 - 1.5 - 1.5 V
10 V - 3.0 - 3.0 - 3.0 - 3.0 V
VIL LOW-level input
voltage
|IO| < 1 μA
15 V - 4.0 - 4.0 - 4.0 - 4.0 V
5 V 4.95 - 4.95 - 4.95 - 4.95 - V
10 V 9.95 - 9.95 - 9.95 - 9.95 - V
VOH HIGH-level
output voltage
QSn outputs;
|IO| < 1 μA
15 V 14.95 - 14.95 - 14.95 - 14.95 - V
5 V - 0.05 - 0.05 - 0.05 - 0.05 V
10 V - 0.05 - 0.05 - 0.05 - 0.05 V
QSn outputs;
|IO| < 1 μA
15 V - 0.05 - 0.05 - 0.05 - 0.05 V
5 V - 0.75 - 0.75 - 1.5 - 1.5 V
10 V - 0.75 - 0.75 - 1.5 - 1.5 V
VOL LOW-level
output voltage
QPn outputs;
|IO| < 20 mA
15 V - 0.75 - 0.75 - 1.5 - 1.5 V
QSn outputs
VO = 2.5 V 5 V - -1.7 - -1.4 - -1.1 - -1.1 mA
VO = 4.6 V 5 V - -0.64 - -0.5 - -0.36 - -0.36 mA
VO = 9.5 V 10 V - -1.6 - -1.3 - -0.9 - -0.9 mA
IOH HIGH-level
output current
VO = 13.5 V 15 V - -4.2 - -3.4 - -2.4 - -2.4 mA
QSn outputs
VO = 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA
VO = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA
IOL LOW-level
output current
VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA
IIinput leakage
current
15 V - ±0.1 - ±0.1 - ±1.0 - ±1.0 μA
5 V - 2 - 2 - 15 - 15 μA
10 V - 2 - 2 - 15 - 15 μA
IOZ OFF-state
output current
QPn output
is HIGH;
VO = 15 V
15 V - 2 - 2 - 15 - 15 μA
5 V - 5 - 5 - 150 - 150 μA
10 V - 10 - 10 - 300 - 300 μA
IDD supply current IO = 0 A
15 V - 20 - 20 - 600 - 600 μA
CIinput
capacitance
- - - - - 7.5 - - - pF
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 6 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
10. Dynamic characteristics
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25 °C unless otherwise specified. For test circuit, see Fig. 10.
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
5 V [1] 132 ns + (0.55 ns/pF)CL- 160 320 ns
10 V 53 ns + (0.23 ns/pF)CL- 65 130 ns
CP to QS1;
see Fig. 6
15 V 37 ns + (0.16 ns/pF)CL- 45 90 ns
5 V 92 ns + (0.55 ns/pF)CL- 120 240 ns
10 V 39 ns + (0.23 ns/pF)CL- 50 100 ns
tPHL HIGH to LOW
propagation delay
CP to QS2;
see Fig. 6
15 V 32 ns + (0.16 ns/pF)CL- 40 80 ns
5 V [1] 102 ns + (0.55 ns/pF)CL- 130 260 ns
10 V 44 ns + (0.23 ns/pF)CL- 55 110 ns
CP to QS1;
see Fig. 6
15 V 32 ns + (0.16 ns/pF)CL- 40 80 ns
5 V 102 ns + (0.55 ns/pF)CL- 130 260 ns
10 V 49 ns + (0.23 ns/pF)CL- 60 120 ns
tPLH LOW to HIGH
propagation delay
CP to QS2;
see Fig. 6
15 V 37 ns + (0.16 ns/pF)CL- 45 90 ns
5 V - 240 480 ns
10 V - 80 160 ns
CP to QPn;
see Fig. 6
15 V - 55 110 ns
5 V - 140 280 ns
10 V - 70 140 ns
tPZL OFF-state to LOW
propagation delay
STR to QPn;
see Fig. 7
15 V - 55 110 ns
5 V - 170 340 ns
10 V - 75 150 ns
CP to QPn;
see Fig. 6
15 V - 60 120 ns
5 V - 100 200 ns
10 V - 40 100 ns
tPLZ LOW to OFF-state
propagation delay
STR to QPn;
see Fig. 7
15 V - 35 70 ns
5 V [2] - 100 200 ns
10 V - 55 110 ns
ten enable time OE to QPn;
see Fig. 8
15 V - 50 100 ns
5 V [2] - 80 160 ns
10 V - 40 80 ns
tdis disable time OE to QPn;
see Fig. 8
15 V - 30 60 ns
5 V [1][3] 35 ns + (1.00 ns/pF)CL- 85 170 ns
10 V 19 ns + (0.42 ns/pF)CL- 40 80 ns
tttransition time QS1, QS2;
see Fig. 6
15 V 16 ns + (0.28 ns/pF)CL- 30 60 ns
5 V 60 30 - ns
10 V 30 15 - ns
CP LOW and
HIGH; see Fig. 6
15 V 24 12 - ns
5 V 80 40 - ns
10 V 60 30 - ns
tWpulse width
STR HIGH;
see Fig. 7
15 V 24 12 - ns
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 7 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
5 V 60 30 - ns
10 V 20 10 - ns
tsu set-up time D to CP; see Fig. 9
15 V 15 5 - ns
5 V +5 -15 - ns
10 V 20 5 - ns
thhold time D to CP; see Fig. 9
15 V 20 5 - ns
5 V 5 10 - MHz
10 V 11 22 - MHz
fclk(max) maximum clock
frequency
CP; see Fig. 6
15 V 14 28 - MHz
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] ten is the same as tPZL and tdis is the same as tPLZ
[3] tt is the same as tTLH and tTHL
Table 8. Dynamic power dissipation
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol Parameter VDD Typical formula Where
5 V PD = 1 200 x fi + Σ(fo x CL) x VDD
2 μW
10 V PD = 5 550 x fi + Σ(fo x CL) x VDD
2 μW
PDdynamic power dissipation
15 V PD = 15 000 x fi + Σ(fo x CL) x VDD
2 μW
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
Σ(fo × CL) = sum of the outputs;
VDD = supply voltage in V.
10.1. Waveforms and test circuit
001aag222
tPLH
1/fclk(max)
VM
VM
VX
VI
VSS
VDD
VOL
VOL
VOL
tW
tPLZ
tPLH
tPZL
VY
CP input
QS1 output
QS2 output
tTHL
tTLH
90 %
10 %
VM
90 %
10 %
tPHL
tTHL
tTLH
QPn output
tW
tPHL
VOH
VOH
Parallel output measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. Propagation delay clock (CP) to output (QPn, QS1, QS2), clock pulse width and maximum clock frequency
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 8 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
Table 9. Measurement points
Supply Input Output
VDD VMVMVXVY
5 V to 15 V 0.5VDD 0.5VDD 0.1VO0.9VO
001aag802
CP input
tW
tPLZ tPZL
VM
VM
VX
VY
VI
VSS
VI
VSS
STR input
VDD
VOL
QPn output
Measurement points are given in Table 9.
VOL is the typical output voltage level that occurs with the output load.
Fig. 7. Strobe (STR) to output (QPn) propagation delays and the strobe pulse width
Measurement points are given in Table 9.
VOL is the typical output voltage level that occurs with the output load.
Fig. 8. Enable and disable times for input OE
VI
VM
tsu
th
tsu
th
VM
VSS
VI
VSS
VDD
CP input
D input
QPn output
001aag805
VOL
Measurement points are given in Table 9.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL is the typical output voltage level that occurs with the output load.
Fig. 9. Set-up and hold times for the data input (D)
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 9 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
001aag804
DUT
VEXT
RTCL
RL
tr
10 %
90 %
tf
VI
VIVO
VDD
VSS
input pulse
G
Test data is given in Table 10.
Definitions for test circuit:
DUT - Device Under Test.
RL = Load resistance.
CL = load capacitance.
RT = Termination resistance should be equal to output impedance of Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 10. Test circuit for measuring switching times
Table 10. Test data
Supply Input VEXT Load
VDD VItr, tftPLZ, tPZL tPLH, tPHL CLRL
5 V to 15 V VDD ≤ 20 ns VDD open 50 pF 1 kΩ
11. Application information
001aag806
QP0
D S2
PWM
dimmer input
OE STR
data
from remote
control panel
clock
CP
CONTROL
AND
SYNC
CIRCUITRY
QP7
HEF4794B
QP0
D S2
VDD
VDD
OE STR CP
QP7
HEF4794B
Fig. 11. Application example: serial-to-parallel data converting LED drivers
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 10 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
12. Package outline
X
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v M A
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A
1 A
2 A
3 b
p c D
(1) E
(1) (1)
e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10
1.45
1.25 0.25 0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8 1.27 6.2
5.8
0.7
0.6
0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004
0.057
0.049 0.01 0.019
0.014
0.0100
0.0075
0.39
0.38
0.16
0.15 0.05
1.05
0.041
0.244
0.228
0.028
0.020
0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Fig. 12. Package outline SOT109-1 (SO16)
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 11 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
13. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
HEF4794B v.9 20181107 Product data sheet - HEF4794B v.8
Modifications: The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Fig. 3 and Fig. 5 corrected.
HEF4794B v.8 20160404 Product data sheet - HEF4794B v.7
Modifications: Type number HEF4794BP (SOT38-4) removed.
HEF4794B v.7 20111116 Product data sheet - HEF4794B v.6
Modifications: Section Applications removed
Table 6:
IOH minimum values changed to maximum
added the unit pF for CI
HEF4794B v.6 20100901 Product data sheet - HEF4794B v.5
HEF4794B v.5 20100402 Product data sheet - HEF4794B v.4
HEF4794B v.4 20091222 Product data sheet - HEF4794B v.3
HEF4794B v.3 20080812 Product data sheet - HEF4794B v.2
HEF4794B v.2 19990630 Product specification - HEF4794B v.1
HEF4794B v.1 19940701 Product specification - -
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 12 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification This document contains data from
the preliminary specification.
Product [short]
data sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
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the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 13 / 14
Nexperia HEF4794B
8-stage shift-and-store register LED driver
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description............................................................. 3
6. Functional description................................................. 4
7. Limiting values............................................................. 5
8. Recommended operating conditions..........................5
9. Static characteristics....................................................6
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit........................................ 8
11. Application information............................................10
12. Package outline........................................................ 11
13. Revision history........................................................12
14. Legal information......................................................13
© Nexperia B.V. 2018. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 7 November 2018
HEF4794B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 9 — 7 November 2018 14 / 14