VND5E050AJ-E VND5E050AK-E Double channel high side driver with analog current sense for automotive applications Features Max transient supply voltage VCC 41 V Operating voltage range VCC 4.5 to 28 V Max On-state resistance (per ch.) RON 50 m Current limitation (typ) ILIMH 27 A Off-state supply current IS 2 A(1) General - Inrush current active management by power limitation - Very low standby current - 3.0 V CMOS compatible inputs - Optimized electromagnetic emissions - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC european directive - Very low current sense leakage Diagnostic functions - Proportional load current sense - High current sense precision for wide currents range - Current sense disable - Off-state open load detection - Output short to VCC detection - Overload and short to ground (power limitation) indication - Thermal shutdown indication Protections - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Over temperature shutdown with auto restart (thermal shutdown) July 2009 PowerSSO-24 - Reverse battery protected (see Figure 32) - Electrostatic discharge protection Applications 1. Typical value with all loads connected. PowerSSO-12 All types of resistive, inductive and capacitive loads Suitable as LED driver Description The VND5E050AJ-E and VND5E050AK-E are double channel high-side drivers manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-12 and PowerSSO24 packages. The VND5E050AJ-E and VND5E050AK-E are designed to drive 12V automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS compatible interface with any microcontroller. The devices integrate advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over-temperature shut-off with auto-restart and over-voltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, short-circuit to Vcc diagnosis and on & off state open load detection. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to allow sharing of the external sense resistor with other similar devices. Doc ID 14617 Rev 4 1/44 www.st.com 1 Contents VND5E050AJ-E / VND5E050AK-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 25 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 25 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 26 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.4.1 3.5 4 5 Short to VCC and off-state open load detection . . . . . . . . . . . . . . . . . . 27 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 29 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.2 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.1 ECOPACK(R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.2 PowerSSO-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.3 PowerSSO-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.4 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.5 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 2/44 Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Current sense (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Open load detection (8V<VCC<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Doc ID 14617 Rev 4 3/44 List of figures VND5E050AJ-E / VND5E050AK-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. 4/44 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Open load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Delay response time between rising edge of output current and rising edge of current sense (CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Off-state open load with external circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 30 PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON). . . . . 31 Thermal fitting model of a double channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 31 PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 33 PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 34 Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 34 PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 PowerSSO-12 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 PowerSS0-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Figure 48. List of figures PowerSSO-24 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Doc ID 14617 Rev 4 5/44 Block diagram and pin description 1 VND5E050AJ-E / VND5E050AK-E Block diagram and pin description Figure 1. Block diagram VCC Signal Clamp IN1 Control & Diagnostic 1 Power Clamp DRIVER IN2 VON Limitation Over temp. CH 1 Current Limitation OFF State Open load CS_ DIS VSENSEH CS1 CONTROL & DIAGNOSTIC Channels 2 Undervoltage CH 2 Current Sense OUT2 CS2 OUT1 LOGIC OVERLOAD PROTECTION (ACTIVE POWER LIMITATION) GND Table 1. Pin function Name VCC OUTPUT1,2 GND INPUT1,2 CURRENT SENSE1,2 CS_DIS 6/44 Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. Analog current sense pin, delivers a current proportional to the load current. Active high CMOS compatible pin, to disable the current sense pin. Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Figure 2. Block diagram and pin description Configuration diagram (top view) TAB = Vcc GND INPUT2 INPUT1 CURRENT SENSE1 CURRENT SENSE2 CS_DIS 1 2 3 4 5 6 12 11 10 9 8 7 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 VCC Vcc OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 Vcc GND N.C. INPUT2 N.C. INPUT1 N.C. CURRENT SENSE1 N.C. CURRENT SENSE2 CS_DIS. VCC TAB = VCC PowerSSO-12 Table 2. PowerSSO-24 Suggested connections for unused and not connected pins Connection / pin Current sense N.C. Output Input CS_DIS Floating Not allowed X X X X To ground Through 1 K resistor X Through 22 K Through 10 K Through 10 K resistor resistor resistor Doc ID 14617 Rev 4 7/44 Electrical specifications 2 VND5E050AJ-E / VND5E050AK-E Electrical specifications Figure 3. Current and voltage conventions IS VCC VCC VFn ICSD OUTPUT1 CS_DIS VCSD CURRENT SENSE1 IIN1 INPUT1 VIN1 IIN2 VIN2 OUTPUT2 IOUT1 VOUT1 ISENSE1 VSENSE1 IOUT2 VOUT2 INPUT2 GND CURRENT SENSE2 ISENSE2 VSENSE2 IGND Note: VFn = VOUTn - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 3. Absolute maximum ratings Symbol Value Unit VCC DC supply voltage 41 V -VCC Reverse DC supply voltage 0.3 V -IGND DC reverse ground pin current 200 mA IOUT DC output current Internally limited A -IOUT Reverse DC output current 20 A DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA 200 mA VCC - 41 to +VCC V IIN ICSD 8/44 Parameter -ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Table 3. Absolute maximum ratings (continued) Symbol Parameter Value Unit EMAX Maximum switching energy (single pulse) (L= 3mH; RL=0; Vbat=13.5V; Tjstart=150C; IOUT = IlimL(Typ.)) 104 mJ VESD Electrostatic discharge (human body model: R=1.5K; C=100pF) - Input - Current sense - CS_DIS - Output - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature - 40 to 150 C Storage temperature - 55 to 150 C Tj Tstg 2.2 Electrical specifications Thermal data Table 4. Thermal data Max value Symbol 2.3 Parameter Unit Rthj-case Thermal resistance junction-case (with one channel ON) Rthj-amb Thermal resistance junction-ambient PowerSSO-12 PowerSSO-24 2.7 2.7 C/W See Figure 36 See Figure 40 C/W Electrical characteristics Values specified in this section are for 8 V<VCC<28 V; -40 C<Tj<150 C, unless otherwise stated. Table 5. Symbol Power section Parameter Test conditions Min. Typ. Max. Unit 4.5 13 28 V 4.5 V VCC Operating supply voltage VUSD Undervoltage shutdown 3.5 VUSDhyst Undervoltage shutdown hysteresis 0.5 RON Vclamp On-state resistance(1) Clamp voltage V IOUT= 2A; Tj= 25C 50 IOUT= 2A; Tj= 150C 100 IOUT= 2A; VCC= 5V; Tj= 25C 65 IS= 20mA Doc ID 14617 Rev 4 41 46 52 m V 9/44 Electrical specifications Table 5. VND5E050AJ-E / VND5E050AK-E Power section (continued) Symbol IS IL(off1) VF Parameter Test conditions Supply current Off-state output current (1) Min. Typ. Max. Unit Off-state; VCC= 13V; Tj= 25C; VIN=VOUT=VSENSE=VCSD=0V 2(2) 5(2) A On-state; VCC= 13V; VIN= 5V; IOUT=0A 3 6 mA 0.01 3 VIN=VOUT= 0V; VCC= 13V; Tj=25C 0 VIN=VOUT= 0V; VCC= 13V; Tj=125C 0 A 5 Output - VCC diode voltage(1) -IOUT= 4A; Tj= 150C 0.7 V Max. Unit 1. For each channel. 2. PowerMOS leakage included. Table 6. Switching (VCC = 13V; Tj = 25C) Symbol Test conditions Min. Typ. td(on) Turn-on delay time RL= 6.5 (see Figure 6) 20 s td(off) Turn-off delay time RL= 6.5 (see Figure 6) 45 s dVOUT/dt(on) Turn-on voltage slope RL= 6.5 See Figure 26 V/s dVOUT/dt(off) Turn-off voltage slope RL= 6.5 See Figure 28 V/s WON Switching energy losses during twon RL= 6.5 (see Figure 6) 0.15 mJ WOFF Switching energy losses during twoff RL= 6.5 (see Figure 6) 0.3 mJ Table 7. Symbol Logic inputs Parameter Test conditions VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL 10/44 Parameter VIN=0.9V CS_DIS low level voltage ICSDL Low level CS_DIS current Max. Unit 0.9 V 1 A 2.1 V 10 0.25 7 V -0.7 0.9 VCSD=0.9V Doc ID 14617 Rev 4 A V 5.5 IIN=-1mA VCSDL Typ. VIN=2.1V IIN=1mA Input clamp voltage Min. 1 V A VND5E050AJ-E / VND5E050AK-E Table 7. Symbol Logic inputs (continued) Parameter VCSDH CS_DIS high level voltage ICSDH High level CS_DIS current VCSD(hyst) CS_DIS hysteresis voltage VCSCL Table 8. Symbol Electrical specifications Test conditions 10 0.25 ICSD=1mA CS_DIS clamp voltage Unit A V 5.5 7 V ICSD=-1mA -0.7 Protections and diagnostics (1) Parameter Test conditions Min. Typ. Max. Unit 19 27 38 38 A A VCC=13V 5V<VCC< 28V IlimL Short circuit current during thermal cycling VCC= 13V TR<Tj<TTSD TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of status VON Max. V VCSD=2.1V DC short circuit current VDEMAG Typ. 2.1 IlimH THYST Min. 7 150 175 TRS+1 TRS+5 200 C 7 Turn-off output voltage clamp C C 135 Thermal hysteresis (TTSD -TR) Output voltage drop limitation A C IOUT= 2A; VIN=0; L=6mH VCC-41 VCC-46 VCC-52 IOUT= 0.1A; Tj= -40C...+150C (see Figure 8) 25 V mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 9. Symbol Current sense (8V<VCC<18V) Parameter Test conditions Min. Typ. Max. Unit K0 IOUT/ISENSE IOUT= 0.05A; VSENSE=0.5V;VCSD=0V; Tj= -40C...150C 1440 2250 3630 K1 IOUT/ISENSE IOUT= 1A; VSENSE=4V;VCSD=0V; Tj= -40C...150C Tj= 25C...150C 1740 2070 2820 1750 2070 2562 dK1/K1(1) IOUT=1A; VSENSE= 4V; Current sense ratio VCSD=0V; drift TJ= -40 C to 150 C Doc ID 14617 Rev 4 -15 15 % 11/44 Electrical specifications Table 9. Symbol K2 dK2/K2(1) K3 dK3/K3(1) VND5E050AJ-E / VND5E050AK-E Current sense (8V<VCC<18V) (continued) Parameter IOUT/ISENSE Test conditions IOUT= 2A; VSENSE= 4V;VCSD= 0V; Tj= -40C...150C Tj= 25C...150C IOUT= 2 A; VSENSE= 4 V; Current sense ratio VCSD=0V; drift TJ= -40 C to 150 C IOUT/ISENSE IOUT= 4A; VSENSE= 4V;VCSD= 0V; Tj= -40C...150C Tj= 25C...150C IOUT= 4 A; VSENSE= 4 V; Current sense ratio VCSD= 0V; drift TJ= -40 C to 150 C Typ. Max. Unit 1900 2000 2395 1899 2000 2282 -9 9 % 1969 1990 2210 1950 1990 2153 -6 6 % 0 0 1 2 A 0 1 Open load on-state V = 5V, 8V<V <18V IN CC current detection = 5 A I SENSE threshold 4 20 VSENSE Max analog sense output voltage IOUT= 4A; VCSD= 0V 5 VSENSEH Analog sense output voltage in fault condition(2) VCC= 13V; RSENSE= 3.9 K 8 V ISENSEH Analog sense output current in fault condition(2) VCC= 13V; VSENSE= 5V 9 mA Delay response time from falling tDSENSE1H edge of CS_DIS pin VSENSE<4V, 0.5A<Iout<4A ISENSE= 90% of ISENSEMAX (see Figure 4) 40 100 s Delay response time from rising tDSENSE1L edge of CS_DIS pin VSENSE<4V, 0.5A<Iout<4A ISENSE=10% of ISENSEMAX (see Figure 4) 5 20 s Delay response tDSENSE2H time from rising edge of INPUT pin VSENSE<4V, 0.5A<Iout<4A ISENSE=90% of ISENSEMAX (see Figure 4) 80 250 s ISENSE0 Analog sense leakage current IOUT= 0A; VSENSE=0V; VCSD=5V; VIN=0V; Tj= -40C...150C VCSD= 0V; VIN=5V; Tj= -40C...150C IOUT= 2A; VSENSE= 0V; VCSD= 5V; VIN= 5V; Tj= -40C...150C IOL 12/44 Min. Doc ID 14617 Rev 4 mA V VND5E050AJ-E / VND5E050AK-E Table 9. Symbol Electrical specifications Current sense (8V<VCC<18V) (continued) Parameter Test conditions Delay response time between rising edge of output tDSENSE2H current and rising edge of current sense VSENSE < 4V, ISENSE = 90% of ISENSEMAX, IOUT = 90% of IOUTMAX IOUTMAX= 2A (see Figure 7) Delay response tDSENSE2L time from falling edge of INPUT pin VSENSE<4V, 0.5A<Iout<4A ISENSE=10% of ISENSEMAX (see Figure 4) Min. Typ. Max. Unit 80 40 s 250 s 1. Parameter guaranteed by design; it is not tested. 2. Fault condition includes: power limitation, over temperature and open load off-state detection. Table 10. Symbol Open load detection (8V<VCC<18V) Parameter Test conditions Min. Typ. Max. Unit 2 See Figure 5 4 V Open load off-state voltage detection threshold VIN = 0 V tDSTKON Output short circuit to VCC detection delay at turn-off See Figure 5 180 1200 s IL(off2)r Off-state output current at VOUT = 4V VIN=0V; VSENSE=0V VOUT rising from 0V to 4V -120 0 A IL(off2)f Off-state output current at VOUT = 2V VIN=0V; VSENSE=VSENSEH VOUT falling from VCC to 2V -50 90 A td_vol Delay response from output rising edge to VSENSE rising edge in open load VOUT= 4 V; VIN= 0V VSENSE= 90% of VSENSEH 20 s VOL Figure 4. Current sense delay characteristics INPUT CS_DIS LOAD CURRENT SENSE CURRENT tDSENSE2H tDSENSE1L Doc ID 14617 Rev 4 tDSENSE1H tDSENSE2L 13/44 Electrical specifications Figure 5. VND5E050AJ-E / VND5E050AK-E Open load off-state delay timing OUTPUT STUCK TO VCC VIN VOUT > VOL VSENSEH VCS tDSTKON Figure 6. Switching characteristics VOUT tWon tWoff 90% 80% dVOUT/dt(off) dVOUT/dt(on) tr 10% tf t INPUT td(on) td(off) t 14/44 Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Figure 7. Electrical specifications Delay response time between rising edge of output current and rising edge of current sense (CS enabled) VIN tDSENSE2H t IOUT IOUTMAX 90% IOUTMAX t ISENSE ISENSEMAX 90% ISENSEMAX t Figure 8. Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Von/Ron(T) Doc ID 14617 Rev 4 Iout 15/44 Electrical specifications Figure 9. VND5E050AJ-E / VND5E050AK-E IOUT/ISENSE vs IOUT Iout / Isense 3000 2800 max Tj = -40 C to 150 C 2600 2400 max Tj = 25 C to 150 C 2200 typical value 2000 min Tj = 25 C to 150 C 1800 min Tj = -40 C to 150 C 1600 1400 1200 1 1,5 2 2,5 3 3,5 IOUT (A) Figure 10. Maximum current sense ratio drift vs load current dk/k(%) 20 15 10 5 0 -5 -10 -15 -20 1 2 IOUT (A) Note: Parameter guaranteed by design; it is not tested. 16/44 Doc ID 14617 Rev 4 3 4 4 VND5E050AJ-E / VND5E050AK-E Table 11. Electrical specifications Truth table Input Output Sense (VCSD=0V)(1) Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 H X (no power limitation) Cycling (power limitation) Nominal Conditions Overload H VSENSEH Short circuit to GND (power limitation) L H L L 0 VSENSEH Open load off-state (with external pull-up) L H VSENSEH Short circuit to VCC (external pull-up disconnected) L H H H VSENSEH < Nominal Negative output voltage clamp L L 0 1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit. Doc ID 14617 Rev 4 17/44 Electrical specifications Table 12. VND5E050AJ-E / VND5E050AK-E Electrical transient requirements (part 1) Test levels(1) ISO 7637-2: 2004(E) test pulse Number of pulses or test times III IV 1 -75V -100V 2a +37V 3a Burst cycle/pulse repetition time Delays and Impedance Min. Max. 5000 pulses 0.5s 5s 2 ms, 10 +50V 5000 pulses 0.2s 5s 50s, 2 -100V -150V 1h 90ms 100ms 0.1s, 50 3b +75V +100V 1h 90ms 100ms 0.1s, 50 4 -6V -7V 1 pulse 100ms, 0.01 +65V +87V 1 pulse 400ms, 2 5b (2) 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 13. Electrical transient requirements (part 2) ISO 7637-2: 2004E test pulse III VI 1 C C 2a C C 3a C C 3b C C 4 C C C C (1) 5b Test level results 1. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 14. Electrical transient requirements (part 3) Class 18/44 Contents C All functions of the device performed as designed after exposure to disturbance. E One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E 2.4 Electrical specifications Waveforms Figure 11. Normal operation Normal operation INPUT Nominal load Nominal load IOUT VSENSE VCS_DIS Figure 12. Overload or short to GND Overload or Short to GND INPUT ILimH > Power Limitation Thermal cycling ILimL > IOUT VSENSE VCS_DIS Doc ID 14617 Rev 4 19/44 Electrical specifications VND5E050AJ-E / VND5E050AK-E Figure 13. Intermittent overload Intermittent Overload INPUT Overload ILimH > ILimL > IOUT VSENSEH> VSENSE VCS_DIS Figure 14. Off-state open load with external circuitry OFF-State Open Load with external circuitry INPUT VOUT > VOL VOUT VOL IOUT VSENSEH > tDSTK(on) VSENSE VCS_DIS 20/44 Doc ID 14617 Rev 4 Nominal load VND5E050AJ-E / VND5E050AK-E Electrical specifications Figure 15. Short to VCC Short to VCC Resistive Short to VCC Hard Short to VCC VOUT > VOL VOL VOUT IOUT tDSTK(on) tDSTK(on) VCS_DIS Figure 16. TJ evolution in overload or short to GND TJ evolution in Overload or Short to GND INPUT Self-limitation of fast thermal transients TTSD THYST TR TJ_START TJ ILimH > Power Limitation < ILimL IOUT Doc ID 14617 Rev 4 21/44 Electrical specifications 2.5 VND5E050AJ-E / VND5E050AK-E Electrical characteristics curves Figure 17. Off-state output current Figure 18. High level input current Iloff (nA) Iih (A) 550 5 500 4,5 Vin=2.1V Off State Vcc=13V Vin=Vout=0V 450 400 4 3,5 350 3 300 2,5 250 2 200 1,5 150 100 1 50 0,5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 100 125 150 175 100 125 150 175 150 175 Tc (C) Figure 19. Input clamp voltage Figure 20. Input low level Vicl (V) Vil (V) 7 2 6,8 1,8 lin=1mA 6,6 1,6 6,4 1,4 6,2 1,2 6 1 5,8 0,8 5,6 0,6 5,4 0,4 5,2 0,2 5 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 Tc (C) Figure 21. Input high level Figure 22. Input hysteresis voltage Vihyst (V) Vih (V) 1 4 0,9 3,5 0,8 3 0,7 2,5 0,6 0,5 2 0,4 1,5 0,3 1 0,2 0,5 0,1 0 0 -50 -25 0 25 50 75 100 125 150 175 22/44 -50 -25 0 25 50 75 Tc (C) Tc (C) Doc ID 14617 Rev 4 100 125 VND5E050AJ-E / VND5E050AK-E Electrical specifications Figure 23. On-state resistance vs Tcase Figure 24. On-state resistance vs VCC Ron (mOhm) Ron (mOhm) 300 100 Iout= 2A Vcc=13V 250 Tc=150C 80 Tc=125C 200 60 150 Tc=25C 40 Tc=-40C 100 20 50 0 0 -50 -25 0 25 50 75 100 125 150 0 175 5 10 15 20 25 30 35 40 Vcc (V) Tc (C) Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope Vusd (V) (dVout/dt )On (V/ms) 16 1000 900 14 Vcc=13V RI=6.5 Ohm 800 12 700 10 600 500 8 400 6 300 4 200 2 100 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 27. ILIMH vs Tcase Figure 28. Turn-off voltage slope Ilimh (A) (dVout/dt )Off (V/ms) 40 600 550 35 Vcc=13V RI= 6.5 Ohm 500 Vcc=13V 450 30 400 350 25 300 250 20 200 150 15 100 50 10 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 100 125 150 175 Tc (C) Doc ID 14617 Rev 4 23/44 Electrical specifications VND5E050AJ-E / VND5E050AK-E Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage Vcsdh (V) Vcsdcl(V) 4 10 3,5 9 Icsd = 1 mA 8 3 7 2,5 6 2 5 1,5 4 3 1 2 0,5 1 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Vcsdl (V) 3 2,5 2 1,5 1 0,5 0 -25 0 25 50 75 100 125 150 175 Tc (C) 24/44 -25 0 25 50 75 Tc (C) Figure 31. CS_DIS low level voltage -50 -50 Doc ID 14617 Rev 4 100 125 150 175 VND5E050AJ-E / VND5E050AK-E 3 Application information Application information Figure 32. Application schematic +5V VCC Rprot CS_DIS Dld CU Rprot INPUT OUTPUT Rprot CURRENT SENSE GND RSENSE VGND CEXT RGND DGND Note: Channel 2 has the same internal circuit as channel 1. 3.1 GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND 600mV / (IS(on)max) 2. RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are on in the case of several high side drivers sharing the same RGND. Doc ID 14617 Rev 4 25/44 Application information VND5E050AJ-E / VND5E050AK-E If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Section 3.1.2: Solution 2: diode (DGND) in the ground line. 3.1.2 Solution 2: diode (DGND) in the ground line A resistor (RGND=1k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os: -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak = - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 180k Recommended values: Rprot =10k, CEXT=10nF. 3.4 Current sense and diagnostic The current sense pin performs a double function (see Figure 33: Current sense and diagnostic): 26/44 Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a know ratio KX. The current ISENSE can be easily converted to a voltage VSENSE by means of an external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V minimum (see parameter VSENSE in Table 9: Current sense (8V<VCC<18V)). The Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Application information current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8V<VCC<18V)). Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a maximum current ISENSEH in case of the following fault conditions (refer to ): - Power limitation activation - Over-temperature - Short to VCC in off-state - Open load in off-state with additional external components. A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices. Figure 33. Current sense and diagnostic VPU VBAT VCC Main MOSn 41V PU_CMD Overtemperature IOUT/KX RPU + OL OFF ISENSEH VOL Pwr_Lim CS_DIS OUTn ILoff2r ILoff2f INPUTn VSENSEH CURRENT SENSEn GND RPROT To uC ADC 3.4.1 RSENSE Load RPD VSENSE Short to VCC and off-state open load detection Short to VCC A short circuit between VCC and output is indicated by the relevant current sense pin set to VSENSEH during the device off-state. Small or no current is delivered by the current sense during the on-state depending on the nature of the short circuit. Off-state open load with external circuitry Detection of an open load in off mode requires an external pull-up resistor RPU connecting the output to a positive supply voltage VPU. Doc ID 14617 Rev 4 27/44 Application information VND5E050AJ-E / VND5E050AK-E It is preferable VPU to be switched off during the module stand-by mode in order to avoid the overall stand-by current consumption to increase in normal conditions, i.e. when load is connected. An external pull down resistor RPD connected between output and GND is mandatory to avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and diagnostic). RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external circuitry: VOUT Pull - up _ OFF = RPD I L ( off 2) f < VOL min = 2V RPD 22 K is recommended. For proper open load detection in off-state, the external pull-up resistor must be selected according to the following formula: VOUT Pull - up _ ON = RPD VPU - RPU RPD I L ( off 2) r RPU + RPD > VOL max = 4V For the values of VOLmin,VOLmax, IL(off2)r and IL(off2)f see Table 10: Open load detection (8V<VCC<18V). 28/44 Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E 3.5 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 34. Maximum turn-off current versus inductance (for each channel) 100 A B C I (A) 10 1 0,1 1 L (mH) 10 100 A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL =0 .In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 14617 Rev 4 29/44 Package and PCB thermal data VND5E050AJ-E / VND5E050AK-E 4 Package and PCB thermal data 4.1 PowerSSO-12 thermal data Figure 35. PowerSSO-12 PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70m (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) RTHj _amb( C/ W) 70 65 60 55 50 45 40 35 30 0 2 4 6 PCB Cu heat sink area ( cm^ 2) 30/44 Doc ID 14617 Rev 4 8 10 VND5E050AJ-E / VND5E050AK-E Package and PCB thermal data Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON) ZTH ( C/ W) 100 Footprint 2 cm2 8 cm2 10 1 0,1 0,0001 0,001 0,01 0,1 1 Time ( s) 10 100 1000 Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-12 (a) a. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Doc ID 14617 Rev 4 31/44 Package and PCB thermal data Table 15. 4.2 VND5E050AJ-E / VND5E050AK-E Thermal parameters Area/island (cm2) Footprint R1=R7 (C/W) 0.7 R2=R8 (C/W) 2.8 R3 (C/W) 4 R4 (C/W) 2 8 8 8 7 R5 (C/W) 22 15 10 R6 (C/W) 26 20 15 C1=C7 (W.s/C) 0.001 C2=C8 (W.s/C) 0.0025 C3 (W.s/C) 0.05 C4 (W.s/C) 0.2 0.1 0.1 C5 (W.s/C) 0.27 0.8 1 C6 (W.s/C) 3 6 9 PowerSSO-24 thermal data Figure 39. PowerSSO-24 PC board Note: 32/44 Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70m (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Package and PCB thermal data Figure 40. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) RTHj_amb(C/W) 55 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) Doc ID 14617 Rev 4 33/44 Package and PCB thermal data VND5E050AJ-E / VND5E050AK-E Figure 41. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON) Equation 2: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Figure 42. Thermal fitting model of a double channel HSD in PowerSSO-24 (b) b. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 34/44 Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Table 16. Package and PCB thermal data Thermal parameters Area / island (cm2) Footprint R1= R7 (C/W) 0.4 R2= R8 (C/W) 2 R3 (C/W) 6 R4 (C/W) 7.7 R5 (C/W) 2 8 9 9 8 R6 (C/W) 28 17 10 C1= C7 (W.s/C) 0.001 C2= C8 (W.s/C) 0.0022 C3 (W.s/C) 0.025 C4 (W.s/C) 0.75 C5 (W.s/C) 1 4 9 C6 (W.s/C) 2.2 5 17 Doc ID 14617 Rev 4 35/44 Package and packing information VND5E050AJ-E / VND5E050AK-E 5 Package and packing information 5.1 ECOPACK(R) In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 PowerSSO-12 package information Figure 43. PowerSSO-12 package dimensions 36/44 Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Table 17. Package and packing information PowerSSO-12 mechanical data Symbol Millimeters Min. Typ. Max. A 1.25 1.62 A1 0 0.1 A2 1.10 1.65 B 0.23 0.41 C 0.19 0.25 D 4.8 5.0 E 3.8 4.0 e 0.8 H 5.8 6.2 h 0.25 0.5 L 0.4 1.27 k 0 8 X 1.9 2.5 Y 3.6 4.2 ddd 0.1 Doc ID 14617 Rev 4 37/44 Package and packing information 5.3 VND5E050AJ-E / VND5E050AK-E PowerSSO-24 package information Figure 44. PowerSSO-24 package dimensions 38/44 Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E Package and packing information PowerSSO-24 mechanical data(1) (2) Table 18. Millimeters Symbol Min. Typ. A Max. 2.45 A2 2.15 2.35 a1 0 0.1 b 0.33 0.51 c 0.23 0.32 D(3) 10.10 10.50 E(3) 7.40 7.60 e 0.8 e3 8.8 F 2.3 G H 0.1 10.1 10.5 h 0.4 k 0 8 L 0.55 0.85 O 1.2 Q 0.8 S 2.9 T 3.65 U 1.0 N 10 X 4.1 4.7 Y 6.5 7.1 1. No intrusion allowed inwards the leads. 2. Flash or bleeds on exposed die pad shall not exceed 0.5 mm per side 3. "D and E" do not include mold Flash or protusions. Mold Flash or protusions shall not exceed 0.15 mm per side Doc ID 14617 Rev 4 39/44 Package and packing information 5.4 VND5E050AJ-E / VND5E050AK-E PowerSSO-12 packing information Figure 45. PowerSSO-12 tube shipment (no suffix) B Base q.ty Bulk q.ty Tube length ( 0.5) A B C ( 0.1) C A 100 2000 532 1.85 6.75 0.6 All dimensions are in mm. Figure 46. PowerSSO-12 tape and reel shipment (suffix "TR") REEL DIMENSIONS Base q.ty Bulk q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components Empty components pockets saled with cover tape. User direction of feed 40/44 Doc ID 14617 Rev 4 No components 500mm min 500mm min VND5E050AJ-E / VND5E050AK-E 5.5 Package and packing information PowerSSO-24 packing information Figure 47. PowerSS0-24 tube shipment (no suffix) C Base qty Bulk qty Tube length (0.5) A B C (0.1) B 49 1225 532 3.5 13.8 0.6 All dimensions are in mm. A Figure 48. PowerSSO-24 tape and reel shipment (suffix "TR") REEL DIMENSIONS Base qty Bulk qty A (max) B (min) C (0.2) F G (+2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing W P0 (0.1) P D (0.05) D1 (min) F (0.1) K (max) P1 (0.1) 24 4 12 1.55 1.5 11.5 2.85 2 End All dimensions are in mm. Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets sealed with cover tape. User direction of feed Doc ID 14617 Rev 4 41/44 Order codes 6 VND5E050AJ-E / VND5E050AK-E Order codes Table 19. Device summary Order codes Package 42/44 Tube Tape and reel PowerSSO-12 VND5E050AJ-E VND5E050AJTR-E PowerSSO-24 VND5E050AK-E VND5E050AKTR-E Doc ID 14617 Rev 4 VND5E050AJ-E / VND5E050AK-E 7 Revision history Revision history Table 20. Document revision history Date Revision Changes 01-Apr-2008 1 Initial release. 05-Mar-2009 2 Changed Table 18: PowerSSO-24 mechanical data 19-Jun-2009 3 Table 18: PowerSSO-24 mechanical data: - Changed L (min) value from 0.6 to 0.55 - Changed L (max) value from 1 to 0.85 22-Jul-2009 4 Updated Figure 44: PowerSSO-24 package dimensions. Doc ID 14617 Rev 4 43/44 VND5E050AJ-E / VND5E050AK-E Please Read Carefully: Information in this document is provided solely in connection with ST products. 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