ICS551 1 TO 4 CLOCK BUFFER Description Features The ICS551 is a low cost, high-speed single input to four output clock buffer. Part of ICS' ClockBlocksTM family, this is our lowest cost, small clock buffer. * * * * * * * * * * * See the ICS552-02B for monolithic dual version of the ICS551 in a 20 pin QSOP. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact ICS for all of your clocking needs. Low skew (250 ps) outputs Pb-free packaging available Low cost clock buffer Packaged in 8-pin SOIC Input/Output clock frequency up to 160 MHz Non-inverting output clock Ideal for networking clocks Operating Voltages of 3.0 to 5 V Output Enable mode tri-states outputs Advanced, low power CMOS process Commercial and industrial temperature versions Block Diagram Q1 Q2 ICLK Q3 Q4 Output Enable 1 MDS 551 G I n t e gra te d C i r c u i t S y s t e m s 525 Race Stre et, San Jo se, CA 9 5126 Revision 091004 te l (40 8) 2 97-12 01 w w w. i c st . c o m ICS551 1 TO 4 CLOCK BUFFER Pin Assignment I CLK 1 8 OE Q1 2 7 VDD Q2 3 6 GND Q3 4 5 Q4 8 Pi n ( 150 mi l ) SOI C Pin Descriptions Pin Number Pin Name Pin Type Input Pin Description 1 ICLK Clock input. Internal pull-up resistor. 2 Q1 Output Clock output 1. 3 Q2 Output Clock output 2. 4 Q3 Output Clock output 3. 5 Q4 Output Clock output 4. 6 GND Power Connect to ground. 7 VDD Power Connect to 3.3 V or 5.5 V. 8 OE Input Output Enable. Tri-states outputs when low. Internal pull-up resistor. External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 F should be connected between VDD on pin 7 and GND on pin 6, as close to the device as possible. A 33 series terminating resistor may be used on each clock output if the trace is longer than 1 inch. 2 MDS 551 G In te grated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 Revision 091004 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS551 1 TO 4 CLOCK BUFFER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS551. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature, Commercial 0 to +70C Ambient Operating Temperature, Industrial -40 to +85C Storage Temperature -65 to +150C Junction Temperature 125C Soldering Temperature 260C Recommended Operation Conditions Parameter Min. Typ. Max. Units Ambient Operating Temperature -40 - +85 C Power Supply Voltage (measured in respect to GND) +3.0 +5.5 V DC Electrical Characteristics VDD=3.3 V 5% , Ambient temperature -40 to +85 C, unless stated otherwise Parameter Symbol Operating Voltage Conditions Max. Units 3.15 3.45 V VDD/2+0.7 3.8 V VDD/2-0.7 V VDD V 0.8 V VDD Input High Voltage, ICLK VIH Note 1 Input Low Voltage, ICLK VIL Note 1 Input High Voltage, OE VIH Input Low Voltage, OE VIL Output High Voltage VOH IOH = -25 mA Output Low Voltage VOL IOL = 25 mA Output High Voltage (CMOS Level) VOH IOH = -12 mA Operating Supply Current IDD No load, 135 MHz Nominal Output Impedance ZO Internal Pull-up Resistor RPU Typ. 2 2.4 V 0.4 VDD-0.4 ICLK 525 Ra ce Street, San Jose, CA 9512 6 V V 18 mA 20 TBD k 3 MDS 551 G In te grated Circuit Systems Min. Revision 091004 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS551 1 TO 4 CLOCK BUFFER Parameter Symbol Input Capacitance Short Circuit Current Conditions CIN OE pin CIN ICLK Min. Typ. Max. Units 5 pF TBD pF 50 mA IOS VDD = 5 V 5% , Ambient temperature -40 to +85 C, unless stated otherwise Parameter Symbol Operating Voltage Conditions Min. Max. Units 4.75 5.25 V VDD/2+1 5.5 V VDD/2-1 V VDD V 0.8 V VDD Input High Voltage, ICLK VIH Note 1 Input Low Voltage, ICLK VIL Note 1 Input High Voltage, OE VIH Input Low Voltage, OE VIL Output High Voltage VOH IOH = -35 mA Output Low Voltage VOL IOL = 35 mA Output High Voltage (CMOS Level) VOH IOH = -12 mA Operating Supply Current IDD No load, 135 MHz Nominal Output Impedance ZO Internal Pull-up Resistor RPU ICLK Input Capacitance CIN OE pin CIN ICLK Short Circuit Current Typ. 2 2.4 V 0.4 VDD-0.4 V V 35 mA 20 TBD k 5 pF TBD pF 80 mA IOS Notes: 1. Nominal switching threshold is VDD/2 AC Electrical Characteristics VDD = 3.3 V 5%, Ambient Temperature -40 to +85 C, unless stated otherwise Parameter Symbol Conditions Min. Input Frequency Typ. 0 Max. Units 160 MHz Output Frequency, 3.3 V 15 pF load. Note 4 160 MHz Output Frequency, 5 V 15 pF load. Note 4 135 MHz Output Clock Rise Time tOR 0.8 to 2.0 V 1.5 ns Output Clock Fall Time tOF 2.0 to 0.8 V 1.5 ns Propagation Delay, 3.3 V Note 1 135 MHz 2 4 8 ns Propagation Delay, 5 V Note 1 135 MHz 1.5 3 6 ns Output to Output Skew Note 2 Rising edges at VDD/2 250 ps Notes: 1. With rail to rail input clock 2. Between any 2 outputs with equal loading. 3. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock generators. 4. With external series resistor of 33 positioned close to each output pin. 4 MDS 551 G In te grated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 Revision 091004 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS551 1 TO 4 CLOCK BUFFER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Inches 8 E Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 D 4.80 5.00 .1890 .1968 E 3.80 4.00 .1497 .1574 H INDEX AREA e 1 2 D 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 0 8 0 8 A h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) 5 MDS 551 G In te grated Circuit Systems C 525 Ra ce Street, San Jose, CA 9512 6 Revision 091004 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS551 1 TO 4 CLOCK BUFFER Ordering Information Part / Order Number Marking Shipping packaging Package Temperature ICS551M ICS551MT ICS551MLF ICS551MLFT ICS551MLN ICS551MLNT ICS551MI ICS551MIT ICS551MILF ICS551MILFT ICS551M ICS551M 551MLF 551MLF 551MLN 551MLN ICS551MI ICS551MI 551MILF 551MILF Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 6 MDS 551 G In te grat ed Circuit Syst ems 525 Ra ce St reet , San Jose, CA 9512 6 Revision 091004 t el (4 08) 297-1 201 w w w. i c s t . c o m