LM193A,LM193QML
LM193A/LM193QML Low Power Low Offset Voltage Dual Comparators
Literature Number: SNOSAM2B
October 2007
LM193A/LM193QML
Low Power Low Offset Voltage Dual Comparators
General Description
The LM193 series consists of two independent precision volt-
age comparators with an offset voltage specification as low
as 2.0 mV max for two comparators which were designed
specifically to operate from a single power supply over a wide
range of voltages. Operation from split power supplies is also
possible and the low power supply current drain is indepen-
dent of the magnitude of the power supply voltage. These
comparators also have a unique characteristic in that the input
common-mode voltage range includes ground, even though
operated from a single power supply voltage.
Application areas include limit comparators, simple analog to
digital converters; pulse, squarewave and time delay gener-
ators; wide range VCO; MOS clock timers; multivibrators and
high voltage digital logic gates. The LM193 series was de-
signed to directly interface with TTL and CMOS. When oper-
ated from both plus and minus power supplies, the LM193
series will directly interface with MOS logic where their low
power drain is a distinct advantage over standard compara-
tors.
Advantages
■High precision comparators
■Reduced VOS drift over temperature
■Eliminates need for dual supplies
■Allows sensing near ground
■Compatible with all forms of logic
■Power drain suitable for battery operation
Features
■Available with radiation guarantee
—Total Ionizing Dose 100 krad(Si)
—ELDRS Free 100 krad(Si)
■Wide supply
—Voltage range: 2.0VDC to 36VDC
—Single or dual supplies: ±1.0V to ±18V
■Very low supply current drain (0.4 mA) — independent of
supply voltage
■Low input biasing current: 25 nA typ
■Low input offset current: ±5 nA typ
■Input common-mode voltage range includes ground
■Differential input voltage range equal to the power supply
voltage
■Low output saturation voltage,: 250 mV at 4 mA typ
■Output voltage compatible with TTL, DTL, ECL, MOS and
CMOS logic systems
Ordering Information
NS Part Number SMD Part Number NS Package Number Package Description
LM193H/883 H08C 8LD T0-99 Metal Can
LM193J/883 J08A 8LD CERDIP
LM193AH/883 5962–9452602MGA H08C 8LD T0-99 Metal Can
LM193AJ/883 5962–9452602MPA J08A 8LD CERDIP
LM193AH-QMLV 5962–9452602VGA H08C 8LD T0-99 Metal Can
LM193AJ-QMLV 5962–9452602VPA J08A 8LD CERDIP
LM193AHRQMLV (Note 11) 5962R9452602VGA
100 krad(Si)
H08C 8LD T0-99 Metal Can
LM193AJRQMLV (Note 11) 5962R9452602VPA
100 krad(Si)
J08A 8LD CERDIP
LM193AHRLQMLV (Note 12)
ELDRS Free
5962R9452603VGA
100 krad(Si)
H08C 8LD T0-99 Metal Can
LM193AJRLQMLV (Note 12)
ELDRS Free
5962R9452603VPA
100 krad(Si)
J08A 8LD CERDIP
© 2007 National Semiconductor Corporation 201396 www.national.com
LM193A/LM193QML Low Power Low Offset Voltage Dual Comparators
Schematic and Connection Diagrams
20139602
Metal Can Package
20139603
Dual-In-Line Package
20139601
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LM193A/LM193QML
Absolute Maximum Ratings (Note 1)
Supply Voltage, V+36VDC or ±18VDC
Differential Input Voltage (Note 6) 36V
Input Voltage −0.3VDC to +36VDC
Input Current (VIN< −0.3VDC) (Note 5) 50 mA
Maximum Junction Temperature 150°C
Power Dissipation (Note 2), (Note 3)
Metal Can 660 mW
CERDIP 780 mW
Output Short-Circuit to Ground (Note 4) Continuous
Operating Temperature Range −55°C ≤ TA ≤ +125°C
Storage Temperature Range −65°C ≤ TA ≤ +150°C
Thermal Resistance
θJA
Metal Can (Still Air) 174°C/W
Metal Can (500LF/Min Air flow) 99°C/W
CERDIP (Still Air) 146°C/W
CERDIP (500LF/Min Air flow) 85°C/W
θJC
Metal Can 44°C/W
CERDIP 33°C/W
Lead Temperature (Soldering, 10 seconds) 260°C
ESD Tolerance (Note 7) 500V
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup Description Temp°C
1 Static tests at 25
2 Static tests at 125
3 Static tests at -55
4 Dynamic tests at 25
5 Dynamic tests at 125
6 Dynamic tests at -55
7 Functional tests at 25
8A Functional tests at 125
8B Functional tests at -55
9 Switching tests at 25
10 Switching tests at 125
11 Switching tests at -55
12 Settling time at 25
13 Settling time at 125
14 Settling time at -55
3 www.national.com
LM193A/LM193QML
LM193 Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
ICC Supply Current 1.0 mA 1, 2, 3
+V = 36V 2.5 mA 1, 2, 3
ICEX Output Leakage Current +V = 30V, +VI = 1V,
VO = 30V, -VI = 0V
-0.65 0.65 µA 1
-1.0 1.0 µA 2, 3
ISink Output Sink Current VO = 1.5V, -VI = 1V,
+VI = 0V 6.0 mA 1
VSat Output Saturation Voltage ISink = 4mA, -VI = 1V,
+VI = 0V
0.4 V 1
0.7 V 2, 3
VIO Input Offset Voltage -5.0 5.0 mV 1
-9.0 9.0 mV 2, 3
+V = 30V -5.0 5.0 mV 1
-9.0 9.0 mV 2, 3
+V = 30V, VCM = 28.5V -5.0 5.0 mV 1
+V = 30V, VCM = 28.0V -9.0 9.0 mV 2, 3
±IIB Input Bias Current -100 -1.0 nA 1
-300 -1.0 nA 2, 3
IIO Input offset Current RS = 50Ω -25 25 nA 1
-100 100 nA 2, 3
VCM Common Mode Voltage +V = 30V (Note 8) 28.5 V 1
(Note 8) 28 V 2, 3
PSRR Power Supply Rejection Ratio +V = 5V to 30V,
RS = 50Ω 60 dB 1
CMRR Common Mode Rejection Ratio +V = 30V, RS = 50Ω
VCM = 0V to 28.5V, 60 dB 1
VDiff Differential Input Voltage +V = 30V, +VI = 36V,
-VI = 0V (Note 10) 500 nA 1, 2, 3
+V = 30V, +VI = 0V,
-VI = +36V (Note 10) 500 nA 1, 2, 3
AVS Voltage Gain +V = 15V, RPullUp = 15KΩ
1V ≤ VO ≤ 11V, (Note 9) 50 V/mV 4
AC Parameters
The following conditions apply, unless otherwise specified. +V = 5V
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
tRLH Response Time VOD = 5mV 5.0 µS 9
VOD = 50mV 0.8 µS 9
tRHL Response Time VOD = 5mV 2.5 µS 9
VOD = 50mV 0.8 µS 9
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LM193A/LM193QML
LM193A Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
ICC Supply Current RL = Infinity 1.0 mA 1, 2, 3
+V = 36V, RL = Infinity 2.5 mA 1, 2, 3
ICEX Output Leakage Current +V = 30V, +VI = 1V,
VO = 30, -VI = 0
-0.65 0.65 µA 1
-1.0 1.0 µA 2, 3
ISink Output Sink Current VO = 1.5V, -VI = 1V,
+VI = 0V
6.0 mA 1
4.0 mA 2, 3
VSat Output Saturation Voltage ISink = 4mA,
-VI = 1V, +VI = 0V
0.4 V 1
0.7 V 2, 3
VIO Input Offset Voltage -2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V -2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V, VCM = 28.5V -2.0 2.0 mV 1
+V = 30V, VCM = 28.0V -4.0 4.0 mV 2, 3
±IIB Input Bias Current VO = 1.5V -100 -1.0 nA 1
-300 -1.0 nA 2, 3
IIO Input offset Current RS = 50Ω, VO = 1.5V -25 25 nA 1
-100 100 nA 2, 3
VCM Common Mode Voltage +V = 30V (Note 8) 28.5 V 1
(Note 8) 28 V 2, 3
PSRR Power Supply Rejection Ratio +V = 5V to 30V,
RS = 50Ω 60 dB 1
CMRR Common Mode Rejection Ratio +V = 30V, RS = 50Ω
VCM = 0V to 28.5V, 60 dB 1
VDiff Differential Input Voltage +V = 30V, +VI = 36V, -VI = 0V (Note 10) 500 nA 1, 2, 3
+V = 30V, +VI = 0V, -VI = +36V (Note 10) 500 nA 1, 2, 3
AVS Voltage Gain +V = 15V, RPullUp = 15KΩ
1V ≤ VO ≤ 11V,
(Note 9) 50 V/mV 4
(Note 9) 25 V/mV 5, 6
AC Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
tRLH Response Time VOD = 5mV 5.0 µS 9
VOD = 50mV 0.8 µS 9
tRHL Response Time VOD = 5mV 2.5 µS 9
VOD = 50mV 0.8 µS 9
DC Drift Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Delta calculations performed on QMLV devices at Group B, Subgroup 5 only
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
VIO Input Offset Voltage +V = 30V -1.0 1.0 mV 1
±IIB Input Bias Current -15 15 nA 1
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LM193A/LM193QML
LM193A - 100K Radiation Electrical Characteristics
DC Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
ICC Supply Current RL = Infinity 1.0 mA 1, 2, 3
+V = 36V, RL = Infinity 2.5 mA 1, 2, 3
ICEX Output Leakage Current +V = 30V, +VI = 1V,
VO = 30, -VI = 0
-0.65 0.65 µA 1
-1.0 1.0 µA 2, 3
ISink Output Sink Current VO = 1.5V, -VI = 1V,
+VI = 0V
6.0 mA 1
4.0 mA 2, 3
VSat Output Saturation Voltage ISink = 4mA,
-VI = 1V, +VI = 0V
0.4 V 1
0.7 V 2, 3
VIO Input Offset Voltage -2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V -2.0 2.0 mV 1
-4.0 4.0 mV 2, 3
+V = 30V, VCM = 28.5V -2.0 2.0 mV 1
+V = 30V, VCM = 28.0V -4.0 4.0 mV 2, 3
±IIB Input Bias Current VO = 1.5V -100 -1.0 nA 1
-300 -1.0 nA 2, 3
IIO Input offset Current RS = 50Ω, VO = 1.5V -25 25 nA 1
-100 100 nA 2, 3
VCM Common Mode Voltage +V = 30V (Note 8) 28.5 V 1
(Note 8) 28 V 2, 3
PSRR Power Supply Rejection Ratio +V = 5V to 30V,
RS = 50Ω 60 dB 1
CMRR Common Mode Rejection Ratio +V = 30V, RS = 50Ω
VCM = 0V to 28.5V, 60 dB 1
VDiff Differential Input Voltage +V = 30V, +VI = 36V, -VI = 0V (Note 10) 500 nA 1, 2, 3
+V = 30V, +VI = 0V, -VI = +36V (Note 10) 500 nA 1, 2, 3
AVS Voltage Gain +V = 15V, RPullUp = 15KΩ
1V ≤ VO ≤ 11V,
(Note 9) 50 V/mV 4
(Note 9) 25 V/mV 5, 6
AC Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
tRLH Response Time VOD = 5mV 5.0 µS 9
VOD = 50mV 0.8 µS 9
tRHL Response Time VOD = 5mV 2.5 µS 9
VOD = 50mV 0.8 µS 9
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LM193A/LM193QML
LM193A - 100K Radiation Electrical Characteristics (Continued)
DC Drift Parameters
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Delta calculations performed on QMLV devices at Group B, Subgroup 5 only
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
VIO Input Offset Voltage +V = 30V -1.0 1.0 mV 1
±IIB Input Bias Current -15 15 nA 1
AC Parameters - Post Radiation Limits @ +25°C
The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
tRLH Response Time VOD = 50mV 1.0 µS 9
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/
θJA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: The LM193A must be derated based on a 150°C, TJmax. The low bias dissipation and the ON-OFF characteristic of the outputs keep the chip dissipation
very small (PD ≤ 100mV), provided the output transistors are allowed to saturate.
Note 4: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output
current is approximately 20 mA independent of the magnitude of V+.
Note 5: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP
transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action
on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the
time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again
returns to a value greater than −0.3VDC.
Note 6: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the
comparator will provide a proper output state. The low input voltage state must not be less than −0.3V (or 0.3V below the magnitude of the negative power supply,
if used).
Note 7: Human body model, 1.5KΩ in series with 100pF.
Note 8: Parameter guaranteed by the VIO tests.
Note 9: Datalog reading in K = V/mV.
Note 10: The value for VDiff is not datalogged during Read and Record.
Note 11: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table.
These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters
are guaranteed only for the conditions as specified in MIL-STD-883, Method 1019
Note 12: Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose
rate sensitivity (ELDRS) effect.
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LM193A/LM193QML
Typical Performance Characteristics
Supply Current
20139625
Input Current
20139626
Output Saturation Voltage
20139627
Response Time for Various Input Overdrives—Negative
Transition
20139628
Response Time for Various Input Overdrives—Positive
Transition
20139629
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LM193A/LM193QML
Application Hints
The LM193 series are high gain, wide bandwidth devices
which, like most comparators, can easily oscillate if the output
lead is inadvertently allowed to capacitively couple to the in-
puts via stray capacitance. This shows up only during the
output voltage transition intervals as the comparator change
states. Power supply bypassing is not required to solve this
problem. Standard PC board layout is helpful as it reduces
stray input-output coupling. Reducing the input resistors to
< 10 KΩ reduces the feedback signal levels and finally, adding
even a small amount (1.0 to 10 mV) of positive feedback
(hysteresis) causes such a rapid transition that oscillations
due to stray feedback are not possible. Simply socketing the
IC and attaching resistors to the pins will cause input-output
oscillations during the small transition intervals unless hys-
teresis is used. If the input signal is a pulse waveform, with
relatively fast rise and fall times, hysteresis is not required.
All input pins of any unused comparators should be tied to the
negative supply.
The bias network of the LM193 series establishes a drain
current which is independent of the magnitude of the power
supply voltage over the range of from 2.0 VDC to 30 VDC.
It is usually unnecessary to use a bypass capacitor across the
power supply line.
The differential input voltage may be larger than V+ without
damaging the device (Note 6). Protection should be provided
to prevent the input voltages from going negative more than
−0.3 VDC (at 25°C). An input clamp diode can be used as
shown in the applications section.
The output of the LM193 series is the uncommitted collector
of a grounded-emitter NPN output transistor. Many collectors
can be tied together to provide an output OR'ing function. An
output pull-up resistor can be connected to any available
power supply voltage within the permitted supply voltage
range and there is no restriction on this voltage due to the
magnitude of the voltage which is applied to the V+ terminal
of the LM193 package. The output can also be used as a
simple SPST switch to ground (when a pull-up resistor is not
used). The amount of current which the output device can sink
is limited by the drive available (which is independent of V+)
and the β of this device. When the maximum current limit is
reached (approximately 16mA), the output transistor will
come out of saturation and the output voltage will rise very
rapidly. The output saturation voltage is limited by the ap-
proximately 60Ω rSAT of the output transistor. The low offset
voltage of the output transistor (1.0mV) allows the output to
clamp essentially to ground level for small load currents.
Typical Applications
(V+=5.0 VDC)
Basic Comparator
20139635
Driving CMOS
20139636
Driving TTL
20139637
Squarewave Oscillator
20139638
Pulse Generator
20139639
* For large ratios of R1/R2,
D1 can be omitted.
Crystal Controlled Oscillator
20139640
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LM193A/LM193QML
Two-Decade High Frequency VCO
20139641
V* = +30 VDC
+250 mVDC ≤ VC ≤ +50 VDC
700Hz ≤ fo ≤ 100kHz
Basic Comparator
20139606
Non-Inverting Comparator with Hysteresis
20139609
Inverting Comparator with Hysteresis
20139610
Output Strobing
20139611
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LM193A/LM193QML
AND Gate
20139612
OR Gate
20139613
Large Fan-in AND Gate
20139614
Limit Comparator
20139615
Comparing Input Voltages of Opposite Polarity
20139616
ORing the Outputs
20139617
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LM193A/LM193QML
Zero Crossing Detector (Single Power Supply)
20139621
One-Shot Multivibrator
20139622
Bi-Stable Multivibrator
20139624
One-Shot Multivibrator with Input Lock Out
20139623
Zero Crossing Detector
20139643
Comparator With a Negative Reference
20139644
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LM193A/LM193QML
Time Delay Generator
20139607
Split-Supply Applications
(V+=+15 VDC and V−=−15 VDC)
MOS Clock Driver
20139642
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LM193A/LM193QML
Revision History
Date Released Revision Section Originator Changes
05/09/05 A New Release. Corporate format L. Lytle 2 MDS datasheets converted into one Corp.
datasheet format. MNLM193A-X Rev 1B3 &
MNLM193–X Rev 0E1. The Iout Vsat condition
for LM193 was changed to Isink for
consistency with the LM193A and JAN
electrical conditions. Also, redundant
parameters were removed from conditions
that were defined at beginning of the table.
MDS data sheets will be archived.
05/07/07 B Features, Ordering Information,
LM193A Electricals
Larry McGee Added Radiation Electrical information for
LM193A Device. Revision A will be archived.
10/29/07 C Features, Ordering Information, Notes Larry McGee Added reference to New ELDS NSID and SMD
Device 03, ELDRS Note 12. Revision B will be
archived.
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LM193A/LM193QML
Physical Dimensions inches (millimeters) unless otherwise noted
Metal Can Package (H)
NS Package Number H08C
Ceramic Dual-In-Line Package
NS Package Number J08A
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LM193A/LM193QML
Notes
LM193A/LM193QML Low Power Low Offset Voltage Dual Comparators
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