Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 LP295x Adjustable Micropower Voltage Regulators with Shutdown 1 Features 2 Applications * * * * * * * * * 1 * * * * * Wide Input Range: Up to 30 V Rated Output Current of 100 mA Low Dropout: 380 mV (Typ) at 100 mA Low Quiescent Current: 75 A (Typ) Tight Line Regulation: 0.03% (Typ) Tight Load Regulation: 0.04% (Typ) High VO Accuracy - 1.4% at 25C - 2% Over Temperature Can Be Used as a Regulator or Reference Stable With Low ESR (>12 m) Capacitors Current- and Thermal-Limiting Features LP2950 Only (3-Pin Package) - Fixed-Output Voltages of 5 V, 3.3 V, and 3 V LP2951 Only (8-Pin Package) - Fixed- or Adjustable-Output Voltages: 5 V/ADJ, 3.3 V/ADJ, and 3 V/ADJ - Low-Voltage Error Signal on Falling Output - Shutdown Capability - Remote Sense Capability for Optimal Output Regulation and Accuracy Applications with High-Voltage Input Power Supplies 3 Description The LP2950 and LP2951 devices are bipolar, lowdropout voltage regulators that can accommodate a wide input supply-voltage range of up to 30 V. The easy-to-use, 3-pin LP2950 is available in fixed-output voltages of 5 V, 3.3 V, and 3 V. However, the 8-pin LP2951 is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2951 outputs a fixed 5 V, 3.3 V, or 3 V (depending on the version). Alternatively, by leaving the SENSE and VTAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set to any value between 1.235 V to 30 V. Device Information(1) PART NUMBER LP2950 LP2951 PACKAGE BODY SIZE (NOM) TO-92 (3) 4.83 mm x 4.83 mm SOIC (8) 4.90 mm x 3.90 mm SON (8) 3.00 mm x 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Dropout Voltage vs Temperature 500 (V IN - V OUT ) - Dropout Voltage - mV 450 400 350 RIL = 100 m A 300 250 200 150 100 RIL = 100 A 50 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TA - Temperature - C 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 7 Absolute Maximum Ratings ...................................... Handling Ratings ...................................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 12 7.1 Overview ................................................................. 12 7.2 LP2950 Functional Block Diagram.......................... 12 7.3 LP2951 Functional Block Diagram.......................... 13 7.4 Feature Description................................................. 14 7.5 Device Functional Modes........................................ 15 8 Application and Implementation ........................ 16 8.1 Application Information............................................ 16 8.2 Typical Application ................................................. 16 9 Power Supply Recommendations...................... 19 10 Layout................................................................... 19 10.1 Layout Guidelines ................................................. 19 10.2 Layout Example .................................................... 19 11 Device and Documentation Support ................. 19 11.1 Trademarks ........................................................... 19 11.2 Electrostatic Discharge Caution ............................ 19 11.3 Glossary ................................................................ 19 12 Mechanical, Packaging, and Orderable Information ........................................................... 19 4 Revision History Changes from Revision H (March 2012) to Revision I Page * Added Applications, Device Information table, Handling Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ..... 1 * Removed Ordering Information table. .................................................................................................................................... 1 2 Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 5 Pin Configuration and Functions LP2951 D OR P PACKAGE (TOP VIEW) LP2950 LP PACKAGE (BOTTOM VIEW) OUTPUT GND INPUT OUTPUT SENSE SHUTDOWN GND 1 8 2 7 3 6 4 5 INPUT FEEDBACK VTAP ERROR LP2951 DRG PACKAGE (TOP VIEW) OUTPUT SENSE SHUTDOWN GND 1 8 2 7 3 4 Thermal Pad 6 5 INPUT FEEDBACK VTAP ERROR Pin Functions PIN NAME TYPE DESCRIPTION LP2950 LP2951 ERROR -- 5 O Active-low open-collector error output. Goes low when VOUT drops by 6% of its nominal value. FEEDBACK -- 7 I Determines the output voltage. Connect to VTAP (with OUTPUT tied to SENSE) to output the fixed voltage corresponding to the part version, or connect to a resistor divider to adjust the output voltage. GND 2 4 -- INPUT 3 8 I Supply input OUTPUT 1 1 O Voltage output. SENSE -- 2 I Senses the output voltage. Connect to OUTPUT (with FEEDBACK tied to VTAP) to output the voltage corresponding to the part version. SHUTDOWN -- 3 I Active-high input. Shuts down the device. VTAP -- 6 O Tie to FEEDBACK to output the fixed voltage corresponding to the part version. Ground Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 3 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VIN Continuous input voltage range -0.3 30 V VSHDN SHUTDOWN input voltage range -1.5 30 V VERROR ERROR comparator output voltage range (2) -1.5 30 V VFDBK FEEDBACK input voltage range (2) -1.5 30 V (1) (2) (3) (3) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. May exceed input supply voltage If load is returned to a negative power supply, the output must be diode clamped to GND. 6.2 Handling Ratings Tstg V(ESD) (1) (2) MIN MAX UNIT -65 150 C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 0 2500 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 0 1000 Storage temperature range Electrostatic discharge V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions MIN VIN Supply input voltage TJ Operating virtual junction temperature (1) MAX UNIT (1) 30 V -40 125 C See Minimum VIN is the greater of: (a) 2 V (25C), 2.3 V (over temperature), or (b) VOUT(MAX) + Dropout (Max) at rated IL 6.4 Thermal Information LP2950 THERMAL METRIC (1) LP LP2951 D P 3 PINS RJA (1) 4 Junction-to-ambient thermal resistance 140 DRG UNIT 52.44 C/W 8 PINS 97 84.6 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 6.5 Electrical Characteristics VIN = VOUT (nominal) + 1 V, IL = 100 A, CL = 1 F (5-V versions) or CL = 2.2 F (3-V and 3.3-V versions), 8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN 0.7 V PARAMETER TEST CONDITIONS TJ MIN TYP MAX UNIT 3-V VERSION (LP295x-30) VOUT Output voltage IL = 100 A 25C 2.970 3 3.030 -40C to 125C 2.940 3 3.060 25C 3.267 3.3 3.333 -40C to 125C 3.234 3.3 3.366 25C 4.950 5 5.050 -40C to 125C 4.900 5 5.100 V 3.3-V VERSION (LP295x-33) VOUT Output voltage IL = 100 A V 5-V VERSION (LP295x-50) VOUT Output voltage IL = 100 A V ALL VOLTAGE OPTIONS Output voltage temperature coefficient (1) IL = 100 A Line regulation (2) VIN = [VOUT(NOM) + 1 V] to 30 V Load regulation (2) IL = 100 A to 100 mA IL = 100 A VIN - VOUT Dropout voltage (3) IL = 100 mA IL = 100 A IGND GND current IL = 100 mA Dropout ground current VIN = VOUT(NOM) - 0.5 V, IL = 100 A Current limit VOUT = 0 V Thermal regulation (4) -40C to 125C 25C (1) (2) (3) (4) 0.03 -40C to 125C 25C 0.04% 25C 50 -40C to 125C -40C to 125C 8 -40C to 125C 25C mV 12 170 160 200 220 0.05 0.2 A mA A mA %/W 430 CL = 200 F LP2951-50: CL = 3.3 F, CBypass = 0.01 F between pins 1 and 7 120 200 -40C to 125C IL = 100 A 450 14 110 25C -- 80 140 -40C to 125C 25C %/V 600 75 25C 0.2% 150 380 25C 0.2 0.3% -40C to 125C 25C 100 ppm/C 0.4 -40C to 125C CL = 1 F (5 V only) Output noise (RMS), 10 Hz to 100 kHz 20 160 V 25C 100 Output or reference voltage temperature coefficient is defined as the worst-case voltage change divided by the total temperature range. Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are covered under the specification for thermal regulation. Dropout voltage is defined as the input-to-output differential at which the output voltage drops 100 mV, below the value measured at 1-V differential. The minimum input supply voltage of 2 V (2.3 V over temperature) must be observed. Thermal regulation is defined as the change in output voltage at a time (T) after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 50-mA load pulse at VIN = 30 V, VOUT = 5 V (1.25-W pulse) for t = 10 ms. Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 5 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com Electrical Characteristics (continued) VIN = VOUT (nominal) + 1 V, IL = 100 A, CL = 1 F (5-V versions) or CL = 2.2 F (3-V and 3.3-V versions), 8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN 0.7 V PARAMETER TEST CONDITIONS TJ MIN TYP MAX 25C 1.218 1.235 1.252 -40C to 125C 1.212 UNIT (LP2951-xx) 8-PIN VERSION ONLY ADJ Reference voltage VOUT = VREF to (VIN - 1 V), VIN = 2.3 V to 30 V, IL = 100 A to 100 mA V -40C to 125C Reference voltage temperature coefficient (1) FEEDBACK bias current 1.257 1.200 1.272 25C 20 25C 20 -40C to 125C FEEDBACK bias current temperature coefficient ppm/C 40 60 25C 0.1 25C 0.01 nA nA/C ERROR COMPARATOR Output leakage current VOUT = 30 V Output low voltage VIN = VOUT(NOM) - 0.5 V, IOL = 400 A -40C to 125C 2 25C 150 -40C to 125C 250 400 Upper threshold voltage (ERROR output high) (5) 25C 40 -40C to 125C 25 Lower threshold voltage (ERROR output low) (5) -40C to 125C 25C Hysteresis (5) 1 60 75 mV mV 95 140 25C A 15 mV mV SHUTDOWN INPUT Input logic voltage Low (regulator ON) High (regulator OFF) SHUTDOWN = 2.4 V SHUTDOWN input current SHUTDOWN = 30 V Regulator output current in shutdown (5) 6 VSHUTDOWN 2 V, VIN 30 V, VOUT = 0, FEEDBACK tied to VTAP -40C to 125C 25C 0.7 2 30 -40C to 125C 25C -40C to 125C 25C -40C to 125C 50 100 450 V 600 A 750 3 10 20 A Comparator thresholds are expressed in terms of a voltage differential equal to the nominal reference voltage (measured at VIN - VOUT = 1 V) minus FEEDBACK terminal voltage. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = VOUT/VREF = (R1 + R2)/R2. For example, at a programmed output voltage of 5 V, the ERROR output is specified to go low when the output drops by 95 mV x 5 V/1.235 V = 384 mV. Thresholds remain constant as a percentage of VOUT (as VOUT is varied), with the low-output warning occurring at 6% below nominal (typ) and 7.7% (max). Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 6.6 Typical Characteristics 100 10 RL = 90 Quiescent Current - mA 80 Input Current - A 1 0.1 70 60 50 40 30 20 10 0.01 0.0001 0.001 0.01 0 0.1 0 1 2 3 IL - Load Current - A Figure 1. Quiescent Current vs Load Current 200 4 5 6 7 8 9 10 VIN - Input Voltage - V Figure 2. Input Current vs Input Voltage (RL = OPEN) 120 RL = 50 k RL = 50 110 180 100 160 Input Current - mA Input Current - A 90 140 120 100 80 60 80 70 60 50 40 30 40 20 20 10 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 VIN - Input Voltage - V VIN - Input Voltage - V Figure 3. Input Current vs Input Voltage (RL = 50 k) Figure 4. Input Current vs Input Voltage (RL = 50 ) 5.100 120 110 IL = 0 5.075 5.050 5.025 Quiescent Current - A VOUT - Output Voltage - V 100 IL = 100 A 5.000 IL = 100 m A 4.975 4.950 90 80 70 60 50 40 30 20 4.925 10 4.900 -40 -25 -10 5 0 20 35 50 65 80 95 110 125 0 1 2 3 4 5 6 7 8 TA - Temperature - C VIN - Input Voltage - V Figure 5. Output Voltage vs Temperature Figure 6. Quiescent Current vs Input Voltage (IL = 0) Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 7 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com Typical Characteristics (continued) 8 IL = 100 mA 120 7 IL = 1 mA 110 Quiescent Current - mA Quiescent Current - A 100 90 80 70 60 50 40 30 6 5 4 3 2 20 1 10 0 0 1 2 3 4 5 6 7 8 0 0 VIN - Input Voltage - V 1 2 3 4 5 6 7 8 VIN - Input Voltage - V Figure 7. Quiescent Current vs Input Voltage (IL = 1 mA) Figure 8. Quiescent Current vs Input Voltage (IL = 100 mA) 100 10 9.5 IL = 100 m A V IN = 6 V 95 90 Quiescent Current - A Quiescent Current - mA 9 8.5 8 7.5 7 6.5 85 80 75 70 65 6 60 5.5 55 5 -40 -25 -10 IL = 100 A V IN = 6 V 5 20 35 50 65 80 50 -40 -25 -10 95 110 125 Figure 9. Quiescent Current vs Temperature (IL = 100 mA) 65 80 95 110 125 450 (V IN - V OUT ) - Dropout Voltage - mV Short-Circuit Current - mA 35 50 500 225 200 175 150 125 100 75 8 20 Figure 10. Quiescent Current vs Temperature (IL = 100 A) 250 50 -40 -25 -10 5 TA - Temperature - C TA - Temperature - C 5 20 35 50 65 80 95 110 125 400 350 RIL = 100 m A 300 250 200 150 100 RIL = 100 A 50 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TA - Temperature - C TA - Temperature - C Figure 11. Short-circuit Current vs Temperature Figure 12. Dropout Voltage vs Temperature Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 400 2 350 1.95 Minimum Operating Voltage - V (V IN - V OUT ) - Dropout Voltage - mV Typical Characteristics (continued) 300 250 200 150 100 50 1.9 1.85 1.8 1.75 1.7 1.65 0 0.0001 0.001 0.01 1.6 -40 -25 -10 0.1 IO - Output Current - A 20 35 50 65 80 95 110 125 TA - Temperature - C Figure 13. Dropout Voltage vs Dropout Current Figure 14. LP2951 Minimum Operating Voltage vs Temperature 30 8 25 7 50-kW resistor to external 5-V supply 20 6 ERROR Output - V FEEDBACK Bias Current - nA 5 15 10 5 0 -5 5 4 3 50-kW resistor to VOUT 2 -10 1 -15 -20 -55 0 -30 -5 20 45 70 95 0 120 145 1 2 3 4 5 6 7 8 V IN - Input Voltage - V TA - Temperature - C Figure 15. LP2951 FEEDBACK Bias Current vs Temperature Figure 16. LP2951 ERROR Comparator Output vs Input Voltage 2 ISINK - Sink Current - mA 1.75 TA = 125 Input Voltage 2 V/div 1.5 1.25 TA = 25 1 0.75 TA = -40 Output Voltage 80 mV/div 0.5 0.25 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VOL - Output Low Voltage - V Figure 18. Line Transient Response vs Time Figure 17. LP2951 ERROR Comparator Sink Current vs Output Low Voltage Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 9 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com Typical Characteristics (continued) Output Voltage 100 mV/div Output Load 100 mA/div Figure 19. Load Transient Response vs Time (VOUT = 5 V, CL = 10 F) Figure 20. Enable Transient Response vs Time (IL = 1 mA, CL = 1 F) 100 Output Impedance - Ohm IL = 100 A 10 1 IL = 1 m A 0.1 IL = 100 m A 0.01 10 1.E+01 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 1M 1.E+06 f - Frequency - Hz Figure 21. Enable Transient Response vs Time (IL = 1 mA, CL = 10 F) Figure 22. Output Impedance vs Frequency 100 90 VIN = 6 V CL = 1 F 80 Power-Supply Ripple Rejection - dB Power-Supply Ripple Rejection - dB 90 IL = 0 70 60 50 IL = 100 A 40 30 V IN = 6 V CL = 1 F 20 10 1.E+01 100 1.E+02 80 70 60 50 30 20 IL = 10 mA 1k 1.E+03 10k 1.E+04 100k 1.E+05 1M 1.E+06 10 1.E+01 10 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k 1.E+06 1M f - Frequency - Hz f - Frequency - Hz Figure 23. Ripple Rejection vs Frequency 10 IL = 1 mA 40 Figure 24. Output Impedance vs Frequency Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 Typical Characteristics (continued) 6 100 VIN = 6 V 80 CL = 1 F 5 IL = 50 mA Output Noise - V Power-Supply Ripple Rejection - dB 90 70 60 50 40 4 CL = 200 F 3 CL = 1 F 2 IL = 100 mA 30 1 20 10 10 1.E+01 CL = 3.3 F 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 0 1.E+01 10 1M 1.E+06 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k f - Frequency - Hz f - Frequency - Hz Figure 26. LP2951 Output Noise vs Frequency Figure 25. Output Impedance vs Frequency 1.7 1.6 Input Logic Voltage (OFF to ON) - V RP2P4 - Pin 2 to Pin 4 Resistance - k W 400 350 300 250 200 150 100 1.5 1.4 1.3 1.2 1.1 1 0.9 50 0 -40 -25 -10 0.8 -40 -25 -10 5 20 35 50 65 80 95 110 125 TA - Temperature - C 5 20 35 50 65 80 95 110 125 TA - Temperature - C Figure 28. Shutdown Threshold Voltage (Off to On) vs Temperature 1.7 6 1.6 5 1.5 Output Voltage Change - mV Input Logic Voltage (ON to OFF) - V Figure 27. LP2951 Divider Resistance vs Temperature 1.4 1.3 1.2 1.1 1 3 2 1 0 -1 0.9 0.8 -40 -25 -10 4 -2 5 20 35 50 65 80 95 110 125 0 5 10 15 20 25 30 VIN - Input Voltage - V TA - Temperature - C Figure 29. Shutdown Threshold Voltage (On to Off) vs Temperature Figure 30. Line Regulation vs Input Voltage Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 11 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com 7 Detailed Description 7.1 Overview The LP2950 and LP2951 devices are bipolar, low-dropout voltage regulators that can accommodate a wide input supply-voltage range of up to 30 V. The easy-to-use, 3-pin LP2950 is available in fixed-output voltages of 5 V, 3.3 V, and 3 V. However, the 8-pin LP2951 device is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2951 device outputs a fixed 5 V, 3.3 V, or 3 V (depending on the version). Alternatively, by leaving the SENSE and VTAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set to any value between 1.235 V to 30 V. The 8-pin LP2951 device also offers additional functionality that makes it particularly suitable for battery-powered applications. For example, a logic-compatible shutdown feature allows the regulator to be put in standby mode for power savings. In addition, there is a built-in supervisor reset function in which the ERROR output goes low when VOUT drops by 6% of its nominal value for whatever reasons - due to a drop in VIN, current limiting, or thermal shutdown. The LP2950 and LP2951 devices are designed to minimize all error contributions to the output voltage. With a tight output tolerance (0.5% at 25C), a very low output voltage temperature coefficient (20 ppm typical), extremely good line and load regulation (0.3% and 0.4% typical), and remote sensing capability, the parts can be used as either low-power voltage references or 100-mA regulators. 7.2 LP2950 Functional Block Diagram INPUT OUTPUT + Error Amplifier 1.23-V Reference GND 12 Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 7.3 LP2951 Functional Block Diagram FEEDBACK INPUT OUTPUT SENSE + Error Amplifier SHUTDOWN VTAP + ERROR 60 mV 1.235-V Reference GND Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 13 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com 7.4 Feature Description 7.4.1 ERROR Function (LP2951 Only) The LP2951 device has a low-voltage detection comparator that outputs a logic low when the output voltage drops by 6% from its nominal value, and outputs a logic high when VOUT has reached 95% of its nominal value. This 95% of nominal figure is obtained by dividing the built-in offset of 60 mV by the 1.235-V bandgap reference, and remains independent of the programmed output voltage. For example, the trip-point threshold (ERROR output goes high) typically is 4.75 V for a 5-V output and 11.4 V for a 12-V output. Typically, there is a hysteresis of 15 mV between the thresholds for high and low ERROR output. A timing diagram is shown in Figure 31 for ERROR vs VOUT (5 V), as VIN is ramped up and down. ERROR becomes valid (low) when VIN 1.3 V. When VIN 5 V, VOUT = 4.75 V, causing ERROR to go high. Because the dropout voltage is load dependent, the output trip-point threshold is reached at different values of VIN, depending on the load current. For instance, at higher load current, ERROR goes high at a slightly higher value of VIN, and vice versa for lower load current. The output-voltage trip point remains at ~4.75 V, regardless of the load. Note that when VIN 1.3 V, the ERROR comparator output is turned off and pulled high to its pullup voltage. If VOUT is used as the pullup voltage, rather than an external 5-V source, ERROR typically is ~1.2 V. In this condition, an equal resistor divider (10 k is suitable) can be tied to ERROR to divide down the voltage to a valid logic low during any fault condition, while still enabling a logic high during normal operation. Output Voltage 4.75 V ERROR 5V Input Voltage 1.3 V Figure 31. ERROR Output Timing Because the ERROR comparator has an open-collector output, an external pullup resistor is required to pull the output up to VOUT or another supply voltage (up to 30 V). The output of the comparator is rated to sink up to 400 A. A suitable range of values for the pullup resistor is from 100 k to 1 M. If ERROR is not used, it can be left open. 14 Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 Feature Description (continued) 7.4.2 Programming Output Voltage (LP2951 Only) A unique feature of the LP2951 device is its ability to output either a fixed voltage or an adjustable voltage, depending on the external pin connections. To output the internally programmed fixed voltage, tie the SENSE pin to the OUTPUT pin and the FEEDBACK pin to the VTAP pin. Alternatively, a user-programmable voltage ranging from the internal 1.235-V reference to a 30-V max can be set by using an external resistor divider pair. The resistor divider is tied to VOUT, and the divided-down voltage is tied directly to FEEDBACK for comparison against the internal 1.235-V reference. To satisfy the steady-state condition in which its two inputs are equal, the error amplifier drives the output to equal Equation 1: R1 o ae VOUT = VREF c 1 + / - IFBR1 e R2 o (1) Where: VREF = 1.235 V applied across R2 (see Figure 32) IFB = FEEDBACK bias current, typically 20 nA A minimum regulator output current of 1 A must be maintained. Thus, in an application where a no-load condition is expected (for example, CMOS circuits in standby), this 1-A minimum current must be provided by the resistor pair, effectively imposing a maximum value of R2 = 1.2 M (1.235 V/1.2 M 1 A). IFB = 20 nA introduces an error of 0.02% in VOUT. This can be offset by trimming R1. Alternatively, increasing the divider current makes IFB less significant, thus, reducing its error contribution. For instance, using R2 = 100 k reduces the error contribution of IFB to 0.17% by increasing the divider current to 12 A. This increase in the divider current still is small compared to the 600-A typical quiescent current of the LP2951 under no load. VOUT R1 FEEDBACK R2 Figure 32. Adjusting the Feedback on the LP2951 7.5 Device Functional Modes 7.5.1 Shutdown Mode These devices can be placed in shutdown mode with a logic high at the SHUTDOWN pin. Return the logic level low to restore operation or tie SHUTDOWN to ground if the feature is not being used. Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 15 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LP295x devices are used as low-dropout regulators with a wide range of input voltages. 8.2 Typical Application 330 k VOUT = 5 V 1 PF VOUT SENSE 8 2 7 FEEDBACK LP2951-50 VIN = 12 V VIN 1 1 PF SHUTDOWN 3 6 VTAP GND 4 5 ERROR Figure 33. 12-V to 5-V Converter 8.2.1 Design Requirements 8.2.1.1 Input Capacitor (CIN) A 1-F (tantalum, ceramic, or aluminum) electrolytic capacitor should be placed locally at the input of the LP2950 or LP2951 device if there is, or will be, significant impedance between the ac filter capacitor and the input; for example, if a battery is used as the input or if the ac filter capacitor is located more than 10 in away. There are no ESR requirements for this capacitor, and the capacitance can be increased without limit. 8.2.1.2 Output Capacitor (COUT) As with most PNP LDOs, stability conditions require the output capacitor to have a minimum capacitance and an ESR that falls within a certain range. 16 Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 Typical Application (continued) 8.2.2 Detailed Design Procedure 8.2.2.1 Capacitance Value For VOUT 5 V, a minimum of 1 F is required. For lower VOUT, the regulator's loop gain is running closer to unity gain and, thus, has lower phase margins. Consequently, a larger capacitance is needed for stability. For VOUT = 3 V or 3.3 V, a minimum of 2.2 F is recommended. For worst case, VOUT = 1.23 V (using the ADJ version), a minimum of 3.3 F is recommended. COUT can be increased without limit and only improves the regulator stability and transient response. Regardless of its value, the output capacitor should have a resonant frequency greater than 500 kHz. The minimum capacitance values given above are for maximum load current of 100 mA. If the maximum expected load current is less than 100 mA, then lower values of COUT can be used. For instance, if IOUT < 10 mA, then only 0.33 F is required for COUT. For IOUT < 1 mA, 0.1 F is sufficient for stability requirements. Thus, for a worst-case condition of 100-mA load and VOUT = VREF = 1.235 V (representing the highest load current and lowest loop gain), a minimum COUT of 3.3 F is recommended. For the LP2950/51, no load stability is inherent in the design -- a desirable feature in CMOS circuits that are put in standby (such as RAM keep-alive applications). If the LP2951 is used with external resistors to set the output voltage, a minimum load current of 1 A is recommended through the resistor divider. 8.2.2.2 Capacitor Types Most tantalum or aluminum electrolytics are suitable for use at the input. Film-type capacitors also work but at higher cost. When operating at low temperature, care should be taken with aluminum electrolytics, as their electrolytes often freeze at -30C. For this reason, solid tantalum capacitors should be used at temperatures below -25C. Ceramic capacitors can be used, but due to their low ESR (as low as 5 m to 10 m), they may not meet the minimum ESR requirement previously discussed. If a ceramic capacitor is used, a series resistor between 0.1 to 2 must be added to meet the minimum ESR requirement. In addition, ceramic capacitors have one glaring disadvantage that must be taken into account -- a poor temperature coefficient, where the capacitance can vary significantly with temperature. For instance, a large-value ceramic capacitor ( 2.2 F) can lose more than half of its capacitance as temperature rises from 25C to 85C. Thus, a 2.2-F capacitor at 25C drops well below the minimum COUT required for stability as ambient temperature rises. For this reason, select an output capacitor that maintains the minimum 2.2 F required for stability for the entire operating temperature range. 8.2.2.3 CBYPASS: Noise and Stability Improvement In the LP2951 device, an external FEEDBACK pin directly connected to the error amplifier noninverting input can allow stray capacitance to cause instability by shunting the error amplifier feedback to GND, especially at high frequencies. This is worsened if high-value external resistors are used to set the output voltage, because a high resistance allows the stray capacitance to play a more significant role; i.e., a larger RC time delay is introduced between the output of the error amplifier and its FEEDBACK input, leading to more phase shift and lower phase margin. A solution is to add a 100-pF bypass capacitor (CBYPASS) between OUTPUT and FEEDBACK; because CBYPASS is in parallel with R1, it lowers the impedance seen at FEEDBACK at high frequencies, in effect offsetting the effect of the parasitic capacitance by providing more feedback at higher frequencies. More feedback forces the error amplifier to work at a lower loop gain, so COUT should be increased to a minimum of 3.3 F to improve the regulator's phase margin. CBYPASS can be also used to reduce output noise in the LP2951 device. This bypass capacitor reduces the closed loop gain of the error amplifier at the high frequency, so noise no longer scales with the output voltage. This improvement is more noticeable with higher output voltages, where loop gain reduction is greatest. A suitable CBYPASS is calculated as shown in Equation 2: f(CBYPASS) ; 200 Hz (R) C(BYPASS) = 1 2p R1 200 Hz (2) On the 3-pin LP2950 device, noise reduction can be achieved by increasing the output capacitor, which causes the regulator bandwidth to be reduced, thus eliminating high-frequency noise. However, this method is relatively inefficient, as increasing COUT from 1 F to 220 F only reduces the regulator's output noise from 430 V to 160 V (over a 100-kHz bandwidth). Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 17 LP2950, LP2951 SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 www.ti.com Typical Application (continued) 8.2.2.4 ESR Range The regulator control loop relies on the ESR of the output capacitor to provide a zero to add sufficient phase margin to ensure unconditional regulator stability; this requires the closed-loop gain to intersect the open-loop response in a region where the open-loop gain rolls off at 20 dB/decade. This ensures that the phase is always less than 180 (phase margin greater than 0) at unity gain. Thus, a minimum-maximum range for the ESR must be observed. The upper limit of this ESR range is established by the fact that an ESR that is too high could result in the zero occurring too soon, causing the gain to roll off too slowly. This, in turn, allows a third pole to appear before unity gain and introduces enough phase shift to cause instability. This typically limits the maximum ESR to approximately 5 . Conversely, the lower limit of the ESR range is tied to the fact that an ESR that is too low shifts the zero too far out, past unity gain, which allows the gain to roll off at 40 dB/decade at unity gain, resulting in a phase shift of greater than 180. Typically, this limits the minimum ESR to approximately 20 m to 30 m. For specific ESR requirements, see Typical Characteristics. 8.2.3 Application Curves Output Voltage 100 mV/div Output Load 100 mA/div Figure 34. Load Transient Response vs Time (VOUT = 5 V, CL = 1 F) 18 Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 LP2950, LP2951 www.ti.com SLVS582I - APRIL 2006 - REVISED NOVEMBER 2014 9 Power Supply Recommendations Maximum input voltage should be limited to 30 V for proper operation. Place input and output capacitors as close to the device as possible to take advantage of their high frequency noise filtering properties. 10 Layout 10.1 Layout Guidelines * * Make sure that traces on the input and outputs of the device are wide enough to handle the desired currents. For this device, the output trace will need to be larger in order to accommodate the larger available current. Place input and output capacitors as close to the device as possible to take advantage of their high frequency noise filtering properties. 10.2 Layout Example 1 1 PF 8 2 7 LP2951-50 3 6 4 5 1 PF ERROR can be left floating if not used Figure 35. LP2951 Layout Example (D or P Package) 11 Device and Documentation Support 11.1 Trademarks All trademarks are the property of their respective owners. 11.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.3 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright (c) 2006-2014, Texas Instruments Incorporated Product Folder Links: LP2950 LP2951 19 PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LP2950-30LP ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 KY5030 LP2950-30LPR ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 KY5030 LP2950-30LPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 KY5030 LP2950-33LPE3 ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 KY5033 LP2950-33LPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type 0 to 0 KY5033 LP2950-50LPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type -40 to 125 KY5050 LP2951-30D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5130 LP2951-30DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5130 LP2951-30DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5130 LP2951-30DRGR ACTIVE SON DRG 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ZUD LP2951-33D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5133 LP2951-33DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5133 LP2951-33DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5133 LP2951-33DRGR ACTIVE SON DRG 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ZUE LP2951-50D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5150 LP2951-50DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5150 LP2951-50DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 KY5150 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2014 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LP2951-50DRGR ACTIVE SON DRG 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ZUF LP2951D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LP2951 LP2951DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LP2951 LP2951DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LP2951 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2014 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LP2951-33, LP2951-50 : * Automotive: LP2951-33-Q1, LP2951-50-Q1 NOTE: Qualified Version Definitions: * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 3-Jul-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device LP2951-30DR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LP2951-30DRGR SON DRG 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 LP2951-33DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LP2951-33DRGR SON DRG 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 LP2951-50DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LP2951-50DRGR SON DRG 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 LP2951DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 3-Jul-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP2951-30DR SOIC D 8 2500 340.5 338.1 20.6 LP2951-30DRGR SON DRG 8 3000 367.0 367.0 35.0 LP2951-33DR SOIC D 8 2500 340.5 338.1 20.6 LP2951-33DRGR SON DRG 8 3000 367.0 367.0 35.0 LP2951-50DR SOIC D 8 2500 340.5 338.1 20.6 LP2951-50DRGR SON DRG 8 3000 367.0 367.0 35.0 LP2951DR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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