E-L6201PSTR - STMicroelectronics

L6201

L6202 - L6203

DMOS FULL BRIDGE DRIVER

SUPPLY VOLTAGE UP TO 48V

5A MA X PEA K C URRENT (2A max. for L6201)

TOTAL RMS CURRENT UP TO

L6201: 1A; L6202: 1.5A; L6203/L6201PS: 4A

RDS (ON) 0.3 Ω (t ypical value at 25 °C)

CRO SS COND UCTION PR OTECT ION

TTL COMPATIBLE DRIVE

OPERATING FREQUENCY UP TO 100 KHz

THERMA L SHUTDOW N

INTERNAL LOGIC SUPPLY

HIGH EFFI C IENCY

DESCRIPTION

The I.C. is a full bridge driver for motor control ap-

plications realized in Multipower-BCD technology

which combines isolated DMOS power transistors

with CMOS and Bipolar circuits on the same chip.

By using mixed t ec hnology it has been possible to

optimize the logic circuitry and the power st age to

achieve the best possible performance. The

DMOS output transistors can operate at supply

voltages up to 42V and efficiently at high switch-

ing speeds. All the logic inputs are TTL, CMOS

and µC compatible. Each channel (half -bridge) of

the device is controlled by a separate logic input,

while a common enable controls both channels.

The I.C. is mounted in three different packages.

This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

July 2003

MULTIPOWER BCD TECHNOLOGY

BLOCK DIAGRAM

ORDERING NUMBERS:

L6201 (SO20)

L6201PS (PowerSO20)

L6202 (Powerdip18)

L6203 (Multiwatt)

SO20 (12+4+4)

Multiwatt11

Powerdip 12+3+3

PowerSO20

1/20

PIN C ONNECTIONS (Top view)

SO20

GND

N.C. N.C.

N.C.

OUT2

OUT1

BOOT1

IN1

N.C.

GND 10

11 GND

D95IN216

IN2

BOOT2

SENSE

Vref

ENABLE

N.C.

GND

PowerSO20

MULTIWATT11

POWERDIP

L6201 - L6202 - L6203

2/20

PINS FUNCTIONS

Device Name Function

L6201 L6201PS L6202 L6203

1 16 1 10 SENSE A resistor Rsense connected to this pin provides feedback for

motor current control.

2 17 2 11 ENAB

LE When a logic high is present on this pin the DMOS POWER

transistors are enabled to be selectively driven by IN1 and IN2.

3 2,3,9,12,

18,19 3 N.C. Not Connected

4,5 – 4

GND Common Ground Terminal

– 1, 10 5 GND Common Ground Terminal

6,7 – 6 GND Common Ground Terminal

8 – 7 N.C. Not Connected

9 4 8 1 OUT2 Ouput of 2nd Half Bridge

10 5 9 2 VsSupply Voltage

11 6 10 3 OUT1 Output of first Half Bridge

12 7 11 4 BOOT1 A boostrap capacitor connected to this pin ensures efficient

driving of the upper POWER DMOS transistor.

13 8 12 5 IN1 Digital Input from the Motor Controller

14,15 – 13

GND Common Ground Terminal

– 11, 20 14 GND Common Ground Terminal

16,17 – 15 GND Common Ground Terminal

18 13 16 7 IN2 Digital Input from the Motor Controller

19 14 17 8 BOOT2 A boostrap capacitor connected to this pin ensures efficient

driving of the upper POWER DMOS transistor.

20 15 18 9 Vref Internal voltage reference. A capacitor from this pin to GND is

recommended. The internal Ref. Voltage can source out a

current of 2mA max.

Symbol Parameter Value Unit

VsPower Supply 52 V

VOD Differential Output Voltage (between Out1 and Out2) 60 V

VIN, VEN Input or Enable Voltage – 0.3 to + 7 V

IoPulsed Output Current for L6201PS/L6202/L6203 (Note 1)

– Non Repetitive (< 1 ms) for L6201

for L6201PS/L6202/L6203

DC Output Current for L6201 (Note 1)

Vsense Sensing Voltage – 1 to + 4 V

VbBoostrap Peak Voltage 60 V

Ptot Total Power Dissipation:

Tpins = 90°C for L6201

for L6202

Tcase = 90°C for L6201PS/L6203

Tamb = 70°C for L6201 (Note 2)

for L6202 (Note 2)

for L6201PS/L6203 (Note 2)

0.9

1.3

2.3

Tstg, TjStorage and Junction Temperature – 40 to + 150 °C

Note 1: Pulse width limited only by junction temperature and transient thermal impedance (see thermal characteristics)

Note 2: Mounted on board with minimized dissipating copper area.

ABSOLUTE MAXIMUM RATINGS

L6201 - L6202 - L6203

3/20

THERMAL DATA

Symbol Parameter Value Unit

L6201 L6201PS L6202 L6203

Rth j-pins

Rth j-case

Rth j-am b

Thermal Resistance Junction-pins max

Thermal Resistance Junction Case max.

Thermal Resistance Junction-ambient max.

–

13 (*)

–

35 °C/W

(*) Mounted on aluminium substrate.

ELECTRICAL CHARACTERISTICS (Refer to the Test Circuits; Tj = 25°C, VS = 42V, Vsens = 0, unless

otherwise specified).

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VsSupply Voltage 12 36 48 V

Vref Reference Voltage IREF = 2mA 13.5 V

IREF Output Current 2mA

sQuiescent Supply Current EN = H VIN = L

EN = H VIN = H

EN = L ( Fig. 1,2,3) IL = 0 10

fcCommutation Frequency (*) 30 100 KHz

TjThermal Shutdown 150 °C

TdDead Time Protection 100 ns

TRANSISTORS

OFF

IDSS Leakage Current Fig. 11 Vs = 52 V 1 mA

RDS On Resistance Fig. 4,5 0.3 0.55 Ω

VDS(ON) Drain Source Voltage Fig. 9

IDS = 1A

IDS = 1.2A

IDS = 3A

L6201

L6202

L6201PS/0

0.3

0.36

0.9

Vsens Sensing Voltage – 1 4 V

SOURCE DRA IN DIODE

Vsd Forward ON Voltage Fig. 6a and b

ISD = 1A L6201 EN = L

ISD = 1.2A L6202 EN = L

ISD = 3A L 6201PS/03 EN =

0.9 (**)

1.35(**)

trr Reverse Recovery Time dif

dt = 25 A/µs

IF = 1A

IF = 1.2A

IF = 3A

L6201

L6202

L6203

300 ns

tfr Forward Recovery Time 200 ns

LOGIC LEVELS

VIN L, VEN L Input Low Voltage – 0.3 0.8 V

VIN H, VEN H Input High Voltage 2 7 V

IIN L, IEN L Input Low Current VIN, VEN = L –10 µA

IIN H, IEN H Input High Current VIN, VEN = H 30 µA

L6201 - L6202 - L6203

4/20

ELECTRICA L CHARACTERI STICS (Continued)

LOGIC CONTROL TO POWE R DRIVE TIMING

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t1 (Vi) Source Current Turn-off Delay Fig. 12 300 ns

t2 (Vi) Source Current Fall Time Fig. 12 200 ns

t3 (Vi) Source Current Turn-on Delay Fig. 12 400 ns

t4 (Vi) Source Current Rise Time Fig. 12 200 ns

t5 (Vi) Sink Current Turn-off Delay Fig. 13 300 ns

t6 (Vi) Sink Current Fall Time Fig. 13 200 ns

t7 (Vi) Sink Current Turn-on Delay Fig. 13 400 ns

t8 (Vi) Sink Current Rise Time Fig. 13 200 ns

(*) Limited by power dissipation

(**) I n synchronous rectification the drain-source voltage drop VDS is shown in fig. 4 (L6202/03); typical value for the L6201 is of 0.3V.

Figure 1: Typical Normalized IS vs. T j

Figure 3: Typical Normalized IS vs. VS

Figure 2: Typical Normalized Quiescent Current

vs. Frequency

Figure 4: Typical RDS (ON) vs. VS ~ Vref

L6201 - L6202 - L6203

5/20

Figure 5: Normalized RDS (ON)at 25°C vs. Temperature Typical Values

Figure 6b: Typi cal Diode Behaviour in Synchro-

nous Rectification (L6201PS/02/03)

Figure 7b: Typi cal Power Dissipation vs IL

(L6201PS, L6202, L6203))

Figure 6a: Typical Diode Behaviour in Synchro-

nous Rectification (L6201)

Figure 7a: Typical Power Dissipation vs IL

(L6201)

L6201 - L6202 - L6203

6/20

Figure 8a: Two Phase Chopping

Figure 8b: One Phase Chopping

Figure 8c: Enable Chopping

IN1 = H

IN 2 = H

EN = H

L6201 - L6202 - L6203

7/20

TEST CIRCUITS

Figure 9: Saturation Voltage

Figure 10: Quiescent Current

Figure 11: Leakage Current

L6201 - L6202 - L6203

8/20

Figure 12: Source Current D elay Times vs. Input Chopper

Figure 13: Sink Current Delay Times vs. Input Chopper

42V for L6201PS/02/03

L6201 - L6202 - L6203

9/20

CIRCUIT DESCRIPTION

The L6201/1PS/2/3 is a monolithic full bridge

switching motor driver realized in the new Mul-

tipower-BCD technology which allows the integra-

tion of multiple, isolated DMOS power transistors

plus mixed CMOS/bipolar control circuits. In this

way it has been possible to make all the control

inputs TTL, CMOS and µC compatible and elimi-

nate the necessity of external MOS drive compo-

nents. The Logic Drive is shown in table 1.

Ta ble 1

Inputs Output Mosfets (*)

VEN = H

IN1 IN2

Sink 1, Sink 2

Sink 1, Source 2

Source 1, Sink 2

Source 1, Source 2

VEN = L X X All transistors turned oFF

L = Low H = High X = DON’t care

(*) Numbers referred to INPUT1 or INPUT2 controlled output stages

Although the device guarantees the absence of

cross-conduction, t he presence of the i ntrinsic di-

odes in the POWER DMOS structure causes the

generation of current spikes on the sensing termi-

nals. This is due to charge-discharge phenomena

in the capacitors C1 & C2 associated with the

drain source junctions (fig. 14). When the output

switches from high to low, a current spike is gen-

erated associated with the capacitor C1. On the

low-to-high transition a spike of the same polarity

is generated by C2, preceded by a spike of the

opposite polarity due to the charging of the input

capacity of the lower POWER DMOS transistor

(fig. 15).

TRANSISTOR OPERATION

ON State

When one of the POWER DMOS transistor is ON

it can be considered as a resistor RDS (ON)

throughout t he recommended operating range. In

this condition the dissipated power is given by :

PON = R DS (ON) ⋅ IDS2 (RMS)

The low RDS (ON) of the Multipower-BCD process

can provide high currents with low power di ssipa-

tion.

OFF Stat e

When one of the POWER DMOS transistor is

OFF the VDS voltage is equal to the supply volt-

age and only the leakage current IDSS flows. The

power dissipation during this period is given by :

POFF = VS ⋅ IDSS

The power dissipation is very low and is negligible

in comparison to that dissipated in the ON

STATE.

Transitions

As already seen above the transistors have an in-

trinsic diode between their source and drain that

can operate as a fast freewheeling diode in

switched mode applications. During recirculation

with the ENABLE input high, the voltage drop

across the transistor is RDS (ON) ⋅ ID and when it

reaches the diode forward voltage it is clamped.

When the ENABLE input is low, the POWER

MOS is O FF and the diode carries all of the recir-

culation current. The power dissipated in the tran-

sitional times in the cycle depends upon t he volt-

age-current waveforms and in the driving mode.

(see Fig. 7ab and Fig. 8abc).

Ptrans. = IDS (t) ⋅ VDS (t)

Figure 14: Intrinsic Structures in the POWER

DMOS Transistors

Figure 15: Current Typical Spikes on the Sens-

ing Pin

L6201 - L6202 - L6203

10/20

Boostrap Capacitors

To ensure that t he POWER DMOS tran sistors are

driven correctly gate to source voltage of typ. 10

V must be guaranteed for all of the N-channel

DMOS transistors. This is easy to be provided for

the lower POWER DMOS transistors as their

sources are refered to ground but a gate voltage

greater than the supply voltage is necessary to

drive t he upper transistors. This is achieved by an

internal charge pump circuit that guarantees cor-

rect DC drive in combination with the boostrap cir-

cuit. For efficient charging the value of the boos-

trap capacitor should be greater than the input

capacitance of the power transistor which is

around 1 nF. It is recommended that a capaci-

tance of at leas t 10 nF is used for the bootstrap. If

a smaller capacitor is used there is a risk that the

POWER transist ors will not be fully turned on and

they will show a higher RDS (ON). On the other

hand if a elevated value is used it is possible that

a current spike may be produced in the sense re-

sistor.

Reference Voltage

To by-pass the internal Ref. Volt. circuit it is rec-

ommended that a capacitor be placed between its

pin and gr ound. A value of 0.22 µF should be suf-

ficient for most applications. This pin is also pro-

tected against a short circuit to ground: a max.

current of 2mA max. can be sinked out.

Dead Time

To protect the device against simultaneous con-

duction in both arms of the bridge resulting in a

rail to rail short circuit, the integrated logic control

provides a dead time greater than 40 ns.

Thermal Protection

A thermal protection circuit has been included

that wil l disable the device if the junction tempera-

ture reaches 150 °C. When the temperature has

fallen to a safe level the device restarts the input

and enable signals under control.

APPLICATION INFORMATION

Recirculation

During recirculation with the ENABLE input high,

the voltage drop across the transistor is RDS

(ON)⋅ IL, clamped at a voltage depending on the

characteristics of the source-drain diode. Al-

though the device is protected against cross con-

duction, current spikes can appear on the current

sense pin due to charge/discharge phenomena in

the intrinsic source drain capacitances. In the ap-

plication this does not cause any problem be-

cause the voltage spike generated on the sense

resistor is masked by the current controller circuit.

Rise Time Tr (See Fig. 16)

When a diagonal of the bridge is turned on cur-

rent begins to flow in the inductive load until the

maximum current IL is reached after a time Tr.

The dissipated energy EOFF/ON is in this case :

EOFF/ON = [RDS (ON) ⋅ IL2 ⋅ Tr] ⋅ 2/3

Load Ti me TLD (See Fig.16)

During this time the energy dissipated is due to

the ON resistance of the transistors (ELD) and due

to commutation (ECOM). As two of the POWER

DMOS transistors are ON, E ON is given by :

ELD = IL2 ⋅ RDS (ON) ⋅ 2 ⋅ TLD

In the commutation the energy dissipated is :

ECOM = VS ⋅ IL ⋅ TCOM ⋅ fSWITCH ⋅ TLD

Where :

TCOM = TTURN-ON = TTURN-OFF

fSWITCH = Chopping frequency.

Fal l Tim e Tf (See Fig. 16)

It is assumed that the energy dissipated in this

part of the cycle takes the same form as that

shown for the rise time :

EON/OFF = [RDS (ON) ⋅ IL2 ⋅ Tf] ⋅ 2/3

Figure 16.

L6201 - L6202 - L6203

11/20

Quiescent Energy

The last contribution to the energy dissipation is

due to the qu iesc en t s upp ly c ur r ent and i s g iven b y :

EQUIESCENT = IQUIESCENT ⋅ Vs ⋅ T

Total Energy Per Cycle

ETOT = EOFF/ON + ELD + ECOM +

+ EON/OFF + EQUIESCENT

The Total Power Dissipation PDIS is simply :

PDIS = ETOT/T

Tr = Rise time

TLD = Load drive time

Tf = Fall time

Td = Dead time

T = Period

T = Tr + TLD + Tf + Td

DC Motor Speed Control

Since the I.C. integrates a full H-Bridge in a single

package it is idealy suited for controlling DC mo-

tors. When used for DC motor control it performs

the power stage required for both speed and di-

rection control. The device can be combined wit h

a current regulator like the L6506 to implement a

transconductance amplifier for speed control, as

shown in figure 17. In t his particular configuration

only half of the L6506 is used and the other half

of the device may be used to control a second

motor.

The L6506 senses the voltage across the sense

resistor RS to monitor the motor current: it com-

pares the sensed voltage both to control the

speed and during the brake of the motor.

Between the sense resistor and each sense input

of the L6506 a resistor is recommended; if the

connections between the outputs of the L6506

and the inputs of the L6203 need a long path, a

resistor must be added between each input of the

L6203 and ground.

A snubber network made by the series of R and C

must be foreseen very near to the output pins of

the I.C.; one diode (BYW98) is connected be-

tween each power output pin and ground as well.

The following formulas can be used to calculate

the snubber values:

R ≅ VS/lp

C = lp/(dV/ dt) where:

VS is the maximum Supply Voltage foreseen on

the application;

Ip is the peak of the load current;

dv/dt is the limited rise time of the output voltage

(200V/µs is generally used) .

If the Power Supply Cannot Sink Current, a suit-

able large capacitor m ust be used and connected

near the supply pin of the L6203. Sometimes a

capacitor at pin 17 of the L6506 let the application

better work. For motor current up to 2A max., the

L6202 can be used in a similar circuit configura-

tion for which a typical Supply Voltage of 24V is

recommended.

Figure 17: Bidirectional DC Motor Control

L6201 - L6202 - L6203

12/20

BIPOLAR STEPPER MOTORS APPLICATIONS

Bipolar stepper motors can be driven with one

L6506 or L297, two full bridge BCD drivers and

very few external components. Together these

three chips form a complete microprocessor-to-

stepper motor interface is realized.

As shown in Fig. 18 and Fig. 19, the controller

connect directly to the two bridge BCD drivers.

External component are minimalized: an R.C. net-

work to set the chopper frequency, a resistive di-

vider (R1; R2) to establish the comparator refer-

ence voltage and a snubber network made by R

and C in series (See DC Motor Speed Control).

Figure 19: Two P has e Bipolar Stepper M otor Control Circuit with Chopper Curr ent Control and T ranslator

Figure 18: Two Phase Bipolar Stepper Motor Control Circuit with Chopper Current Control

L6201

L6201PS

L6202

L6203

L6201

L6201PS

L6202

L6203

L6201

L6201PS

L6202

L6203

L6201

L6201PS

L6202

L6203

L6201 - L6202 - L6203

13/20

It could be requested to drive a motor at VS lower

than the minimum recommended one of 12V

(See Electrical Characteristics); in this case, by

accepting a possible small increas in t he RDS (ON )

resistance of the power output transistors at the

lowest Supply Voltage value, may be a good solu-

tion the one shown in Fig. 20.

THERMAL CHARACTERI STICS

Thanks to t he high efficiency of this device, often

a true heatsink is not needed or it is simply ob-

tained by means of a copper side on the P.C.B.

(L6201/2).

Under heavy conditions, the L6203 needs a suit-

able cooling.

By using two square copper sides in a similar way

as it shown in Fig. 23, Fig. 21 indicates how to

choose the on board heatsink area when the

L6201 total power dissipation is known since:

RTh j-amb = (Tj max. – Tamb max) / Ptot

Figure 22 shows the Transient Thermal Resis-

tance vs. a single pulse time width.

Figure 23 and 24 refer to the L6202.

For the Multiwatt L6203 addition information is

given by Figure 25 (Thermal Resistance Junction-

Ambient vs. Total Power Dissipation) and Figure

26 (Peak Transient Thermal Resistance vs. Re-

petiti ve Pulse Width) while Figure 27 refers to the

single pulse Transient Thermal Resistance.

Figure 20: L6201/ 1P/2/3 Used at a Supply Volt-

age Range Between 9 and 18V

Figure 21: Typical RTh J-amb vs. "On Board"

Heatsink Area (L6201)

Figure 22: Typical Transient RTH in Single Puls e

Condition (L6201)

Figurre 23: Typical RTh J-amb vs. Two "On Board"

Square Heat si nk (L6202)

L6201

L6201PS

L6202

L6203

L6201 - L6202 - L6203

14/20

Figure 24: Typical Transient The rmal Resistance

for Single Pulses (L6202) Figure 25: Typical RTh J-amb of Multiwatt

Package vs. Total Power Dissipation

Figure 26: Typical Transient Thermal Resistance

for Single Pulses with and wit hout

Heatsink (L6203)

Figure 27: Typical Transient Thermal Resistance

versus Pulse Width and Duty Cycle

(L6203)

L6201 - L6202 - L6203

15/20

Powerdip 18

DIM. mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.85 1.40 0.033 0.055

b 0.50 0.020

b1 0.38 0.50 0.015 0.020

D 24.80 0.976

E 8.80 0.346

e 2.54 0.100

e3 20.32 0.800

F 7.10 0.280

I 5.10 0.201

L 3.30 0.130

Z 2.54 0.100

OUTLINE AND

MECHANICAL DATA

L6201 - L6202 - L6203

16/20

110

1120

A1 C

SO20MEC

h x 45˚

SO20

DIM. mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 2.35 2.65 0.093 0.104

A1 0.1 0.3 0.004 0.012

B 0.33 0.51 0.013 0.020

C 0.23 0.32 0.009 0.013

D 12.6 13 0.496 0.512

E 7.4 7.6 0.291 0.299

e 1.27 0.050

H 10 10.65 0.394 0.419

h 0.25 0.75 0.010 0.030

L 0.4 1.27 0.016 0.050

K 0˚ (min.)8˚ (m ax.)

OUTLINE AND

MECHANICAL DATA

L6201 - L6202 - L6203

17/20

OUTLINE AND

M E CHAN IC AL DA T A

a2 A

Ea1

PSO20MEC

DETAIL A

110

1120

h x 45

DETAIL A

lead

slug

Gage Plane 0.35

DETAIL B

(COPLANARITY)

- C -

SEATING PLANE

BO TTOM VIEW

DIM. mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 3.6 0.142

a1 0.1 0.3 0.004 0.012

a2 3.3 0.130

a3 0 0.1 0.000 0.004

b 0.4 0.53 0.016 0.021

c 0.23 0.32 0.009 0.013

D (1) 15.8 16 0.622 0.630

D1 9.4 9.8 0.370 0.386

E 13.9 14.5 0.547 0.570

e 1.27 0.050

e3 11.43 0.450

E1 (1) 10.9 11.1 0.429 0.437

E2 2.9 0.114

E3 5.8 6.2 0.228 0.244

G 0 0.1 0.000 0.004

H 15.5 15.9 0.610 0.626

h 1.1 0.043

L 0.8 1.1 0.031 0.043

N 8˚ (typ.)

S 8˚ (max.)

T 10 0.394

(1) “D and E1” do not include mold flash or protusions.

- Mo l d flash o r protus io ns shall not exceed 0.15mm (0. 006”)

- Critical dimen sions: “E”, “G” and “a3”.

PowerSO20

0056635

JEDEC MO-166

Weight:

1.9gr

L6201 - L6202 - L6203

18/20

Multiwatt11 V

DIM. mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 5 0.197

B 2.65 0.104

C 1.6 0.063

D 1 0.039

E 0.49 0.55 0.019 0.022

F 0.88 0.95 0.035 0.037

G 1.45 1.7 1.95 0.057 0.067 0.077

G1 16.75 17 17.25 0.659 0.669 0.679

H1 19.6 0.772

H2 20.2 0.795

L 21.9 22.2 22.5 0.862 0.874 0.886

L1 21.7 22.1 22.5 0.854 0.87 0.886

L2 17.4 18.1 0.685 0.713

L3 17.25 17.5 17.75 0.679 0.689 0.699

L4 10.3 10.7 10.9 0.406 0.421 0.429

L7 2.65 2.9 0.104 0.114

M 4.25 4.55 4.85 0.167 0.179 0.191

M1 4.73 5.08 5.43 0.186 0.200 0.214

S 1.9 2.6 0.075 0.102

S1 1.9 2.6 0.075 0.102

Dia1 3.65 3.85 0.144 0.152

OUTLINE AND

MECHANICAL DATA

L6201 - L6202 - L6203

19/20

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L6201 - L6202 - L6203

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