SN74LVC1G126DCKR - Texas Instruments High-Performance Analog

DBV PACKAGE

(TOP VIEW)

34Y

GND

OE VCC

DCK PACKAGE

(TOP VIEW)

GND

OE 5VCC

DRL PACKAGE

(TOP VIEW)

GND Y

5VCC

DRY PACKAGE

(TOP VIEW)

AN.C.

OE 6

GND Y

VCC

YZP PACKAGE

(BOTTOM VIEW)

GND 4

5VCC

GND

DSF PACKAGE

(TOP VIEW)

VCC

N.C.

SN74LVC1G126

www.ti.com

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

Check for Samples: SN74LVC1G126

1FEATURES

2• Available in the Texas Instruments NanoFree™ • Latch-Up Performance Exceeds 100 mA Per

Package JESD 78, Class II

• Supports 5-V VCC Operation • ESD Protection Exceeds JESD 22

• Inputs Accept Voltages to 5.5 V – 2000-V Human-Body Model (A114-A)

• Max tpd of 3.7 ns at 3.3 V – 200-V Machine Model (A115-A)

• Low Power Consumption, 10-μA Max ICC – 1000-V Charged-Device Model (C101)

• ±24-mA Output Drive at 3.3 V

• Ioff Supports Partial-Power-Down Mode

Operation

N.C. – No internal connection

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

This single bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G126 is a single line driver with a 3-state output. The output is disabled when the output-enable

(OE) input is low.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a

pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2NanoFree is a trademark of Texas Instruments.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

A Y

OE 1

2 4

SN74LVC1G126

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

www.ti.com

ORDERING INFORMATION

TAPACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2)

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb- Reel of 3000 SN74LVC1G126YZPR _ _ _CN_

free)

SON – DRY Reel of 5000 SN74LVC1G126DRYR CN

µQFN – DSF Reel of 5000 SN74LVC1G126DSFR CN

Reel of 3000 SN74LVC1G126DBVR

SOT (SOT-23) – DBV C26_

–40°C to 85°C Reel of 250 SN74LVC1G126DBVT

Reel of 3000 SN74LVC1G126DCKR

Reel of 250 SN74LVC1G126DCKT

SOT (SC-70) – DCK CN_

Jumbo Reel SN74LVC1G126DCKJ

of 10000

SOT (SOT-553) – DRL Reel of 4000 SN74LVC1G126DRLR CN_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition

(1 = SnPb, • = Pb-free).

FUNCTION TABLE

INPUTS OUTPUT

OE A

H H H

H L L

L X Z

LOGIC DIAGRAM (POSITIVE LOGIC)

Product Folder Links: SN74LVC1G126

SN74LVC1G126

www.ti.com

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

ABSOLUTE MAXIMUM RATINGS(1)

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT

VCC Supply voltage range –0.5 6.5 V

VIInput voltage range(2) –0.5 6.5 V

VOVoltage range applied to any output in the high-impedance or power-off state(2) –0.5 6.5 V

VOVoltage range applied to any output in the high or low state(2) (3) –0.5 VCC + 0.5 V

IIK Input clamp current VI< 0 –50 mA

IOK Output clamp current VO< 0 –50 mA

IOContinuous output current ±50 mA

Continuous current through VCC or GND ±100 mA

DBV package 206

DCK package 252

θJA Package thermal impedance(4) DRL package 142 °C/W

DRY package 234

YZP package 132

Tstg Storage temperature range –65 150 °C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

(3) The value of VCC is provided in the recommended operating conditions table.

(4) The package thermal impedance is calculated in accordance with JESD 51-7.

Product Folder Links: SN74LVC1G126

SN74LVC1G126

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

www.ti.com

RECOMMENDED OPERATING CONDITIONS(1)

MIN MAX UNIT

Operating 1.65 5.5

VCC Supply voltage V

Data retention only 1.5

VCC = 1.65 V to 1.95 V 0.65 × VCC

VCC = 2.3 V to 2.7 V 1.7

VIH High-level input voltage V

VCC = 3 V to 3.6 V 2

VCC = 4.5 V to 5.5 V 0.7 × VCC

VCC = 1.65 V to 1.95 V 0.35 × VCC

VCC = 2.3 V to 2.7 V 0.7

VIL Low-level input voltage V

VCC = 3 V to 3.6 V 0.8

VCC = 4.5 V to 5.5 V 0.3 × VCC

VIInput voltage 0 5.5 V

VOOutput voltage 0 VCC V

VCC = 1.65 V –4

VCC = 2.3 V –8

IOH High-level output current –16 mA

VCC = 3 V –24

VCC = 4.5 V –32

VCC = 1.65 V 4

VCC = 2.3 V 8

IOL Low-level output current 16 mA

VCC = 3 V 24

VCC = 4.5 V 32

VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20

Δt/Δv Input transition rise or fall rate VCC = 3.3 V ± 0.3 V 10 ns/V

VCC = 5 V ± 0.5 V 5

TAOperating free-air temperature –40 85 °C

(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Product Folder Links: SN74LVC1G126

SN74LVC1G126

www.ti.com

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

ELECTRICAL CHARACTERISTICS

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS VCC MIN TYP(1) MAX UNIT

IOH = –100 μA 1.65 V to 5.5 V VCC – 0.1

IOH = –4 mA 1.65 V 1.2

IOH = –8 mA 2.3 V 1.9

VOH V

IOH = –16 mA 2.4

3 V

IOH = –24 mA 2.3

IOH = –32 mA 4.5 V 3.8

IOL = 100 μA 1.65 V to 5.5 V 0.1

IOL = 4 mA 1.65 V 0.45

IOL = 8 mA 2.3 V 0.3

VOL V

IOL = 16 mA 0.4

3 V

IOL = 24 mA 0.55

IOL = 32 mA 4.5 V 0.55

IIA or OE inputs VI= 5.5 V or GND 0 to 5.5 V ±5 μA

Ioff VIor VO= 5.5 V 0 ±10 μA

IOZ VO= 0 to 5.5 V 3.6 V 10 μA

ICC VI= 5.5 V or GND IO= 0 1.65 V to 5.5 V 10 μA

ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND 3 V to 5.5 V 500 μA

CiVI= VCC or GND 3.3 V 4 pF

(1) All typical values are at VCC = 3.3 V, TA= 25°C.

SWITCHING CHARACTERISTICs

over recommended operating free-air temperature range, CL= 15 pF (unless otherwise noted) (see Figure 1)

VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V

FROM TO ± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

PARAMETER UNIT

(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX

tpd A Y 1.7 6.9 0.6 4.6 0.6 3.7 0.5 3.4 ns

SWITCHING CHARACTERISTICS

over recommended operating free-air temperature range, CL= 30 pF or 50 pF (unless otherwise noted) (see Figure 2)

VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V

FROM TO ± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

PARAMETER UNIT

(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX

tpd A Y 2.6 8 1.1 5.5 1 4.5 1 4 ns

ten OE Y 2.8 9.4 1.3 6.6 1.2 5.3 1 5 ns

tdis OE Y 1.6 9.8 1 5.5 1 5.5 1 4.2 ns

OPERATING CHARACTERISTICS

TA= 25°C VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V

TEST

PARAMETER UNIT

CONDITIONS TYP TYP TYP TYP

Outputs enabled 19 19 19 21

Power dissipation

Cpd f = 10 MHz pF

capacitance Outputs disabled 2 2 3 4

Product Folder Links: SN74LVC1G126

tsu

From Output

Under Test

(see Note A)

LOAD CIRCUIT

S1 VLOAD

Open

GND

Data Input

Timing Input VI

0 V

Input

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

VOLTAGE WAVEFORMS

PULSE DURATION

tPLH

tPHL

tPLH

VOH

VOL

0 V

Input

Output

Waveform 1

S1 at VLOAD

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

VLOAD/2

0 V

VOL + V∆

VOH − V∆≈0 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

Output

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

VLOAD

GND

TEST S1

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low , except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.

D. The outputs are measured one at a time, with one transition per measurement.

E. tPLZ and tPHZ are the same as tdis.

F. tPZL and tPZH are the same as ten.

G. tPLH and tPHL are the same as tpd.

H. All parameters and waveforms are not applicable to all devices.

Output

Control

VMVM

1.8 V ± 0.15 V

2.5 V ± 0.2 V

3.3 V ± 0.3 V

5 V ± 0.5 V

1 MΩ

VCC RL

2 × VCC

6 V

2 × VCC

VLOAD CL

15 pF

0.15 V

0.3 V

V∆

VCC

3 V

VCC

VCC/2

1.5 V

VCC/2

tr/tf

≤2 ns

≤2.5 ns

INPUTS

SN74LVC1G126

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

www.ti.com

PARAMETER MEASUREMENT INFORMATION

Figure 1. Load Circuit and Voltage Waveforms

Product Folder Links: SN74LVC1G126

tsu

From Output

Under Test

(see Note A)

LOAD CIRCUIT

S1 VLOAD

Open

GND

Data Input

Timing Input VI

0 V

Input

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

VOLTAGE WAVEFORMS

PULSE DURATION

tPLH

tPHL

tPLH

VOH

VOL

0 V

Input

Output

Waveform 1

S1 at VLOAD

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

VLOAD/2

0 V

VOL + V∆

VOH − V∆≈0 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

Output

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

VLOAD

GND

TEST S1

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low , except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.

D. The outputs are measured one at a time, with one transition per measurement.

E. tPLZ and tPHZ are the same as tdis.

F. tPZL and tPZH are the same as ten.

G. tPLH and tPHL are the same as tpd.

H. All parameters and waveforms are not applicable to all devices.

Output

Control

VMVM

1.8 V ± 0.15 V

2.5 V ± 0.2 V

3.3 V ± 0.3 V

5 V ± 0.5 V

1 kΩ

500 Ω

VCC RL

2 × VCC

6 V

2 × VCC

VLOAD CL

30 pF

50 pF

0.15 V

0.3 V

V∆

VCC

3 V

VCC

VCC/2

1.5 V

VCC/2

tr/tf

≤2 ns

≤2.5 ns

INPUTS

SN74LVC1G126

www.ti.com

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 2. Load Circuit and Voltage Waveforms

Product Folder Links: SN74LVC1G126

SN74LVC1G126

SCES224P –APRIL 1999–REVISED NOVEMBER 2012

www.ti.com

REVISION HISTORY

Changes from Revision N (February 2007) to Revision O Page

• Added DSF package option to the datasheet. ...................................................................................................................... 1

Changes from Revision O (March 2011) to Revision P Page

• Added Jumbo Reel to ORDERING INFORMATION TABLE. ............................................................................................... 2

Product Folder Links: SN74LVC1G126

PACKAGE OPTION ADDENDUM

www.ti.com 21-Jul-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

74LVC1G126DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (C262 ~ C265 ~

C26F ~ C26K ~

C26R ~ C26T)

74LVC1G126DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (C262 ~ C265 ~

C26F ~ C26K ~

C26R ~ C26T)

74LVC1G126DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (C265 ~ C26F ~

C26K ~ C26R)

74LVC1G126DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN5 ~ CNF ~ CNK ~

CNR ~ CNT)

74LVC1G126DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN5 ~ CNF ~ CNK ~

CNR ~ CNT)

74LVC1G126DCKTE4 ACTIVE SC70 DCK 5 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN5 ~ CNF ~ CNK ~

CNR)

74LVC1G126DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN5 ~ CNF ~ CNK ~

CNR)

74LVC1G126DRLRG4 ACTIVE SOT DRL 5 4000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN7 ~ CNR)

74LVC1G126DRYRG4 ACTIVE SON DRY 6 5000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CN

74LVC1G132DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C3BR

SN74LVC1G126DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (C262 ~ C265 ~

C26F ~ C26K ~

C26R ~ C26T)

SN74LVC1G126DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (C265 ~ C26F ~

C26K ~ C26R)

SN74LVC1G126DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN5 ~ CNF ~ CNK ~

CNR ~ CNT)

SN74LVC1G126DCKT ACTIVE SC70 DCK 5 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN5 ~ CNF ~ CNK ~

CNR)

SN74LVC1G126DRLR ACTIVE SOT DRL 5 4000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 (CN7 ~ CNR)

SN74LVC1G126DRYR ACTIVE SON DRY 6 5000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CN

PACKAGE OPTION ADDENDUM

www.ti.com 21-Jul-2013

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

SN74LVC1G126DSFR ACTIVE SON DSF 6 5000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CN

SN74LVC1G126YZPR ACTIVE DSBGA YZP 5 3000 Green (RoHS

& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 (CN2 ~ CN7 ~ CNN)

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF SN74LVC1G126 :

PACKAGE OPTION ADDENDUM

www.ti.com 21-Jul-2013

Addendum-Page 3

•Automotive: SN74LVC1G126-Q1

•Enhanced Product: SN74LVC1G126-EP

NOTE: Qualified Version Definitions:

•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•Enhanced Product - Supports Defense, Aerospace and Medical Applications

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

SN74LVC1G126DBVR SOT-23 DBV 5 3000 180.0 9.2 3.17 3.23 1.37 4.0 8.0 Q3

SN74LVC1G126DBVR SOT-23 DBV 5 3000 178.0 9.2 3.3 3.2 1.55 4.0 8.0 Q3

SN74LVC1G126DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3

SN74LVC1G126DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3

SN74LVC1G126DBVT SOT-23 DBV 5 250 178.0 9.2 3.3 3.2 1.55 4.0 8.0 Q3

SN74LVC1G126DBVT SOT-23 DBV 5 250 180.0 9.2 3.17 3.23 1.37 4.0 8.0 Q3

SN74LVC1G126DCKR SC70 DCK 5 3000 180.0 9.2 2.3 2.55 1.2 4.0 8.0 Q3

SN74LVC1G126DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3

SN74LVC1G126DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3

SN74LVC1G126DCKT SC70 DCK 5 250 180.0 9.2 2.3 2.55 1.2 4.0 8.0 Q3

SN74LVC1G126DCKT SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3

SN74LVC1G126DCKT SC70 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3

SN74LVC1G126DRLR SOT DRL 5 4000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 Q3

SN74LVC1G126DRLR SOT DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3

SN74LVC1G126DRYR SON DRY 6 5000 179.0 8.4 1.2 1.65 0.7 4.0 8.0 Q1

SN74LVC1G126DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2

SN74LVC1G126YZPR DSBGA YZP 5 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2013

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

SN74LVC1G126DBVR SOT-23 DBV 5 3000 205.0 200.0 33.0

SN74LVC1G126DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0

SN74LVC1G126DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0

SN74LVC1G126DBVT SOT-23 DBV 5 250 180.0 180.0 18.0

SN74LVC1G126DBVT SOT-23 DBV 5 250 205.0 200.0 33.0

SN74LVC1G126DCKR SC70 DCK 5 3000 205.0 200.0 33.0

SN74LVC1G126DCKR SC70 DCK 5 3000 180.0 180.0 18.0

SN74LVC1G126DCKT SC70 DCK 5 250 205.0 200.0 33.0

SN74LVC1G126DCKT SC70 DCK 5 250 180.0 180.0 18.0

SN74LVC1G126DRLR SOT DRL 5 4000 180.0 180.0 30.0

SN74LVC1G126DRLR SOT DRL 5 4000 202.0 201.0 28.0

SN74LVC1G126DRYR SON DRY 6 5000 203.0 203.0 35.0

SN74LVC1G126DSFR SON DSF 6 5000 180.0 180.0 30.0

SN74LVC1G126YZPR DSBGA YZP 5 3000 220.0 220.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2013

Pack Materials-Page 2

D: Max =

E: Max =

1.44 mm, Min =

0.94 mm, Min =

1.38 mm

0.88 mm

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