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M27C1001
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70° C, –40 to 85°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note: 1. VCC must b e applied simul t aneou sl y with or before VPP a nd remov ed simul taneously or after V PP.
2. Max imum DC voltage on Output i s V CC +0.5V.
Table 8A. Read Mode AC Characteristics (1)
(TA = 0 to 70° C, –40 to 85°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note: 1. VCC must b e applied simul t aneou sl y with or before VPP a nd remov ed simul taneously or after V PP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditi ons.
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current 0V ≤ VIN ≤ VCC ±10 µA
ILO O utput Leak age Curren t 0V ≤ VOUT ≤ VCC ±10 µA
ICC Su pply Curre nt E = VIL, G = VIL,
IOUT = 0mA, f = 5MHz 30 mA
ICC1 Supply Current (Standby) TTL E = VIH 1mA
I
CC2 Supply Current (Standby) CMOS E > VCC – 0.2V 100 µA
IPP Program Current VPP = VCC 10 µA
VIL Input Low Voltage –0.3 0.8 V
VIH (2) Input High Voltage 2 VCC + 1 V
VOL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High Voltage TTL IOH = –400µA 2.4 V
Output High Voltage CMOS IOH = –100µA VCC – 0.7V V
Symbol Alt Parameter Test Condition
M27C1001 Unit
-35 (3) -45 -60 -70
Min Max Min Max Min Max Min Max
tAVQV tACC Address Valid to
Output Valid E = VIL, G = VIL 35 45 60 70 ns
tELQV tCE Chip Enable Low to
Output Valid G = VIL 35 45 60 70 ns
tGLQV tOE Output Enable Low
to Output Valid E = VIL 25 25 30 35 ns
tEHQZ (2) tDF Chip Enable High to
Output Hi-Z G = VIL 025025030030ns
t
GHQZ (2) tDF Output Enable High
to Output Hi-Z E = VIL 025025030030ns
t
AXQX tOH Address Transition
to Output Transition E = VIL, G = VIL 0000ns
Two Li ne Ou tp ut C on t rol
Because EPROMs are usually used in larger
memory ar rays, this product features a 2 line con-
trol function which accom mod ates the use of m ul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. c om ple te assurance tha t output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect -
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.