MC74VHCU04DR2 - ON Semiconductor

May, 2011 − Rev. 5

1Publication Order Number:

MC74VHCU04/D

MC74VHCU04

Hex Inverter

(Unbuffered)

The MC74VHCU04 is an advanced high speed CMOS unbuffered

inverter fabricated with silicon gate CMOS technology. It achieves

high speed operation similar to equivalent Bipolar Schottky TTL

while maintaining CMOS low power dissipation.

The inputs tolerate voltages up to 7.0 V, allowing the interface of

5.0 V systems to 3.0 V systems.

Features

•High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V

•Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C

•High Noise Immunity: VNIH = VNIL = 10% VCC (Min.)

•Power Down Protection Provided on Inputs

•Balanced Propagation Delays

•Designed for 2.0 V to 5.5 V Operating Range

•Low Noise: VOLP = 0.8 V (Max)

•Pin and Function Compatible with Other Standard Logic Families

•Latchup Performance Exceeds 300 mA

•ESD Performance:

Human Body Model > 2000 V;

Machine Model > 200 V

•Chip Complexity: 12 FETs or 3 Equivalent Gates

•These Devices are Pb−Free and are RoHS Compliant

Figure 1. Logic Diagram

Y1A1

A2

A3

A4

A5

A6

Y2

Y3

Y4

Y5

Y6

1

3

5

9

11

13

2

4

6

8

10

12

Y = A

MARKING

DIAGRAMS

TSSOP−14

DT SUFFIX

CASE 948G

1

SOEIAJ−14

M SUFFIX

CASE 965

SOIC−14

D SUFFIX

CASE 751A

1

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

ORDERING INFORMATION

http://onsemi.com

A = Assembly Location

WL, L = Wafer Lot

Y, YY = Year

WW, W = Work Week

G or G= Pb−Free Package

1

14

VHCU04

ALYWG

VHCU04G

AWLYWW

1

14

VHCU

04

ALYWG

G

1

14

(Note: Microdot may be in either location)

L

H

FUNCTION TABLE

Inputs Outputs

A

H

L

Y

MC74VHCU04

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2

Figure 2. Pinout: 14−Lead Packages

1314 12 11 10 9 8

21 34567

VCC A6 Y6 A5 Y5 A4 Y4

A1 Y1 A2 Y2 A3 Y3 GND

(Top View)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MAXIMUM RATINGS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎ

Value

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage

ÎÎÎÎÎ

–0.5 to + 7.0

ÎÎÎ

V

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Input Voltage

ÎÎÎÎÎ

–0.5 to + 7.0

ÎÎÎ

V

ÎÎÎÎ

Vout

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Voltage

ÎÎÎÎÎ

–0.5 to VCC + 0.5

ÎÎÎ

V

ÎÎÎÎ

IIK

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Diode Current

ÎÎÎÎÎ

−20

ÎÎÎ

mA

ÎÎÎÎ

IOK

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Diode Current

ÎÎÎÎÎ

±20

ÎÎÎ

mA

ÎÎÎÎ

Iout

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Current, per Pin

ÎÎÎÎÎ

±25

ÎÎÎ

mA

ÎÎÎÎ

ICC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Current, VCC and GND Pins

ÎÎÎÎÎ

±50

ÎÎÎ

mA

ÎÎÎÎ

PD

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation in Still Air, SOIC Packages†

TSSOP Package†

ÎÎÎÎÎ

500

450

ÎÎÎ

mW

ÎÎÎÎ

Tstg

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Storage Temperature

ÎÎÎÎÎ

– 65 to + 150

ÎÎÎ

_C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress

ratings only. Functional operation above the Recommended Operating Conditions is not implied.

Extended exposure to stresses above the Recommended Operating Conditions may affect device

reliability.

†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C

TSSOP Package: − 6.1 mW/_C from 65_ to 125_C

RECOMMENDED OPERATING CONDITIONS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage

ÎÎÎ

2.0

ÎÎÎ

5.5

ÎÎÎ

V

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Input Voltage

ÎÎÎ

0

ÎÎÎ

5.5

ÎÎÎ

V

ÎÎÎÎ

Vout

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Output Voltage

ÎÎÎ

0

ÎÎÎ

VCC

ÎÎÎ

V

ÎÎÎÎ

TA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Operating Temperature

ÎÎÎ

−40

ÎÎÎ

+ 85

ÎÎÎ

_C

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high−impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND v (Vin or Vout) v VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

MC74VHCU04

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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC ELECTRICAL CHARACTERISTICS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎ

Test Conditions

ÎÎÎÎ

VCC

V

ÎÎÎÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎÎ

TA = −40 to 85°C

ÎÎ

Unit

ÎÎÎÎ

Min

ÎÎÎ

Typ

ÎÎÎÎ

Max

ÎÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎÎ

VIH

ÎÎÎÎÎÎÎ

Minimum High−Level

Input Voltage

ÎÎÎÎÎÎ

ÎÎÎÎ

2.0

3.0 to 5.5

ÎÎÎÎ

1.70

VCC x 0.8

ÎÎÎ

ÎÎÎÎ

1.70

VCC x 0.8

ÎÎÎÎ

ÎÎ

V

ÎÎÎÎ

VIL

ÎÎÎÎÎÎÎ

Maximum Low−Level

Input Voltage

ÎÎÎÎÎÎ

ÎÎÎÎ

2.0

3.0 to 5.5

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

0.30

VCC x 0.2

ÎÎÎÎ

0.30

VCC x 0.2

ÎÎ

V

ÎÎÎÎ

VOH

ÎÎÎÎÎÎÎ

Minimum High−Level

Output Voltage

ÎÎÎÎÎÎ

Vin =VIL

IOH = −50mA

ÎÎÎÎ

2.0

3.0

4.5

ÎÎÎÎ

1.8

2.7

4.0

ÎÎÎ

2.0

3.0

4.5

ÎÎÎÎ

1.8

2.7

4.0

ÎÎÎÎ

ÎÎ

V

ÎÎÎÎÎÎ

Vin = GND

IOH = −4mA

IOH = −8mA

ÎÎÎÎ

3.0

4.5

ÎÎÎÎ

2.58

3.94

ÎÎÎ

ÎÎÎÎ

2.48

3.80

ÎÎÎÎ

VOL

ÎÎÎÎÎÎÎ

Maximum Low−Level

Output Voltage

ÎÎÎÎÎÎ

Vin = VIH

IOL = 50mA

ÎÎÎÎ

2.0

3.0

4.5

ÎÎÎÎ

ÎÎÎ

0.0

ÎÎÎÎ

0.2

0.3

0.5

ÎÎÎÎ

0.2

0.3

0.5

ÎÎ

V

ÎÎÎÎÎÎ

Vin = VCC

IOL = 4mA

IOL = 8mA

ÎÎÎÎ

3.0

4.5

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

0.36

ÎÎÎÎ

0.44

ÎÎÎÎ

Iin

ÎÎÎÎÎÎÎ

Maximum Input

Leakage Current

ÎÎÎÎÎÎ

Vin = 5.5 or GND

ÎÎÎÎ

0 to 5.5

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

±0.1

ÎÎÎÎ

±1.0

ÎÎ

mA

ÎÎÎÎ

ICC

ÎÎÎÎÎÎÎ

Maximum Quiescent

Supply Current

ÎÎÎÎÎÎ

Vin = VCC or GND

ÎÎÎÎ

5.5

ÎÎÎÎ

ÎÎÎ

ÎÎÎÎ

2.0

ÎÎÎÎ

20.0

ÎÎ

mA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎÎÎÎ

Test Conditions

ÎÎÎÎÎÎÎÎÎ

TA = 25°C

ÎÎÎÎÎÎ

TA = −40 to 85°C

ÎÎ

Unit

ÎÎÎÎ

Min

ÎÎÎ

Typ

ÎÎÎÎ

Max

ÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎÎ

tPLH,

tPHL

ÎÎÎÎÎÎÎÎ

Maximum Propagation Delay,

A or B to Y

ÎÎÎÎÎÎÎÎÎ

VCC = 3.3 ± 0.3V CL = 15pF

CL = 50pF

ÎÎÎÎ

ÎÎÎ

5.0

7.5

ÎÎÎÎ

8.9

11.4

ÎÎÎ

1.0

ÎÎÎÎ

10.5

13.0

ÎÎ

ns

ÎÎÎÎÎÎÎÎÎ

VCC = 5.0 ± 0.5V CL = 15pF

CL = 50pF

ÎÎÎÎ

ÎÎÎ

3.5

5.0

ÎÎÎÎ

5.5

7.0

ÎÎÎ

1.0

ÎÎÎÎ

6.5

8.0

ÎÎÎÎ

Cin

ÎÎÎÎÎÎÎÎ

Maximum Input Capacitance

ÎÎÎÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎ

5

ÎÎÎÎ

10

ÎÎÎ

ÎÎÎÎ

10

ÎÎ

pF

CPD Power Dissipation Capacitance (Per Inverter) (Note 1)

Typical @ 25°C, VCC = 5.0V

pF

9

1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.

Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC /6 (per buffer). CPD is used to determine the

no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.

NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)

Symbol Characteristic

TA = 25°C

Unit

Typ Max

VOLP Quiet Output Maximum Dynamic VOL 0.5 0.8 V

VOLV Quiet Output Minimum Dynamic VOL −0.5 −0.8 V

VIHD Minimum High Level Dynamic Input Voltage 4.0 V

VILD Maximum Low Level Dynamic Input Voltage 1.0 V

MC74VHCU04

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4

Figure 3. Switching Waveforms

VCC

GND

50%

50% VCC

A

Y

tPHL

tPLH

*Includes all probe and jig capacitance

Figure 4. Test Circuit

CL*

TEST POINT

DEVICE

UNDER

TEST

OUTPUT

Figure 5. Input Equivalent Circuit

INPUT OUTPUT

Parasitic Diode

ORDERING INFORMATION

Device Package Shipping†

MC74VHCU04DR2G SOIC−14

(Pb−Free)

2500 Tape & Reel

MC74VHCU04DTR2G TSSOP−14* 2500 Tape & Reel

MC74VHCU04MELG SOEIAJ−14

(Pb−Free)

2000 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

MC74VHCU04

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5

PACKAGE DIMENSIONS

SOIC−14

CASE 751A−03

ISSUE J

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.127

(0.005) TOTAL IN EXCESS OF THE D

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

−A−

−B−

G

P7 PL

14 8

7

1

M

0.25 (0.010) B M

S

B

M

0.25 (0.010) A S

T

−T−

F

RX 45

SEATING

PLANE D14 PL K

C

J

M

_DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A8.55 8.75 0.337 0.344

B3.80 4.00 0.150 0.157

C1.35 1.75 0.054 0.068

D0.35 0.49 0.014 0.019

F0.40 1.25 0.016 0.049

G1.27 BSC 0.050 BSC

J0.19 0.25 0.008 0.009

K0.10 0.25 0.004 0.009

M0 7 0 7

P5.80 6.20 0.228 0.244

R0.25 0.50 0.010 0.019

__ __

7.04

14X

0.58

14X

1.52

1.27

DIMENSIONS: MILLIMETERS

1

PITCH

SOLDERING FOOTPRINT*

7X

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

MC74VHCU04

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6

PACKAGE DIMENSIONS

TSSOP−14

DT SUFFIX

CASE 948G−01

ISSUE B

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.90 5.10 0.193 0.200

B4.30 4.50 0.169 0.177

C−−− 1.20 −−− 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.50 0.60 0.020 0.024

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08

(0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

____

S

U0.15 (0.006) T

2X L/2

S

U

M

0.10 (0.004) V S

T

L−U−

SEATING

PLANE

0.10 (0.004)

−T−

ÇÇÇ

SECTION N−N

DETAIL E

JJ1

K

K1

ÉÉÉ

DETAIL E

F

M

−W−

0.25 (0.010)

8

14

7

1

PIN 1

IDENT.

H

G

A

D

C

B

S

U0.15 (0.006) T

−V−

14X REFK

N

7.06

14X

0.36 14X

1.26

0.65

DIMENSIONS: MILLIMETERS

1

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

MC74VHCU04

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7

PACKAGE DIMENSIONS

SOEIAJ−14

CASE 965−01

ISSUE B

HE

A1

DIM MIN MAX MIN MAX

INCHES

--- 2.05 --- 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.10 0.20 0.004 0.008

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059

0

0.70 0.90 0.028 0.035

--- 1.42 --- 0.056

A1

HE

Q1

LE

_10 _0

_10 _

LE

Q1

_

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE

MOLD FLASH OR PROTRUSIONS AND ARE

MEASURED AT THE PARTING LINE. MOLD FLASH

OR PROTRUSIONS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

0.13 (0.005) M0.10 (0.004)

D

Z

E

1

14 8

7

eA

b

VIEW P

c

L

DETAIL P

M

A

b

c

D

E

e

L

M

Z

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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

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MC74VHCU04/D

PUBLICATION ORDERING INFORMATION

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Phone: 421 33 790 2910

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Phone: 81−3−5773−3850

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