PIC32MX534/564/664/764 PIC32MX534/564/664/764 Family Silicon Errata and Data Sheet Clarification The PIC32MX534/564/664/764 family devices that you have received conform functionally to the current Device Data Sheet (DS61156G), except for the anomalies described in this document. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in Table 1. The silicon issues are summarized in Table 2. The errata described in this document will be addressed in future revisions of the PIC32MX534/564/664/764 silicon. Note: 1. 2. 3. 4. This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated in the last column of Table 2 apply to the current silicon revision (A1). Data Sheet clarifications and corrections start on page 7, following the discussion of silicon issues. The silicon revision level can be identified using the current version of MPLAB(R) IDE and Microchip's programmers, debuggers and emulation tools, which are available at the Microchip corporate web site (www.microchip.com). TABLE 1: For example, to identify the silicon revision level using MPLAB IDE in conjunction with the REAL ICETM in-circuit emulator: Using the appropriate interface, connect the device to the REAL ICE in-circuit emulator. From the main menu in MPLAB IDE, select Configure>Select Device, and then select the target part number in the dialog box. Select the MPLAB hardware tool (Debugger>Select Tool). Perform a "Connect" operation to the device (Debugger>Connect). Depending on the development tool used, the part number and Device Revision ID value appear in the Output window. Note: If you are unable to extract the silicon revision level, please contact your local Microchip sales office for assistance. The Device and Revision ID values for the various PIC32MX534/564/664/764 silicon revisions are shown in Table 1. SILICON DEVREV VALUES Part Number Device ID(1) Revision ID for Silicon Revision(2) A0 A1 PIC32MX534F064H 0x4400053 0x0 0x1 PIC32MX564F064H 0x4401053 0x0 0x1 PIC32MX564F128H 0x4403053 0x0 0x1 PIC32MX664F064H 0x4405053 0x0 0x1 PIC32MX664F128H 0x4407053 0x0 0x1 PIC32MX764F128H 0x440B053 0x0 0x1 PIC32MX534F064L 0x440C053 0x0 0x1 PIC32MX564F064L 0x440D053 0x0 0x1 PIC32MX564F128L 0x440F053 0x0 0x1 PIC32MX664F064L 0x4411053 0x0 0x1 PIC32MX664F128L 0x4413053 0x0 0x1 PIC32MX764F128L 0x4417053 0x0 0x1 Note 1: The Device and Revision IDs (DEVID and DEVREV) are located at the last two implemented addresses in program memory. 2: Refer to the "PIC32MX Flash Programming Specification" (DS61145) for detailed information on Device and Revision IDs for your specific device. (c) 2010-2011 Microchip Technology Inc. DS80511E-page 1 PIC32MX534/564/664/764 TABLE 2: SILICON ISSUE SUMMARY Module Item Number Feature JTAG Affected Revisions(1) Issue Summary A0 A1 X X -- 1. On 64-pin devices the TMS pin requires an external pull-up. CAN -- 2. The TXBAT bit status may be incorrect after an abort. X X SPI Slave Mode 3. The SPIBUSY status is incorrect after an aborted transfer. X X SPI Slave Mode 4. A wake-up interrupt may not be clearable. X X SPI Frame Mode 5. Recovery from an underrun requires multiple SPI clock periods. X X SPI -- 6. Byte writes to the SPISTAT register are not decoded correctly. X X UART -- 7. The TRMT bit is asserted before the transmission is complete. X X UART IrDA(R) with BCLK 8. TX data is corrupted when BRG values greater than 0x200 are used. X X UART IrDA 9. The IrDA minimum bit time is not detected at all baud rates. X X UART UART Receive Buffer Overrun Error Status 10. OERR bit does not get cleared on a module Reset. X X ADC Conversion Trigger from INT0 Interrupt 11. The ADC module conversion triggers occur on the rising edge of the INT0 signal even when INT0 is configured to generate an interrupt on the falling edge. X X JTAG Boundary Scan 12. Pin 100 on 100-pin packages and pin A1 on 121-pin packages do not respond to boundary scan commands. X X Oscillator Clock Switch 13. Clock switch may not work if Cache is disabled and Prefetch is enabled. X X DMA Suspend Status 14. The DMABUSY status bit may not reflect the correct status if the DMA module is suspended. X X Voltage Regulator BOR 15. Device may not exit BOR state if BOR event occurs. X X USB OTG Mode 16. When the USB model is configured for OTG operation, it may not properly recognize all required OTG voltage levels on VBUS pin. X X Oscillator Clock Switch 17. If a Fail-Safe Clock Monitor (FSCM) event occurs when Primary Oscillator (POSC) mode is used, firmware clock switch requests to switch from FRC mode will fail. X X I2CTM Slave Mode 18. The I2C module does not respond to address 0x78 when the STRICT and A10M bits are cleared in the I2CxCON register. X X USB UIDLE Interrupt 19. UIDLE interrupts cease if the UIDLE interrupt flag is cleared. X X Note 1: Only those issues indicated in the last column apply to the current silicon revision. DS80511E-page 2 (c) 2010-2011 Microchip Technology Inc. PIC32MX534/564/664/764 Silicon Errata Issues Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision (A1). 1. Module: JTAG On 64-pin devices an external pull-up resistor is required on the TMS pin for proper JTAG. Work around Connect a 100k-200k pull-up to the TMS pin. Affected Silicon Revisions A0 A1 X X 2. Module: CAN 4. Module: SPI In Slave mode when entering Sleep mode after a SPI transfer with SPI interrupts enabled, a false interrupt may be generated waking the device. This interrupt can be cleared; however, entering Sleep may cause the condition to occur again. Work around Do not use SPI in Slave mode as a wake-up source from Sleep. Affected Silicon Revisions A0 A1 X X 5. Module: SPI In Frame mode the module is not immediately ready for further transfers after clearing the SPITUR bit. The SPITUR bit will be cleared by hardware before the SPI state machine is prepared for the next operation. When an abort request occurs concurrently with a successful message transmission, and additional messages remain in the FIFO, these remaining messages are not transmitted and the TXBAT bit does not reflect the abort. Work around Work around Affected Silicon Revisions The actual FIFO status can be determined by the FIFO pointers CFIFOCI and CFIFOUA. Firmware must wait at least four bit times before writing to the SPI registers after clearing the SPITUR bit. A0 A1 X X Affected Silicon Revisions A0 A1 X X 3. Module: SPI In Slave mode with Chip Select (CS) enabled, if the Master deasserts CS before the SPI clock has returned to the Idle state, the SPIBUSY bit will remain set until the next SPI data transfer is completed. The other SPI status bits will reflect the actual status. Work around None. 6. Module: SPI Byte writes to the SPISTAT register are not decoded correctly. A byte write to byte zero of SPISTAT is actually performed on both byte zero and byte one. A byte write to byte one of SPISTAT is ignored. Work around Only perform word operations on the SPISTAT register. Affected Silicon Revisions A0 A1 X X Affected Silicon Revisions A0 A1 X X (c) 2010-2011 Microchip Technology Inc. DS80511E-page 3 PIC32MX534/564/664/764 7. Module: UART The TRMT bit is asserted during the STOP bit generation not after the STOP bit has been sent. Work around If firmware needs to be aware when the transmission is complete, firmware should add a half bit time delay after the TRMT bit is asserted. Affected Silicon Revisions A0 A1 X X 8. Module: UART In IrDA mode with baud clock output enabled, the UART TX data is corrupted when the BRG value is greater than 0x200. Work around Use the Peripheral Bus (PB) divisor to lower the PB frequency such that the required UART BRG value is less than 0x201. Affected Silicon Revisions A0 A1 X X 9. Module: UART The UART module is not fully IrDA compliant. The module does not detect the 1.6 s minimum bit width at all baud rates as defined in the IrDA specification. The module does detect the 3/16 bit width at all baud rates. Work around None. Affected Silicon Revisions A0 A1 X X 10. Module: UART The OERR bit does not get cleared on a module reset. If the OERR bit is set and the module is disabled, the OERR bit retains its status even after the UART module is reinitialized. 11. Module: ADC When the ADC module is configured to start conversion on an external interrupt (SSRC<2:0> = 001), the start of conversion always occurs on a rising edge detected at the INT0 pin, even when the INT0 pin has been configured to generate an interrupt on a falling edge (INT0EP = 0). Work around Generate ADC conversion triggers on the rising edge of the INT0 signal. Alternatively, use external circuitry to invert the signal appearing at the INT0 pin, so that a falling edge of the input signal is detected as a rising edge by the INT0 pin. Affected Silicon Revisions A0 A1 X X 12. Module: JTAG Pin 100 on 100-pin packages and pin A1 on 121-pin packages do not respond to boundary scan commands. Work around None. Affected Silicon Revisions A0 A1 X X 13. Module: Oscillator Clock switch may not work if Cache is disabled (DCSZ<1:0> = 00 in the CHECON register) and Prefetch is enabled (PREFEN<1:0> not equal `00' in the CHECON register). Work around Set wait states to a value of 7 (PFMWS<2:0> = 111 in the CHECON register), perform a clock switch, and then set waits states to the desired value. Affected Silicon Revisions A0 A1 X X Work around The user software must check this bit in the UART module initialization routine and clear it if it is set. Affected Silicon Revisions A0 A1 X X DS80511E-page 4 (c) 2010-2011 Microchip Technology Inc. PIC32MX534/564/664/764 14. Module: DMA If the DMA module is suspended by setting the DMA Suspend bit (SUSPEND) in the DMA Controller Control register (DMACON), the DMA Module Busy Bit (DMABUSY) in the DMACON register may continue to show a Busy status, when the DMA module completes transaction. FIGURE 1: EXTERNAL COMPARATOR SCHEMATIC EXAMPLE VBUS +5V VOUT - R2 1K Work around Use the Channel Busy bit (CHBUSY) in the DMA Channel Control Register (DCHxCON) to check the status of the DMA channel. Affected Silicon Revisions A0 A1 X X 15. Module: Voltage Regulator Device may not exit BOR state if BOR event occurs. Work arounds Work around 1: VDD must remain within published specification (see Parameter DC10 of the device data sheet). Work around 2: Reset device by providing POR condition. Affected Silicon Revisions A0 A1 X X 16. Module: USB When the USB model is configured for OTG operation, it may not properly recognize all required OTG voltage levels on VBUS pin. TO PIC32 I/O + R1 0.8V:R1 = 5.2K 1.2V:R1 = 3.1K 4.75V:R1 = 52R Affected Silicon Revisions A0 A1 X X 17. Module: Oscillator If the Primary Oscillator (POSC) mode is implemented and a Fail-Safe Clock Monitor (FSCM) event occurs (failure of the external primary clock), the internal clock source will switch to the FRC oscillator. Subsequent firmware clock switch requests from the FRC oscillator to other clock sources will fail and the device will continue to execute on the FRC oscillator. Upon repair of the external clock source and a power-on state, the device will resume operation with the primary oscillator clock source. Work around None. Affected Silicon Revisions A0 A1 X X Work around Use external comparator circuit to detect OTG specific voltage levels on VBUS pin. (c) 2010-2011 Microchip Technology Inc. DS80511E-page 5 PIC32MX534/564/664/764 18. Module: I2CTM The slave address, 0x78, is one of a group of reserved addresses. It is used as the upper byte of a 10-bit address when 10-bit addressing is enabled. The I2C module control register allows the programmer to enable both 10-bit addressing and strict enforcement of reserved addressing, with the A10M and STRICT bits, respectively. When both bits are cleared, the device should respond to the reserved address 0x78, but does not. Work around None. Affected Silicon Revisions A0 A1 X X 19. Module: USB In the case where the bus has been idle for > 3 ms, and the UIDLE interrupt flag is set, if software clears the interrupt flag, and the bus remains idle, the UIDLE interrupt flag will not be set again. Work around Software can leave the UIDLE bit set until it has received some indication of bus resumption. (Resume, Reset, SOF, or Error). Note: Resume and Reset are the only interrupts that should be gotten following UIDLE assertion. If, at any point in time, the UIDLE bit is set, it should be okay to suspend the USB module (as long as this code is protected by the GUARD and/or ACTPEND logic). Note that this will require software to clear the UIDLE interrupt enable bit to exit the USB ISR (if using interrupt driven code). Affected Silicon Revisions A0 A1 X X DS80511E-page 6 (c) 2010-2011 Microchip Technology Inc. PIC32MX534/564/664/764 Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS61156G): Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. 1. Module: AC Characteristics: Standard Operating Conditions The Standard Operating conditions in the following table shows the incorrect starting voltage range of 2.3V. The correct starting range is: 2.9V: * Table 31-35: Ethernet Module Specifications The Standard Operating conditions in the following tables show the incorrect starting voltage range of 2.3V. The correct starting range is: 2.5V: * Table 31-36: ADC Module Specifications * Table 31-37: 10-bit ADC Conversion Rate Parameters * Table 31-38: Analog-to-Digital Conversion Timing Requirements (c) 2010-2011 Microchip Technology Inc. DS80511E-page 7 PIC32MX534/564/664/764 APPENDIX A: REVISION HISTORY Rev A Document (7/2010) Initial release of this document; issued for revision A0 silicon. Includes silicon issues 1 (JTAG), 2 (CAN), 3-6 (SPI) and 7-9 (UART). Rev B Document (12/2010) Added silicon issues 10 (UART), 11 (ADC), 12 (JTAG), 13 (Oscillator), 14 (DMA), 15 (Voltage Regulator) and 16 (USB). Rev C Document (3/2011) Updated the data sheet revision from "E" to "F" and updated the current silicon revision to A1 throughout the document. Added data sheet clarification 1 (Pin Diagrams). Rev D Document (5/2011) Updated the data sheet revision from "F" to "G" throughout the document. Removed data sheet clarification 1. Rev E Document (10/2011) Added silicon issues 17 (Oscillator), 18 (I2CTM), and 19 (USB). Added data sheet clarification 1 (AC Characteristics: Standard Operating Conditions). DS80511E-page 8 (c) 2010-2011 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2010-2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-710-2 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2010-2011 Microchip Technology Inc. DS80511E-page 9 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 China - Hangzhou Tel: 86-571-2819-3187 Fax: 86-571-2819-3189 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-330-9305 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 DS80511E-page 10 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 08/02/11 (c) 2010-2011 Microchip Technology Inc.