Migration 16 to 64 Megabit - Advanced Micro Devices

.Publication# 22935 Rev: BAmendment/0

Issue Date: September 13, 1999

Migration from 16 Megabit to 64 Megabit

Flash Memory Devices

Application Note

This document will assist board-designers in creating a

seamless migration path from AMD 16 Mb or 32 Mb low

voltage (LV) flash and Simultaneous Read/Write (DL)

devices to higher densities.

Migration to a hi gher density may be necessar y when

the OS or system c ode beco mes too l arge to fit in the

current device. Another type of migration between fam-

ilies (LV to DL) may be useful to your system by

allowing the storage of code and data in one device;

thus reducing chip count. This transition between LV

and DL families and/or the transition to higher densities

can be simple if a few precautions are taken during the

design phase of the PCB.

TSOP

Migration Summary

The Low Voltage (LV) and the Simultaneous Read/

Write (DL) families are pin-for-pin compatible in 8 Mb

densities and below. In 16 Mb , the parts have the same

pin-out except for the addition of the WP#/ACC pin to

the Simultan eous Read/W rite part. In or der to use th e

Am29LV160 and the Am29DL16x in terchangeably, ei-

ther 0 V or 3 V must be plac ed on WP# , Pi n 14; 0 V to

protect boot sectors in the Am29DL16x or 3 V to leave

the boot sectors unprotected. There are no internal

pull-up resistor s o n this p in; the refore, it cannot be le ft

floating. The DL migration from 16 Mb to 64 Mb is a

seamless migration (see Figure 1); No hardware

changes are necessary. Migration in the LV family

is seamless up to 16 Mb and again from 32 Mb and

above. When migrating from an LV part 16 Mb and

below to an LV par t 32 Mb an d higher there are s light

pin-out modifications that need to occur. The 32 Mb

and higher LV parts include WP# and ACC pins not in-

cluded on 16 Mb an d below LV dev ices. Unlike the D L

device with the WP#/ACC pin, the WP# pin and the

ACC pin on LV devices have internal pull up resistors

and can be left floating when not in use. When using

the ACC function, the voltage levels differ between

Am29L V (conventional 3 volt-only) and Am29DL (3 volt-

only, Simultaneous Read/Write) devices. The Am29DL

devices will only accept 8.5–9.5 V on the ACC input.

The LV de vices, howev er , will accept 8.5–12.5 V on the

ACC input. More details on the necessary modifica-

tions follow:

Note: Devices in bold italics have not been introduced.

Figure 1. 48 Pin TSOP Migration

Migration Details

From Am29LV160 To Am29LV320

The migration from the Am29LV160 to the Am29LV320

in TSOP is done with a modification of one jumper . Fig-

ure 2 s hows that Pin 9, A1 9, needs to b e re-routed t o

Pin 15. In order to design-in a path to eventually mi-

grate to the Am29LV640 wi thou t re- sp ining th e P CB, a

jumper is required on Pin 9 to select between signals

A19 and A21. Pin 13 and Pin 14 become the ACC and

WP# pin, respectively. These two pins can be left float-

ing. If you want to have write protect (WP#) functionality

for the boot sectors, you must hav e the ability to control

Pin 14. No cha nges a re requ ired for Pin 4 7, assum ing

that the Am29LV160 was operating in a x16 configura-

tion and the Am 29LV320 will be used in a 3 V system .

If the Am29 LV160 device was used in a x8 configura-

tion, please see migration to the Am29DL32x device.

Also, if the Am29LV320 is going to be used on a 5 Volt

bus, 5 Volts needs to be placed on pin 47.

DL16x DL32x

DL64x

LV160

LV320

LV640U

* Three pin change

2 Migration from 16 Megabit to 64 Megabit Flash Memory Devices

Figure 2. TSOP Am 29LVxxx Device Migration

From Am29DL16x To Am29LV320

This migration is similar to the Am29DL32x →

Am29LV640 migration except for the need to route sig-

nal A21.

From Am29LV160 To Am29DL32x

This migration is necessary to take advantage of simul-

taneous functionality or if the system bus width is x8.

The Am29L V320 is a x16 device only and does not sup-

port a x8 bus width. The Am29DL32x requires the

addition of A2 0 to p in 10. In add ition, pin 14 all ows for

WP#ACC functionality. Pin 14 cannot be left floating.

F or more information on WP#/ACC functionality please

refer to the Am29DL32x data sheet at: http://

www.amd.com/products/nvd/techdocs/techdocs.html.

From Am29LV320 To Am29LV640

Migrating from the Am29LV320 to the Am29LV640 in

TSOP i s simpl e bec ause it is a dir ect mi gration. In the

board design phase, allow f or an additional address pin

on pin 9. Pin 9 on the Am29LV320 is a No Connect

(NC) and be comes A21 i n the Am29LV640. Thi s addi-

tional address pin will need to be routed at the time the

Am29LV320 is designed into the system.

From Am29DL32x To Am29LV640

Migrating from the Am29DL32x to the Am29LV640 in

TSOP is more involved and requires jumpers on the

PCB to allow for the four pin change. No changes are

necessary to pin 47 (BYTE# ⇒ VI/O) in TSOP if the

Am29DL32x was used in a x16 configuration and the

Am29LV640U is goi ng to be u sed o n a 3V bu s. In this

case, the BYTE# pin, pin 47, on the Am29DL32x will be

tied high be cause it is in x16 mo de. This will translat e

directly over to a 3 Volt I/O on the VI/O pin. If the

Am29LV640U is going to be used on a 5 Volt bus, 5

Volts needs to be pl aced on pin 4 7. If t he Am29DL32x

was used on a x8 bus you mu st upg rade t he inte rface

to a x16 bus width to migrate to the Am29LV640U.

List of Pin Changes (See Figure 3)

Pin 9 (A19 ⇒ A21)

Pin 13 (NC ⇒ ACC)

Pin 14 (WP#/ACC ⇒ WP#)

Pin 15 (RY#/BY ⇒ A19)

A19 re-routes from pin 9 to pin 15 using a jumper to

allow for proper functionality in each density. Pin 13 and

Pin 14 be co me the ACC pin a nd th e W P# pi n, res pe c-

tively, on t he A m2 9LV640. O n th e A m2 9DL3 2x device,

Am29LV640 Am29LV320 Am29LV160

A15 A15 A15

A14 A14 A14

A13 A13 A13

A12 A12 A12

A11 A11 A11

A10 A10 A10

A9 A9 A9

A8 A8 A8

A21 NC A19

A20 A20 NC

WE# WE# WE#

RESET# RESET# RESET#

ACC ACC NC

WP WP NC

A19 A19 RY/BY#

A18 A18 A18

A17 A17 A17

A7 A7 A7

A6 A6 A6

A5 A5 A5

A4 A4 A4

A3 A3 A3

A2 A2 A2

A1 A1 A1

Am29LV160 Am29LV320 Am29LV640

A16 A16 A16

BYTE# VIO VIO

VSS VSS VSS

DQ15/A–1 DQ15 DQ15

DQ7 DQ7 DQ7

DQ14 DQ14 DQ14

DQ6 DQ6 DQ6

DQ13 DQ13 DQ13

DQ5 DQ5 DQ5

DQ12 DQ12 DQ12

DQ4 DQ4 DQ4

VCC VCC VCC

DQ11 DQ11 DQ11

DQ3 DQ3 DQ3

DQ10 DQ10 DQ10

DQ2 DQ2 DQ2

DQ9 DQ9 DQ9

DQ1 DQ1 DQ1

DQ8 DQ8 DQ8

DQ0 DQ0 DQ0

OE# OE# OE#

VSS VSS VSS

CE# CE# CE#

A0 A0 A0

Migration from 16 Megabit to 64 Megabit Flash Memory Devices 3

both functions are implemented into Pin 14. It is best to

devote two traces to these signals, even when using

the Am29DL 32x. The signals can be combined w ith a

jumper wh en using the Am29DL 32x and routed sepa-

rately to the appropriate pins when using the

Am29LV640. RY#/BY functionality is not available in

both the Am29L V320 and the Am29LV640U . Figure 3 is

an illustration of the recommended jumper

configuration.

Note: This la you t allows both DL16 x/32x and LV320/640 f amili es to functi on fully in a system de sign. Either R1 or R2 “Zero O hm”

resistors should be installed.

Figure 3. TSOP Migration from 16 Mb and 32 Mb DL Devices to 32 Mb and 64 Mb LV devices

FBGA

Migration Summary

The FBGA migration path is very simple as indicated in

Figure 3. The footprint remains the same from 4 Mb to

16 Mb in a 48-ball FBGA package. An additional ad-

dress pin needs to be accounted for when migrating

from 4 Mb to 8 Mb and also when migrating from 8 Mb

to 16 Mb. The number of bal ls changes from 48 to 63

when migrating from 16 Mb to 32 Mb; Howe ver , the sig-

nal placement of the 48 central balls remain the

same. The outer balls or outrigger balls are used for

package stability and not for routing signals. These ball

configurations are shown in Figure 5. The NC (no con-

nect) balls outside of the central 48-ball array are the

outrigger balls. Figure 4. 16 Mb to 64 Mb FBGA Migration

#DL16x

DL32x LV320

LV640U

9 A19 A21

10 A20 A20

11 WE# WE#

12 RESET# RESET#

13 NC ACC

14 WP#/ACC WP#

15 RY/BY# A19

A21

A19

ACC

WP#

RY/BY#

DL16x DL32x

DL64x

LV160

LV320

LV640U

* 48 to 63 ball migration

4 Migration from 16 Megabit to 64 Megabit Flash Memory Devices

Figure 5. FBGA Migration (Top View, Balls Facing Down)

A few notes to make about Figure 5: The V I/O pin on

the Am29LV32x and Am29LV64x is a byte pin on all

other listed par ts. The Am29LV160 does not have the

WP#/ACC pin. The Am29LV32x/64x have only ACC

pins, and all other parts listed have both WP# and ACC

on the same pin. When using the ACC function, the

voltage levels differ between Am29LV (conventional 3

volt-only) and Am29DL (3 volt-only, Simultaneous

Read/Write) devices. The Am29DL devices will only

accept 8.5–9.5 V on the ACC input. The LV devices,

however, will accept 8.5–12.5 V on the ACC input.

Migration Details

From Am29LV160 To Am29LV320

In contrast with the TSOP migration, the Am29LV320

device in FBGA still has Ready/Busy (RY#/BY) func-

tionality. The addition of the ACC pin, previously a no

connect (NC), has no impact because it can be left

floating. The BYTE# pin becomes the V I/O pin. This

also does not have an effect on the device if the

Am29LV160 was operating in a x16 configuration and

the Am29LV320 is going to operate on a 3V bus.

From Am29DL16x To Am29LV320

This migration is similar to the Am29DL32x to the

Am29LV640 migration except for the need to route sig-

nal A21.

From Am29LV160 To Am29DL32x

Pin D4 (ac cordin g to data s heet), previously a no c on-

nect (NC), becomes the WP#/ACC pin. This pin cannot

be left floating. For more information on WP#/ACC

functionality please ref er to the Am29DL32x data sheet

at: http://www.amd.com/products/nvd/techdocs/

techdocs.html.

From Am29LV320 To Am29LV640

The FBGA Migration, like the TSOP, is also a direct mi-

gration. In the board design phase, allow for the

additional address signal, A21 (see Figure 5).

From Am29DL32x To Am29LV640

The addition of A21 needs to be taken into account dur-

ing the de si gn pha se to all ow ease of m igration. In th e

FBGA package, the RY#/BY pin is still available. The

BYTE# pin bec ome s th e V I/O pi n. This do es not have

an effect on the device if the Am29DL3 2x was operat-

ing in a x16 configuration and the Am29LV640 is going

to operate on a 3 V bus. If the Am29LV640U is going to

be used on a 5 Volt bus, 5 Volts needs to be placed on

the V I/O pin. If the Am29DL32x was used on a x8 bus

you must upgrade the interface to a x16 bus width to

migrate to the Am29LV640U. Write Protect (WP#) func-

tionality is no longer available because the WP#/ACC

pin on the Am29DL32x becomes just an ACC pin on

the Am29LV640. The ACC pin on the Am 29LV640 ca n

be left floating. In order to be able to protect sectors,

you will need to perform a standard in-system or 12V

NC NC NC NC

NCVSS

OE#CE#A0A1A2A4A3

DQ1DQ9DQ8DQ0A5A6A17A7

DQ3

DQ11DQ10DQ2A20A18

WP#

ACC

RY/

BY#

DQ4VCC

DQ12DQ5A19A21RESET#

WE#

DQ6

DQ13DQ14DQ7A11A10A8A9

VSS

D15 NCNC

NCNC

A16

7A15A14A12A13NCNC

NC NC

LKJHGFEDCA M

Am29LV160 Am29DL16x

Am29LV32x Am29DL32x

Am29LV64x Am29DL64x

VIO

BYTE#

63-ball FBGA

HGFEDCA

48-ball FBGA

Migration from 16 Megabit to 64 Megabit Flash Memory Devices 5

sector protect. Remember, the 12 V sector protect is

the only way to guarantee t he same kind of protectio n

achiev ed by the WP# pin. F or more information on sec-

tor protecti on please se e the application n ote entitled,

“Reset Pin Circuitry for Flash Memory Sector Protec-

tion Management” at: http://www.amd.com/products/

nvd/techdocs/techdocs.html.

SOFTWARE MODIFICATIONS

Software changes that are necessary include modifica-

tions of the Device ID and sector architecture, and

additional changes to the flash drivers to handle the

density change. Please refer to ftp://ftp.amd.com/pub/

nvd/device_drivers/ for more information. AMD device

drivers with detailed comments are located under the

“v11” directory. The software located in this directory

will need to be modified with ev ery density change. CFI

(Common Flash Interf ace) compliant devices eliminate

the need for software modifications when using CFI

drivers. Most AMD 16 Mb devices and above are CFI

complia nt ( re fer to individu al p art data sh eet for confir -

mation). These CFI drivers will automatically handle

things such as density changes. In order to take advan-

tage of CFI compliance you must use the AMD CFI

drivers located in the “cfi-v10” directory. The RY#/BY

pin is no longer be available on the Am29LV320 and

Am29LV640 in TSOP and the software will need to poll

the DQ status bits. F or more inf ormation on the DQ sta-

tus bits, please see the product data sheet or refer to

the application note, “Using the Operation Status Bits in

AMD Devices” (PID# 22152). Even though the R Y#/BY

pin is s till available when migrating in t he FBGA pa ck-

age, it is a good idea to get in to the ha bit of u sing the

DQ status bits for determining the state of the flash de-

vice . The DQ Sta tus bits give more inf ormation than the

Read/Busy pin such as if the has device failed an oper-

ation and in which state it failed.

In addition to the minor software modifications listed

earlier, there may be additional changes necessary

specific to Simultaneous Read/Write flash users. When

migrating from a Simultaneous Read/Write Flash de-

vice (Am29DLxxx Flash) to a non-Simultaneous Read/

Write Flash device the user may hav e to remove a por-

tion of code. If the software was written to take

advantage of simultaneous operations of the

Am29DLxxx Flash, the simultaneous functionality

needs to be removed. If the software was not written to

take advantage of the simultaneous functionality, no

additional software changes need to occur.

6 Migration from 16 Megabit to 64 Megabit Flash Memory Devices

REVISION SUMMARY

Revision B (September 13, 1999)

TSOP Migration Summary

Clarified differences between the 29LV and 29DL de-

vice families reg ardi ng ACC. In Figure 3, correcte d pi n

14 for LV320 and LV640U to WP#.

FBGA Migration Summary

Clarified differences between the 29LV and 29DL de-

vice families reg arding ACC. In Figure 5, c hanged the

orientation to top view, balls facing down.

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