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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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© 2005 Fairchild Semiconductor Corporation DS005335 www.fairchildsemi.com
September 1983
Revised May 2005
MM74HC373 3-STATE Octal D-Type Latch
MM74HC373
3-STATE Oct al D-Type Latch
General Descript ion
The MM74HC373 high speed octal D-type latches utilize
advanced silicon-gate CMOS technology. They possess
the high noise immunity and low power consumption of
standard CMOS integrat ed cir cuits, as w ell a s the a bility to
drive 15 LS -TTL loa ds. Du e to the larg e outpu t drive capa-
bility and the 3-STATE feature, these devices are ideally
suited for interfacing with bus lines in a bus organized sys-
tem.
When the LATCH ENABLE input is HIGH, the Q outputs
will follow the D inputs. When the LATCH ENABLE goes
LOW, data at the D inputs will be retained at the outputs
until LATCH ENABLE returns HIGH again. When a high
logic level is applied to the OUTPUT CONTROL input, all
outputs go to a high impedance state, regardless of what
signals are present at th e other inputs and the state of the
storage elements.
The 74H C log i c fam ily i s sp ee d, fu ncti o n, a nd pin- ou t com -
patible with the standard 74LS logic family. All inputs are
protect ed from damage due to static di scharge by in ternal
diode clamps to VCC and ground.
Features
Typical propagation delay: 18 ns
Wide operat i ng voltage ran ge : 2 to 6 volts
Low input current: 1
P
A maximum
Low quiescent current: 80
P
A maximum (74 Series)
Output drive capability: 15 LS-TTL loads
Ordering Code:
Devices also available in Tape and R eel. Sp ec if y by appending the suffix lett er “X” to the orde ring code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSO P
Top View
Truth Table
H
HIGH Level
L
LOW Le vel
Q0
Level of output befo re s t eady-state input conditions were es tab lis hed.
Z
High Impedance
Order Number Package Number Package Description
MM74HC373WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
MM74HC373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC373MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC373N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Output Latch Data 373
Control Enable Output
LHHH
LHLL
LLXQ
0
HXXZ
www.fairchildsemi.com 2
MM74HC373
Absolute Maximum Ratings(No t e 1)
(Note 2) Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings a re those va lues beyon d which d am-
age to the device may occur.
Note 2: Unless ot herwise sp ec ified all vo ltages ar e referenc ed to ground.
Note 3: Power Dis sipation temp erature de rating plastic N package:
12 mW/
q
C from 65
q
C to 85
q
C.
DC Electrical Characteristics
Note 4: For a power supply of 5V
r
10% t he wor st case ou tput vo ltages (V OH, and VOL) occur for HC a t 4.5V. T hus the 4.5V v alues sho uld be used wh en
designing with this sup ply. Worst case VIH and VIL occur at VCC
5.5V a nd 4.5V respectivel y. (The VIH value at 5. 5V is 3.85V.) The w orst case leakage c ur-
rent (IIN, I CC, and IOZ) occ ur for CMOS at th e higher voltage and so the 6.0 V v alues should be used.
Supply Voltage (VCC)
0.5 to
7.0V
DC Input Voltage (VIN)
1.5 to VCC
1.5V
DC Output Voltage (VOUT)
0.5 to VCC
0.5V
Clamp Diode Current (IIK, IOK)
r
20 mA
DC Output Current, per pin (IOUT)
r
35 mA
DC VCC or GND Current, per pin (ICC)
r
70 mA
Storage Temper ature Range ( T STG)
65
q
C to
150
q
C
Power Dissipation (PD)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Temperature (TL)
(Soldering 10 seco nds) 260
q
C
Min Max Units
Supply Voltage (VCC)26V
DC Input or Output V oltage
(VIN,VOUT)0V
CC V
Operating Temperature Range (TA)
40
85
q
C
Input Rise or Fall Times
(tr, tf) V
CC
2.0V 1000 ns
VCC
4.5V 500 ns
VCC
6.0V 400 ns
Symbol Parameter Conditions VCC TA
25
q
CT
A
40 to 85
q
CT
A
55 to 125
q
CUnits
Typ Guaranteed Limits
VIH Minimum HIGH Level 2.0V 1.5 1.5 1.5 V
Input Vo ltage 4.5V 3.15 3.15 3.15 V
6.0V 4.2 4.2 4.2 V
VIL Maximum LOW Level 2.0V 0.5 0.5 0.5 V
Input Voltage 4.5V 1.35 1.35 1.35 V
6.0V 1.8 1.8 1.8 V
VOH Minimum HIGH Level VIN
VIH or VIL
Output Voltage |IOUT|
d
20
P
A 2.0V 2.0 1.9 1.9 1.9 V
4.5V 4.5 4.4 4.4 4.4 V
6.0V 6.0 5.9 5.9 5.9 V
VIN
VIH or VIL
|IOUT|
d
6.0 mA 4.5V 4.2 3.98 3.84 3.7 V
|IOUT|
d
7.8 mA 6.0V 5.7 5.48 5.34 5.2 V
VOL Maximum LOW Level VIN
VIH or VIL
Output Voltage |IOUT|
d
20
P
A 2.0V 0 0.1 0.1 0.1 V
4.5V 0 0.1 0.1 0.1 V
6.0V 0 0.1 0.1 0.1 V
VIN
VIH or VIL
|IOUT|
d
6.0 mA 4.5V 0.2 0.26 0.33 0.4 V
|IOUT|
d
7.8 mA 6.0V 0.2 0.26 0.33 0.4 V
IIN Maxim um Input VIN
VCC or GND 6.0V
r
0.1
r
1.0
r
1.0
P
A
Current
IOZ Maxim um 3-STATE VIN
VIH or VIL, OC
VIH 6.0V
r
0.5
r
5
r
10
P
A
Output Leakage VOUT
VCC or GND
Current
ICC Maximum Quiescent VIN
VCC or GND 6.0V 8.0 80 160
P
A
Supply Current IOUT
0
P
A
3 www.fairchildsemi.com
MM74HC373
AC Electrical Characteristics
VCC
5V, TA
25
q
C, tr
tf
6 ns
AC Electrical Characteristics
VCC
2.0
6.0V, CL
50 pF, tr
tf
6 ns (unless otherwise specified)
Symbol Parameter Conditions Typ Guaranteed Units
Limit
tPHL, tPLH Maximum Propagation Delay, Data to Q CL
45 pF 18 25 ns
tPHL, tPLH Maximum Propagation Delay, LE to Q CL
45 pF 21 30 ns
tPZH, tPZL Maximum Output Enable Time RL
1 k
:
20 28 ns
CL
45 pF
tPHZ, tPLZ Maximum Output Disable Time RL
1 k
:
18 25 ns
CL
5 pF
tSMinimum Set Up Time 5ns
tHMinimum Hold Time 10 ns
tWMinimum Pulse Width 9 16 ns
Symbol Parameter Conditions VCC TA
25
q
CT
A
40 to 85
q
CT
A
55 to 125
q
CUnits
Typ Guaranteed Limits
tPHL, tPLH Maximum Propagation CL
50 pF 2.0V 50 150 188 225 ns
Delay, Data to Q CL
150 pF 2.0V 80 200 250 300 ns
CL
50 pF 4.5V 22 30 37 45 ns
CL
150 pF 4.5V 30 40 50 60 ns
CL
50 pF 6.0V 19 26 31 39 ns
CL
150 pF 6.0V 26 35 44 53 ns
tPHL, tPLH Maximum Propagation CL
50 pF 2.0V 63 175 220 263 ns
Delay, LE to Q CL
150 pF 2.0V 110 225 280 338 ns
CL
50 pF 4.5V 25 35 44 52 ns
CL
150 pF 4.5V 35 45 56 68 ns
CL
50 pF 6.0V 21 30 37 45 ns
CL
150 pF 6.0V 28 39 49 59 ns
tPZH, tPZL Maximum Output RL
1 k
:
Enable Time CL
50 pF 2.0V 50 150 188 225 ns
CL
150 pF 2.0V 80 200 250 300 ns
CL
50 pF 4.5V 21 30 37 45 ns
CL
150 pF 4.5V 30 40 50 60 ns
CL
50 pF 6.0V 19 26 31 39 ns
CL
150 pF 6.0V 26 35 44 53 ns
tPHZ, tPLZ Maximum Output Disable RL
1 k
:
2.0V 50 150 188 225 ns
Disable Time CL
50 pF 4.5V 21 30 37 45 ns
6.0V 19 26 31 39 ns
tSMinimum Set Up Time 2.0V 50 60 75 ns
4.5V 9 13 15 ns
6.0V 9 11 13 ns
tHMinimum Hold Time 2.0V 5 5 5 ns
4.5V 5 5 5 ns
6.0V 5 5 5 ns
tWMinimum Pulse Width 2.0V 30 80 100 120 ns
4.5V 10 16 20 24 ns
6.0V 9 14 18 20 ns
tTHL, tTLH Maximum Output Rise CL
50 pF 2.0V 25 60 75 90 ns
and Fall Time 4.5V 7 12 15 18 ns
6.0V 6 10 13 15 ns
CPD Power Dissipation (per latch)
Capacitance (Note 5) OC
VCC 30 pF
OC
GND 50 pF
CIN Maximum Input Capacitance 5 10 10 10 pF
www.fairchildsemi.com 4
MM74HC373
AC Electrical Characteristics (Continued)
Note 5: CPD determines t he no load dy namic powe r c onsumption, PD
CPD VCC2 f
ICC VCC, and the no load dynamic current consumption,
IS
CPD VCC f
ICC.
Symbol Parameter Conditions VCC TA
25
q
CT
A
40 to 85
q
CT
A
55 to 125
q
CUnits
Typ Guarant eed Lim its
COUT Maximum Output 15 20 20 20 pF
Capacitance
5 www.fairchildsemi.com
MM74HC373
Physical Dim ensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
www.fairchildsemi.com 6
MM74HC373
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP ), EIAJ TYPE II, 5.3mm W ide
Package Number M20D
7 www.fairchildsemi.com
MM74HC373
Physical Dim ensions inches (millimeters) unless otherwise noted (Continued)
20-Lea d Th in S hri nk Sm all Ou tlin e Pack age (TSSOP), JED EC MO-1 53, 4.4mm Wide
Package Number MTC20
www.fairchildsemi.com 8
MM74HC373 3-STATE Octal D-Type Latch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r systems a re devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical compon ent in any componen t of a life support
device or system whose failure to perform can be rea-
sonabl y ex pect ed to cause the fa ilu re of the lif e su pp ort
device or system, or to affect it s safety or effectiveness.
www.fairchildsemi.com
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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