BD512 Enhancement Mode P-Channel Power VMOS Transistor for applications needing high input impedance and fast switching times. Features: High input impedance High speed switching No minority carrier storage time CMOS logic compatible input No thermal runaway No secondary breakdown Paralleling is simple Heat sink connected to drain 2 Drain Source 1 Graphic Symbol Absolute Maximum Ratings Ly o6 Y 4 10) Ore 75m! if v S t ; SDG Plastic case TO-202 (34 A 3, DIN 41 869) Weight approximately 1.5 g Dimensions in mm Symbol Value Unit Drain-Source Voltage Voss -60 Vv Drain-Gate Voltage Voes 60 V Continuous Drain Current lb -1.5 A Power Dissipation at 25 C Case Temperature Prot 10 W at 25 C Free Air Temperature Prot 1.75 Ww Temperature (Operating and Storage) T, Ts 55 to +150 C 172 BD512 Characteristics at T; = 25C Symbol Min. Typ. Max. Unit Drain-Source Breakdown Voltage VerR)pss 60 80 - Vv at Ves =0, lp = 100 pA Gate Threshold Voltage at Ves = Vos, lp = 1 MA Vasiin) 1.0 3.5 V Gate-Body Leakage Current at Vgg = 15 V, Vos = 0 lgss - - 100 nA Drain Cutoff Current at Veg = 0, -Vps = 25 V IDior - - 0.5 BA Drain-Source On Resistance los(on) - 4.5 7 Q at Ves =10 V, Ip =1A Thermal Resistance Chip to Heat Sink Rins = - 12.5 K/W Chip to Ambient Rina = - 70 K/W Forward Transconductance Om - 300 - mS at -Vps = 10 V,-lp = 0.5A, f = 1 MHz Input Capacitance at Veg = 0,~Vps = 10 V, f = 1 MHz Ciss 140 = pF Turn On Time ton = 4 10 ns Turn Off Time tot - 4 10 ns Pulse Test Width ~80 us; Pulse Duty Factor 1%. Switching Performance of Input and Output Voltages 20dB/502 F-?% Attenuator do 00 Test Circuit for the Switching Times | oll | | lr | CTT 0 10 20 30 40 ns t 173