DEMO MANUAL SCP-FILTER-EVALZ
Rev. 0
1
DESCRIPTION
Demonstration circuit SCP-FILTER-EVALZ is a companion
hardware tool designed to allow passive RCL filter net-
works in a Signal Chain Power hardware evaluation ma-
trix. It accommodates an Nth-order filter network as well
as specialty 3-terminal feedthrough filters.
Like all boards in the Signal Chain Power series, this board
is designed to be easily plugged into other SCP boards to
form a complete signal chain power system, enabling fast
evaluation of low power signal chains. To evaluate this
board, some universal SCP hardware is required, namely:
SCP-INPUT-EVALZ SCP-1X2BKOUT-EVALZ
SCP-OUTPUT-EVALZ SCP-5X1-EVALZ
SCP-1X5BKOUT-EVALZ
SCP-THRUBRD-EVALZ
To properly evaluate SCP series demo boards, you will
need the SCP Configurator companion software. SCP
Configurator can help you choose the right board and to-
pology for your design.
Design files for this circuit board are available.
All registered trademarks and trademarks are property of their respective owners.
Table 1.
Performance Summary
SYMBOL
PARAMETER
NOTES
MIN
TYP
MAX
UNITS
V
IN(MAX)
Max Input Voltage
50
V
V
OUT(MAX)
Max Output Voltage
50
V
I
OUT(MAX)
Max Output Current
2
A
BOARD IMAGE
Figure 1. Signal Chain Power Passive Filter Board
DEMO MANUAL
SCP-FILTER-EVALZ
Signal Chain Power
Passive Filter Board
DEMO MANUAL SCP-FILTER-EVALZ
Rev. 0
2
QUICK START PROCEDURE
Demonstration circuit
SCP-FILTER-EVALZ
is easy to set
up to evaluate the performance of any SCP hardware
configuration.
1. The SCP-FILTER-EVALZ ships with a bi-directional LED
to indicate applied voltage. To set the limiting resistor,
see “Configuration Settings” section, and modify the
board accordingly. Be sure to check for open connec-
tions or solder shorts after making any modifications.
2. Connect the SCP-INPUT-EVALZ and SCP-OUTPUT-
EVALZ boards to the SCP board under evaluation (refer
to Figure 2) and connect the input board to a voltage
source, V
SOURCE
. Connect the output board to a volt-
meter or dynamic load. Slowly raise the input voltage
until the SCP-FILTER-EVALZ powers up the device un-
der test into regulation and sweep V
SOURCE
through the
desired range of operation.
NOTE: Make sure that the input voltage is always within
spec. If using a dynamic load to measure output volt-
age, make sure the load is initially set to zero.
3. Check for proper output voltage. The output should be
regulated at the programmed value (±5%).
4. Once the proper output voltage is established, power
off V
SOURCE
and similarly test other boards in the SCP
system until all elements have been individually verified
prior to assembling into the final circuit configuration.
NOTE: When measuring the input or output voltage rip-
ple, use the optional SMA connector locations available
on the input, output, 1
´
5, 1
´
2, and 5
´
1 breakout
boards. Avoid using the test point connections with
long scope leads.
Figure 2. Proper Measurement Equipment Setup (Use SMA connectors for Measuring Input or Output Ripple)
DEMO MANUAL SCP-FILTER-EVALZ
Rev. 0
3
CONFIGURATION SETTINGS
Demonstration circuit SCP-FILTER-EVALZ is a companion
hardware tool designed to allow passive RCL filter net-
works in a Signal Chain Power hardware evaluation ma-
trix. It accommodates an Nth-order filter network as well
as specialty 3-terminal feedthrough filters.
FILTER CONFIGURATION
The filter board can be configured with standard L-C-R
components to create multiple-ordered passive filter net-
works for those applications which might require selective
notch filtering or cascaded low-pass networks.
Additionally, the filter boards feature a placement location
for a highly effective 3-terminal feedthrough filter (TDK
YFF series) on both positive and negative rails. This can
be used alone or with additional ferrite beads placed
across the series component locations.
If de-Q’ing is required to eliminate sharp resonances as-
sociated with ceramic capacitors and ferrite-based induc-
tors, capacitors have series resistance elements and in-
ductors have parallel resistance element options.
FREQUENCY RESPONSE
The filter board PCB layout was designed to have as max-
imally flat frequency response as possible to test the ac-
tual effects of the chosen filter components.
Figure 3. Swept spectrum power plot of filter board; series
components shorted across; RBW: 100kHz; VBW: 100kHz
3-TERMINAL FEEDTHROUGH FILTER CONFIGURATION
Locations C1 and C2 support the TDK YFF series family of
3-terminal feedthrough capacitors. Refer to Figure 4 to uti-
lize these locations for excellent RF noise suppression.
Table 2.
TDK YFF Family (xx: size codes, see Table 3)
TDK PART #
FUNCTION
YFFxxPC
Feedthrough filter for power line
YFFxxPH
Feedthrough filter for power line
YFFxxPW
Feedthrough filter for power line
YFFxxHC
Feedthrough filter for high current line
YFFxxSC
Feedthrough filter for signal line
Table 3.
TDK YFF Size Codes (xx from Table 2)
SIZE CODE
SIZE
15
1005 [0402 inch]
18
1608 [0603 inch]
21
2012 [0805 inch]
31
3216 [1206 inch]
To make shorting across the center ground pad easier
when the component is not stuffed, the pad is intentionally
isolated. When stuffing these filter components, make
sure to bridge the pad to ground on both sides as shown
in Figure 4.
Figure 4. Connection for YFF center ground pad
DEMO MANUAL SCP-FILTER-EVALZ
Rev. 0
4
PARTS LIST
ITEM
QTY
REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
1
1
PCB
PCB
ANALOG DEVICES 08_051167b
2
6
C9, C10, C11,
C12, C13, C14
CAP MLCC 0805 (Note 1)
N/A
3
1
INPUT
CONN MALE 3POS 2.54MM PITCH R/A
SULLINS PBC03SBAN
4
1
OUTPUT
CONN FEMALE 3POS 2.54MM PITCH R/A
SULLINS PPPC031LGBN-RC
5
16
R1, R2, R3, R4,
R5, R6, R7, R8,
R9, R10, R11,
R12, R13, R14,
R15, R16
RES THICK FILM 0603 (Note 1)
N/A
Note 1.
These items are not stuffed (DNI).
DEMO MANUAL SCP-FILTER-EVALZ
Rev. 0
5
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
SCHEMATIC DIAGRAM
FEMALE
GND
GND
MALE
FILTER BOARD
DNI
DNI
DNI
0
DNI DNI
0
DNI DNI
0
0
DNI
DNI
DNI
0
DNI
0
0
DNI
DNI
0
DNI
DNI
0 0
DNI
DNI
0
00
DNI
J.VIERNES
02_051167 B
1:1
HW TYPE : SCP EVAL-Z
Product(s): LT3094
: NA
<DESIGN_VIEW>
22
0
DNI
DNI
DNI
DNI
DNI
DNI
0
DNI
DNI
DNI
0
DNI DNI
DNI
DNI
DNI
DNI
DNI
C1
R6
C2
R2 R8
R10
L2
R9
C6
R12
L4
C5
R11
L3
C8 C7
OU TP UT
R1
L 1
C9
C3
R7
INPUT
C10
R3 R13
C 11
C 12
R4 R14
R5
R15
C13
R16
C14
C4
V-
V+
GND2
GND2
GND1
VO+
VO-
GND1
3
2
1
2
1
4
3
2
3
4
1
1
2
3
AGN D
D
THIS DRAWING IS THE PROPERTY OF ANAL OG DEVICES INC.
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FO R ANY O THER PURPOSE DETRIMENTAL TO THE INTERESTS
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
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C
IT IS NO T TO BE REPRODUCED OR COPIED, IN WHOLE OR
DRAWING NO.
2
SCALE
D
D
D
SIZE
D
REV
SHEET
1
1
A
2
3
4
3
5
8
D
7
67
8
A
B
CC
D
5
4
APPROVED
B
6
DESCRIPTION
REVISIONS
OF
OL G
E
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
E
AN
V
OF ANALOG DEVICES.
SCHEMATIC
S
PTD ENGI NEE R
DESIGN VI EW
REV DATE
DEMO MANUAL SCP-FILTER-EVALZ
Rev. 0
6
11/20
www.analog.com
© ANALOG DEVICES INC. 2020
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ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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