Publication Order Number:
NDS0610/D
NDS0610
P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode field effect
transistors are produced using ON Semiconductor's
proprietary, high cell density, DMOS technology. This
very high density process has been designed to
minimize on-state resistance, provide rugged
and reliable performance and fast switching. They
can be used, with a minimum of effort, in most
applications requiring up to 120mA DC and can deliver
current up to 1A.
This product is particularly suited to low voltage
applications requiring a low current high side switch.
Features
•−0.12A, −60V. RDS(ON) = 10 Ω @ VGS = −10 V
R
DS(ON) = 20 Ω @ VGS = −4.5 V
•Voltage c ontrolled p-channel smal l signal switc h
•High densit y cell des i gn for low RDS(ON)
•High saturation current
G
D
S
SOT-23
D
SG
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source V ol tage −60 V
VGSS Gate-Source Voltage ±20 V
ID Drain Current – Continuous (Note 1) −0.12 A
– Pulsed −1
Maximum Power Dissipat i on (Note 1) 0.36 W
PD Derate Above 25°C 2.9 mW/°C
TJ, TSTG Operating and St orage Junction Temperature Range −55 to +150 °C
TL Maximum Lead Temperature f or S ol deri ng
Purposes , 1/16” from Case for 10 Seconds 300 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 350 °C/W
Package Marking and Ordering Information
Device Marki ng Device Reel Siz e Tape width Quantity
610 NDS0610 7’’ 8mm 3000 units
NDS0610
© 2002 Semiconductor Components Industries, LLC.
September-2017, Rev. 2
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2
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Sourc e Breakdown Voltage VGS = 0 V, ID = –10 µA –60 V
∆BVDSS
∆TJ Breakdown Voltage Temperature
Coefficient ID = –10 µA,Referenced to 25°C –53 mV/°C
IDSS Zero Gate Volt age Drai n Current VDS = –48 V, VGS = 0 V –1 µA
VDS = –48 V,VGS = 0 V T J = 125°C –200
µA
IGSS Gate–Body Leakage. VGS = ±20 V, VDS = 0 V ±10 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold V ol t age VDS = VGS, ID = –1 mA –1 –1.7 –3.5 V
∆VGS(th)
∆TJ Gate Threshold Vol tage
Temperat ure Coef ficient ID = –1 mA, Ref erenced to 25°C 3 mV/°C
RDS(on) Static Drain–Source
On–Resistance VGS = –10 V, ID = –0.5 A
VGS = –4.5 V, ID = –0.25 A
VGS = –10 V,ID = –0.5 A , T J=125°C
1.0
1.3
1.7
10
20
16
Ω
ID(on) On–State Drai n Current VGS = –10 V, VDS = – 10 V –0.6 A
gFS Forward Transconductance VDS = –10V, ID = – 0.1 A 70 430 mS
Dynamic Characteristics
Ciss Input Capacitance 79 pF
Coss Output Capacitance 10 pF
Crss Reverse Transfer Capacitance
VDS = –25 V, V GS = 0 V,
f = 1.0 MHz 4 pF
RGGate Resistance VGS = –15 mV , f = 1.0 MHz 10 Ω
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time 2.5 5 ns
trTurn–On Rise Time 6.3 12.6 ns
td(off) Turn–Off Delay Time 10 15 ns
tfTurn–Off Fall Time
VDD = –25 V, I D = – 0.12 A,
VGS = –10 V, RGEN = 6 Ω
7.5 15 ns
QgTotal Gate Charge 1.8 2.5 nC
Qgs Gate–Source Charge 0.3 nC
Qgd Gate–Drain Charge
VDS = –48 V, ID = –0.5 A,
VGS = –10 V
0.4 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Cont i nuous Drain–Source Di ode Forward Current –0.24 A
VSD Drain–Source Diode Forward
Voltage VGS = 0 V, IS = –0.24 A(Note 2) –0.8 –1.5 V
trr Diode Reverse Recovery Ti me 17 nS
Qrr Diode Reverse Rec overy Charge IF = –0.5A
diF/dt = 100 A/µs (Note 2) 15 nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 350°C/W when mounted on a
minimum pad. .
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
NDS0610
Typical Characteristics
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0123456
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
VGS=-10V -4.5V
-3.5V
-3.0V
-6.0V -4.0V
-2.5V
0.8
1
1.2
1.4
1.6
1.8
2
2.2
0 0.2 0.4 0.6 0.8 1 1.2 1.4
-ID, DRAIN CURRE NT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS=-3.0V
-3.5V
-10V
-6.0V
-4.5V
-4.0V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION T E MP E RATURE (oC)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANC
E
ID = -0.5A
VGS = -10V
0
1
2
3
4
5
246810
-VGS, GATE TO SOU RCE VOLTAGE (V)
R
DS(ON)
, ON-RE S ISTANCE (OHM)
ID = -0.25A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
0.2
0.4
0.6
0.8
1
1.2
1 1.5 2 2.5 3 3.5 4 4.5
-VGS, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
TA = -55oC25oC
125oC
VDS = -10V
0.0001
0.001
0.01
0.1
1
10
0.2 0.4 0.6 0.8 1 1.2
-VSD, BO DY DIODE FORWARD VOLTAGE ( V )
-I
S
, REVERSE DRAIN CURRENT (A
)
VGS = 0V
TA = 125oC
25oC
-55oC
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
NDS0610
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3
Typical Characteristics
0
2
4
6
8
10
0 0.4 0.8 1.2 1.6 2
Qg, GATE CHARGE (nC)
-V
GS
, GATE-SOURCE VOLTAGE (V)
ID = -0.5A VDS = -12V -24V
-48V
0
20
40
60
80
100
0 102030405060
-VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
COSS
CRSS
f = 1 MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.001
0.01
0.1
1
10
1 10 100
-VDS, DRAIN-SOURCE V O LTAGE (V)
-I
D
, DRAIN CURRENT (A)
DC
10s 1s100ms
RDS(ON) LIMIT
VGS = -10V
SINGLE PULSE
RθJA = 350oC/W
TA = 25oC
10ms 1ms
100us
0
1
2
3
4
5
0.01 0.1 1 10 100
t1, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 350°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
r(t), NORM ALIZED EFFECTIV E TRANSIEN
T
THERMAL RESISTANCE
RθJA(t) = r(t) * RθJA
RθJA = 350oC/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P
(p
k
)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1a.
Transient thermal response will change depending on the circuit board design.
NDS0610
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