
UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 5
QW-R204-014,B
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage
waveforms since they are in phase, However, for inductive loads which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements
must be made on each wave form to determine the total switching time, For this reason, the following new terms
have been defined.
tsv=Voltage Storage Time, 90% IB1 to 10% Vclamp
trv=Voltage Rise Time, 10-90% Vclamp
tfi=Current Fall Time, 90-10% Ic
tti=Current Tail, 10-2% Ic
tc=Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these
terms.
For the designer, there is minimal switching loss during storage time and the predominant switching power losses
occur during the crossover interval and can be obtained using the standard equation from AN-222:
PSWT=1/2 VccIc (tc)f
In general, trv + tfi≒tc. However, at lower test currents this relationship may not be valid.
As is common with most switching transistor, resistive switching is specified at 25℃ and has become a benchmark
for designers. However, for designers of high frequency converter circuits, the user oriented specifications which
make this a “SWITCHMODE” transistor are the inductive switching speeds (tc and tsv) which are guaranteed at 100
℃
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a transistor: average junction temperature and second
break-down. Safe operating area curves indicate Ic – VCE limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 10 is based on Tc=25℃; TJ(pk) is variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be derated when Tc≧25℃. Second breakdown limitations do
not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 10 may be found at
any case tem-perature by using the appropriate curve on Figure 12.
TJ(pk) may be calculated from the data in Figure 10. At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limitations imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be sustained simultaneously during turn–off, in most
cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to
a safe level at or below a specific value of collector current. This can be accomplished by several means such as
active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias
Safe Operating Area and represents the voltage–current conditions during re-verse biased turn–off. This rating is
verified under clamped conditions so that the device is never subjected to an ava-lanche mode. Figure 11 gives
RBSOA characteristics.