INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4016 Quad bilateral switches Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 "4000B" series. They are specified in compliance with JEDEC standard no. 7A. FEATURES * Low "ON" resistance: 160 (typ.) at VCC = 4.5 V 120 (typ.) at VCC = 6.0 V 80 (typ.) at VCC = 9.0 V The 74HC/HCT4016 have four independent analog switches (transmission gates). Each switch has two input/output terminals (Yn, Zn) and an active HIGH enable input (En). When En is connected to VCC, a low bidirectional path between Yn and Zn is established (ON condition). When En is connected to ground (GND), the switch is disabled and a high impedance between Yn and Zn is established (OFF condition). * Individual switch controls * Typical "break before make" built in * Output capability: non-standard * ICC category: SSI Current through a switch will not cause additional VCC current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VCC >> (VY, VZ) >> GND. Inputs Yn and Zn are electrically equivalent terminals. GENERAL DESCRIPTION The 74HC/HCT4016 are high-speed Si-gate CMOS devices and are pin compatible with the "4016" of the QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER UNIT CONDITIONS HC tPZH/ tPZL turn "ON" time En to VOS tPHZ/ tPLZ turn "OFF" time En to VOS CI input capacitance CPD power dissipation capacitance per switch CS max. switch capacitance CL = 15 pF; RL = 1 k; VCC = 5 V notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + { (CL + CS) x VCC2 x fo } where: fi = input frequency in MHz fo = output frequency in MHz {(CL + CS) x VCC2 x fo} = sum of outputs CL = output load capacitance in pF CS = max. switch capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". December 1990 2 HCT 16 17 ns 14 20 ns 3.5 3.5 pF 12 12 pF 5 5 pF Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 4, 8, 11 Y0 to Y3 independent inputs/outputs 7 GND ground (0 V) 2, 3, 9, 10 Z0 to Z3 independent inputs/outputs 13, 5, 6, 12 E0 to E3 enable inputs (active HIGH) 14 VCC positive supply voltage (a) Fig.1 Pin configuration. December 1990 Fig.2 Logic symbol. 3 (b) Fig.3 IEC logic symbol. Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 APPLICATIONS * Signal gating * Modulation * Demodulation * Chopper Fig.4 Functional diagram. FUNCTION TABLE INPUT En CHANNEL IMPEDANCE L H high low Notes 1. H = HIGH voltage level L = LOW voltage level Fig.5 Schematic diagram (one switch). December 1990 4 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER MIN. MAX. UNIT VCC DC supply voltage -0.5 +11.0 V IIK DC digital input diode current 20 mA for VI < -0.5 V or VI > VCC + 0.5 V ISK DC switch diode current 20 mA for VS < -0.5 V or VS > VCC + 0.5 V for -0.5 V < VS < VCC + 0.5 V IS DC switch current 25 mA ICC; IGND DC VCC or GND current 50 mA Tstg storage temperature range +150 C Ptot power dissipation per package PS -65 CONDITIONS for temperature range: -40 to +125 C 74HC/HCT plastic DIL 750 mW above +70 C: derate linearly with 12 mW/K plastic mini-pack (SO) 500 mW above +70 C: derate linearly with 8 mW/K power dissipation per switch 100 mW RECOMMENDED OPERATING CONDITIONS 74HC 74HCT SYMBOL PARAMETER UNIT CONDITIONS min. typ. max. min. typ. max. VCC DC supply voltage 2.0 VI DC input voltage range VS DC switch voltage range Tamb Tamb 5.0 10.0 4.5 GND VCC GND VCC operating ambient temperature range -40 operating ambient temperature range -40 5.0 5.5 V GND VCC V GND VCC V +85 -40 +85 C +125 -40 +125 C 1000 t r, t f input rise and fall times December 1990 6.0 5 500 400 250 see DC and AC CHARACTERISTICS VCC = 2.0 V 6.0 500 ns VCC = 4.5 V VCC = 6.0 V VCC = 10.0 V Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 DC CHARACTERISTICS FOR 74HC/HCT For 74HC: VCC = 2.0, 4.5, 6.0 and 9.0 V For 74HCT: VCC = 4.5 V Tamb (C) TEST CONDITIONS 74HC/HCT SYMBOL PARAMETER +25 min. -40 to +85 -40 to +125 typ. max. min. max. min. max. UNIT VCC (V) IS (A) Vis VI RON ON resistance (peak) - 160 120 85 - 320 240 170 - 400 300 213 - 480 360 255 2.0 4.5 6.0 9.0 100 1000 1000 1000 VCC VIH to or GND VIL RON ON resistance (rail) 160 80 70 60 - 160 140 120 - 200 175 150 - 240 210 180 2.0 4.5 6.0 9.0 100 1000 1000 1000 GND VIH or VIL RON ON resistance (rail) 170 90 80 65 - 180 160 135 - 225 200 170 - 270 240 205 2.0 4.5 6.0 9.0 100 1000 1000 1000 VCC RON maximum ON resistance between any two channels - 16 12 9 2.0 4.5 6.0 9.0 VIH or VIL VCC VIH to or GND VIL Notes to the DC Characteristics 1. At supply voltages approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 2. For test circuit measuring RON see Fig.6. Fig.6 Test circuit for measuring RON. December 1990 Fig.7 Test circuit for measuring OFF-state current. 6 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 Fig.8 Test circuit for measuring ON-state current. Fig.9 Typical RON as a function of input voltage Vis for Vis = 0 to VCC. December 1990 7 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 DC CHARACTERISTICS FOR 74HC Voltages are referenced to GND (ground = 0 V) Tamb (C) TEST CONDITIONS 74HC SYMBOL PARAMETER VIH HIGH level input voltage VIL LOW level input voltage II +25 -40 to +85 min. typ. max. min. max. min. 1.5 3.15 4.2 6.3 1.2 2.4 3.2 4.3 0.8 2.1 2.8 4.3 1.5 3.15 4.2 6.3 -40 to +125 UNIT VCC (V) V 2.0 4.5 6.0 9.0 VI OTHER max. 1.5 3.15 4.2 6.3 0.50 1.35 1.80 2.70 0.50 1.35 1.80 2.70 0.50 1.35 1.80 2.70 V 2.0 4.5 6.0 9.0 input leakage current 0.1 0.2 1.0 2.0 1.0 2.0 A 6.0 VCC 10.0 or GND IS analog switch OFF-state current per channel 0.1 1.0 1.0 A 10.0 VIH or VIL VS = VCC - GND (see Fig.7) IS analog switch ON-state current 0.1 1.0 1.0 A 10.0 VIH or VIL VS = VCC - GND (see Fig.8) ICC quiescent supply current 2.0 4.0 20.0 40.0 40.0 80.0 A 6.0 VCC 10.0 or GND Vis = GND or VCC; Vos = VCC or GND AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HC SYMBOL PARAMETER min. +25 -40 to +85 typ. max. min. max. -40 to +125 min. UNIT V CC (V) OTHER max. tPHL/ tPLH propagation delay Vis to Vos 17 6 5 4 60 12 10 8 75 15 13 10 90 18 15 12 ns 2.0 4.5 6.0 9.0 RL = ; CL = 50 pF (see Fig.16) tPZH/ tPZL turn "ON" time En to Vos 52 19 15 11 190 38 32 28 240 48 41 35 235 57 48 42 ns 2.0 4.5 6.0 9.0 RL = 1 k; CL = 50 pF (see Figs 17 and 18) tPHZ/ tPLZ turn "OFF" time En to Vos 47 17 14 13 145 29 25 22 180 36 31 28 220 44 38 33 ns 2.0 4.5 6.0 9.0 RL = 1 k; CL = 50 pF (see Figs 17 and 18) December 1990 8 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 DC CHARACTERISTICS FOR 74HCT Voltages are referenced to GND (ground = 0 V) Tamb (C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. typ. VIH HIGH level input voltage VIL LOW level input voltage II 2.0 -40 to +85 max. min. max. min. 1.6 1.2 -40 to +125 2.0 UNIT VCC VI (V) V 4.5 to 5.5 OTHER max. 2.0 0.8 0.8 0.8 V 4.5 to 5.5 input leakage current 0.1 1.0 1.0 A 5.5 VCC or GND IS analog switch OFF-state current per channel 0.1 1.0 1.0 A 5.5 VIH or VIL VS = VCC - GND (see Fig.7) IS analog switch ON-state current 0.1 1.0 1.0 A 5.5 VIH or VIL VS = VCC - GND (see Fig.8) ICC quiescent supply current 2.0 20.0 40.0 A 4.5 to 5.5 VCC or GND Vis = GND or VCC; Vos = VCC or GND ICC additional quiescent supply current per input pin for unit load coefficient is 1 (note 1) 360 450 490 A 4.5 to 5.5 VCC other inputs -2.1V at VCC or GND 100 Note 1. The value of additional quiescent supply current (ICC) for a unit load of 1 is given here. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT EN 1.00 December 1990 9 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 -40 to +85 min. typ. max. min. max. -40 to +125 UNIT VCC OTHER (V) min. max. tPHL/ tPLH propagation delay Vis to Vos 6 12 15 18 ns 4.5 RL = ; CL = 50 pF (see Fig.16) tPZH turn "ON" time En to Vos 19 35 44 53 ns 4.5 RL = 1 k; CL = 50 pF (see Figs 17 and 18) tPZL turn "ON" time En to Vos 20 35 44 53 ns 4.5 RL = 1 k; CL = 50 pF (see Figs 17 and 18) tPHZ/ tPLZ turn "OFF" time En to Vos 23 35 44 53 ns 4.5 RL = 1 k; CL = 50 pF (see Figs 17 and 18) ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT Recommended conditions and typical values GND = 0 V; tr = tf = 6 ns SYMBOL VCC (V) Vis(p-p) (V) PARAMETER typ. UNIT sine-wave distortion f = 1 kHz 0.80 0.40 % % 4.5 9.0 4.0 8.0 RL = 10 k; CL = 50 pF (see Fig.14) sine-wave distortion f = 10 kHz 2.40 1.20 % % 4.5 9.0 4.0 8.0 RL = 10 k; CL = 50 pF (see Fig.14) switch "OFF" signal feed-through -50 -50 dB dB 4.5 9.0 note 3 RL = 600 ; CL = 50 pF; f = 1 MHz (see Figs 10 and 15) crosstalk between any two switches -60 -60 dB dB 4.5 9.0 note 3 RL = 600 ; CL = 50 pF; f = 1 MHz (see Fig.12) V(p-p) crosstalk voltage between enable or address input to any switch (peak-to-peak value) 110 220 mV mV 4.5 9.0 fmax minimum frequency response (-3dB) 150 160 MHz MHz 4.5 9.0 CS maximum switch capacitance 5 pF CONDITIONS RL = 600 ; CL = 50 pF; f = 1 MHz (En, square wave between VCC and GND, tr = tf = 6 ns) (see Fig.13) note 4 RL = 50 ; CL = 10 pF (see Figs 11 and 14) Notes 1. Vis is the input voltage at a Yn or Zn terminal, whichever is assigned as an input. 2. Vos is the output voltage at a Yn or Zn terminal, whichever is assigned as an output. 3. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ). 4. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ). December 1990 10 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k. Fig.10 Typical switch "OFF" signal feed-through as a function of frequency. Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k. Fig.11 Typical frequency response. December 1990 11 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 Fig.12 Test circuit for measuring crosstalk between any two switches. (a) channel ON condition; (b) channel OFF condition. The crosstalk is defined as follows (oscilloscope output): Fig.13 Test circuit for measuring crosstalk between control and any switch. Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response. Fig.15 Test circuit for measuring switch "OFF" signal feed-through. December 1990 12 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.16 Waveforms showing the input (Vis) to output (Vos) propagation delays. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.17 Waveforms showing the turn-ON and turn-OFF times. December 1990 13 Philips Semiconductors Product specification Quad bilateral switches 74HC/HCT4016 TEST CIRCUIT AND WAVEFORMS Conditions TEST tPZH tPZL tPHZ tPLZ others SWITCH GND VCC GND VCC open Vis VCC GND VCC GND pulse CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint tr, tf with 50% duty factor. tr; tf FAMILY 74HC 74HCT AMPLITUDE VCC 3.0 V VM 50% 1.3 V fmax; PULSE WIDTH < 2 ns < 2 ns OTHER 6 ns 6 ns Fig.18 Test circuit for measuring AC performance. CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint tr, tf with 50% duty factor. tr; tf FAMILY 74HC 74HCT AMPLITUDE VCC 3.0 V VM 50% 1.3 V fmax; PULSE WIDTH < 2 ns < 2 ns OTHER 6 ns 6 ns Fig.19 Input pulse definitions. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines". December 1990 14