74HC4016D-T - Philips Semiconductors / NXP Semiconductors

DATA SH EET

Product speciﬁcation

File under Integrated Circuits, IC06 December 1990

INTEGRATED CIRCUITS

74HC/HCT4016

Quad bilateral switches

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

December 1990 2

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

FEATURES

•Low “ON” resistance:

160 Ω(typ.) at VCC = 4.5 V

120 Ω(typ.) at VCC = 6.0 V

80 Ω(typ.) at VCC = 9.0 V

•Individual switch controls

•Typical “break before make” built in

•Output capability: non-standard

•ICC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT4016 are high-speed Si-gate CMOS

devices and are pin compatible with the “4016” of the

“4000B” series. They are specified in compliance with

JEDEC standard no. 7A.

The 74HC/HCT4016 have four independent analog

switches (transmission gates).

Each switch has two input/output terminals (Yn,Z

) and an

active HIGH enable input (En). When Enis connected to

VCC, a low bidirectional path between Ynand Znis

established (ON condition). When Enis connected to

ground (GND), the switch is disabled and a high

impedance between Ynand Znis established (OFF

condition).

Current through a switch will not cause additional

VCC current provided the voltage at the terminals of the

switch is maintained within the supply voltage range;

VCC >> (VY,V

) >> GND. Inputs Ynand Znare electrically

equivalent terminals.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr= tf= 6 ns

Notes

1. CPD is used to determine the dynamic power dissipation (PDin µW):

PD= CPD ×VCC2×fi+∑{(C

L+C

)×V

CC2×fo} where:

fi= input frequency in MHz

fo= output frequency in MHz

∑{(CL+CS)×VCC2×fo} = sum of outputs

CL= output load capacitance in pF

CS= max. switch capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI= GND to VCC

For HCT the condition is VI= GND to VCC −1.5 V

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”

SYMBOL PARAMETER CONDITIONS TYPICAL UNIT

HC HCT

tPZH/ tPZL turn “ON” time Ento VOS CL= 15 pF; RL=1 kΩ;

CC = 5 V 16 17 ns

tPHZ/ tPLZ turn “OFF” time Ento VOS 14 20 ns

CIinput capacitance 3.5 3.5 pF

CPD power dissipation capacitance per switch notes 1 and 2 12 12 pF

CSmax. switch capacitance 5 5 pF

December 1990 3

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1, 4, 8, 11 Y0to Y3independent inputs/outputs

7 GND ground (0 V)

2, 3, 9, 10 Z0to Z3independent inputs/outputs

13, 5, 6, 12 E0to E3enable inputs (active HIGH)

14 VCC positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

(a) (b)

December 1990 4

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

FUNCTION TABLE

Notes

1. H = HIGH voltage level

L = LOW voltage level

INPUT

CHANNEL

IMPEDANCE

Hhigh

low

Fig.4 Functional diagram.

APPLICATIONS

•Signal gating

•Modulation

•Demodulation

•Chopper

Fig.5 Schematic diagram (one switch).

December 1990 5

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)

Voltages are referenced to GND (ground = 0 V)

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

VCC DC supply voltage −0.5 +11.0 V

±IIK DC digital input diode current 20 mA for VI<−0.5 V or VI>VCC +0.5 V

±ISK DC switch diode current 20 mA for VS<−0.5 V or VS>VCC +0.5 V

±ISDC switch current 25 mA for −0.5 V <VS<VCC +0.5 V

±ICC; ±IGND DC VCC or GND current 50 mA

Tstg storage temperature range −65 +150 °C

Ptot power dissipation per package for temperature range: −40 to +125 °C

74HC/HCT

plastic DIL 750 mW above +70 °C: derate linearly with 12 mW/K

plastic mini-pack (SO) 500 mW above +70 °C: derate linearly with 8 mW/K

PSpower dissipation per switch 100 mW

SYMBOL PARAMETER 74HC 74HCT UNIT CONDITIONS

min. typ. max. min. typ. max.

VCC DC supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 V

VIDC input voltage range GND VCC GND VCC V

VSDC switch voltage range GND VCC GND VCC V

Tamb operating ambient temperature range −40 +85 −40 +85 °Csee DC and AC

CHARACTERIS-

TICS

Tamb operating ambient temperature range −40 +125 −40 +125 °C

1000 VCC = 2.0 V

tr,t

finput rise and fall times 6.0 500

400

250

6.0 500 ns VCC = 4.5 V

VCC = 6.0 V

VCC = 10.0 V

December 1990 6

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

DC CHARACTERISTICS FOR 74HC/HCT

For 74HC: VCC = 2.0, 4.5, 6.0 and 9.0 V

For 74HCT: VCC = 4.5 V

Notes to the DC Characteristics

1. At supply voltages approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear. Therefore it

is recommended that these devices be used to transmit digital signals only, when using these supply voltages.

2. For test circuit measuring RON see Fig.6.

SYMBOL PARAMETER

Tamb (°C)

UNIT

TEST CONDITIONS

74HC/HCT VCC

(V) IS

(µA) Vis VI

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

RON ON resistance (peak) −

160

120

−

320

240

170

−

400

300

213

−

480

360

255

Ω

2.0

4.5

6.0

9.0

100

1000

VCC

GND

VIH

VIL

RON ON resistance (rail) 160

−

160

140

120

−

200

175

150

−

240

210

180

Ω

2.0

4.5

6.0

9.0

100

1000

GND VIH

VIL

RON ON resistance (rail) 170

−

180

160

135

−

225

200

170

−

270

240

205

Ω

2.0

4.5

6.0

9.0

100

1000

VCC VIH

VIL

∆RON maximum ∆ON

resistance between

any two channels

−

Ω

2.0

4.5

6.0

9.0

VCC

GND

VIH

VIL

Fig.6 Test circuit for measuring RON. Fig.7 Test circuit for measuring OFF-state current.

December 1990 7

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

Fig.8 Test circuit for measuring ON-state current.

Fig.9 Typical RON as a function of input voltage Vis for Vis = 0 to VCC.

December 1990 8

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

DC CHARACTERISTICS FOR 74HC

Voltages are referenced to GND (ground = 0 V)

AC CHARACTERISTICS FOR 74HC

GND = 0 V; tr=t

f= 6 ns; CL= 50 pF

SYMBOL PARAMETER

Tamb (°C)

UNIT

TEST CONDITIONS

74HC VCC

(V) VIOTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

VIH HIGH level input

voltage 1.5

3.15

4.2

6.3

1.2

2.4

3.2

4.3

1.5

3.15

4.2

6.3

1.5

3.15

4.2

6.3

V 2.0

4.5

6.0

9.0

VIL LOW level input

voltage 0.8

2.1

2.8

4.3

0.50

1.35

1.80

2.70

0.50

1.35

1.80

2.70

0.50

1.35

1.80

2.70

V 2.0

4.5

6.0

9.0

±IIinput leakage

current 0.1

0.2 1.0

2.0 1.0

2.0 µA 6.0

10.0 VCC

GND

±ISanalog switch

OFF-state current

per channel

0.1 1.0 1.0 µA 10.0 VIH

VIL

VS=

VCC −GND

(see Fig.7)

±ISanalog switch

ON-state current 0.1 1.0 1.0 µA 10.0 VIH

VIL

VS=

VCC −GND

(see Fig.8)

ICC quiescent supply

current 2.0

4.0 20.0

40.0 40.0

80.0 µA 6.0

10.0 VCC

GND

Vis = GND or

VCC;V

os =

VCC or GND

SYMBOL PARAMETER

Tamb (°C)

UNIT

TEST CONDITIONS

74HC VCC

(V) OTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

tPHL/ tPLH propagation

delay

Vis to Vos

ns 2.0

4.5

6.0

9.0

RL=∞;C

L= 50 pF

(see Fig.16)

tPZH/ tPZL turn “ON” time

Ento Vos

190

240

235

ns 2.0

4.5

6.0

9.0

RL=1 kΩ;C

L= 50 pF

(see Figs 17 and 18)

tPHZ/ tPLZ turn “OFF” time

Ento Vos

145

180

220

ns 2.0

4.5

6.0

9.0

RL=1 kΩ;C

L= 50 pF

(see Figs 17 and 18)

December 1990 9

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

DC CHARACTERISTICS FOR 74HCT

Voltages are referenced to GND (ground = 0 V)

Note

1. The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given here.

To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

SYMBOL PARAMETER

Tamb (°C)

UNIT

TEST CONDITIONS

74HCT VCC

(V) VIOTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

VIH HIGH level input

voltage 2.0 1.6 2.0 2.0 V 4.5

5.5

VIL LOW level input

voltage 1.2 0.8 0.8 0.8 V 4.5

5.5

±IIinput leakage

current 0.1 1.0 1.0 µA 5.5 VCC

GND

±ISanalog switch

OFF-state current

per channel

0.1 1.0 1.0 µA 5.5 VIH

VIL

VS=

VCC −GND

(see Fig.7)

±ISanalog switch

ON-state current 0.1 1.0 1.0 µA 5.5 VIH

VIL

VS=

VCC −GND

(see Fig.8)

ICC quiescent supply

current 2.0 20.0 40.0 µA 4.5

5.5

VCC

GND

Vis = GND or

VCC;V

os =

VCC or GND

∆ICC additional quiescent

supply current per

input pin for unit

load coefﬁcient is 1

(note 1)

100 360 450 490 µA 4.5

5.5

VCC

−2.1V other inputs

at VCC or

GND

INPUT UNIT LOAD COEFFICIENT

EN1.00

December 1990 10

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; tr=t

f= 6 ns; CL= 50 pF

ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT

Recommended conditions and typical values

GND = 0 V; tr=t

f= 6 ns

Notes

1. Vis is the input voltage at a Ynor Znterminal, whichever is assigned as an input.

2. Vos is the output voltage at a Ynor Znterminal, whichever is assigned as an output.

3. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω).

4. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω).

SYMBOL PARAMETER

Tamb (°C)

UNIT

TEST CONDITIONS

74HCT VCC

(V) OTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

tPHL/ tPLH propagation delay

Vis to Vos

6 12 15 18 ns 4.5 RL=∞;C

L= 50 pF

(see Fig.16)

tPZH turn “ON” time

Ento Vos

19 35 44 53 ns 4.5 RL=1 kΩ;C

L= 50 pF

(see Figs 17 and 18)

tPZL turn “ON” time

Ento Vos

20 35 44 53 ns 4.5 RL=1 kΩ;C

L= 50 pF

(see Figs 17 and 18)

tPHZ/ tPLZ turn “OFF” time

Ento Vos

23 35 44 53 ns 4.5 RL=1 kΩ;C

L= 50 pF

(see Figs 17 and 18)

SYMBOL PARAMETER typ. UNIT VCC

(V) Vis(p-p)

(V) CONDITIONS

sine-wave distortion

f = 1 kHz 0.80

0.40 %

%4.5

9.0 4.0

8.0 RL= 10 kΩ;C

L= 50 pF

(see Fig.14)

sine-wave distortion

f = 10 kHz 2.40

1.20 %

%4.5

9.0 4.0

8.0 RL= 10 kΩ;C

L= 50 pF

(see Fig.14)

switch “OFF” signal

feed-through −50

−50 dB

dB 4.5

9.0 note 3 RL= 600 Ω;C

L= 50 pF;

f = 1 MHz (see Figs 10 and 15)

crosstalk between

any two switches −60

−60 dB

dB 4.5

9.0 note 3 RL= 600 Ω;C

L= 50 pF;

f = 1 MHz (see Fig.12)

V(p-p) crosstalk voltage between

enable or address input

to any switch

(peak-to-peak value)

110

220 mV

mV 4.5

9.0 RL= 600 Ω;C

L= 50 pF;

f = 1 MHz (En, square wave

between VCC and GND,

tr=t

f= 6 ns) (see Fig.13)

fmax minimum frequency response

(−3dB) 150

160 MHz

MHz 4.5

9.0 note 4 RL=50Ω;C

L= 10 pF

(see Figs 11 and 14)

CSmaximum switch capacitance 5 pF

December 1990 11

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

Fig.10 Typical switch “OFF” signal feed-through as a function of frequency.

Test conditions:

VCC = 4.5 V; GND = 0 V;

RL=50Ω;R

source =1 kΩ.

Fig.11 Typical frequency response.

Test conditions:

VCC = 4.5 V; GND = 0 V;

RL=50Ω;R

source =1 kΩ.

December 1990 12

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

Fig.12 Test circuit for measuring crosstalk between any two switches.

(a) channel ON condition; (b) channel OFF condition.

Fig.13 Test circuit for measuring crosstalk between control and any switch.

The crosstalk is defined as follows

(oscilloscope output):

Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response.

Fig.15 Test circuit for measuring switch “OFF” signal feed-through.

December 1990 13

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

AC WAVEFORMS

Fig.16 Waveforms showing the input (Vis) to output (Vos) propagation delays.

(1) HC : VM= 50%; VI= GND to VCC.

HCT: VM= 1.3 V; VI= GND to 3 V.

Fig.17 Waveforms showing the turn-ON and turn-OFF times.

(1) HC : VM= 50%; VI= GND to VCC.

HCT: VM= 1.3 V; VI= GND to 3 V.

December 1990 14

Philips Semiconductors Product speciﬁcation

Quad bilateral switches 74HC/HCT4016

TEST CIRCUIT AND WAVEFORMS

PACKAGE OUTLINES

See

“74HC/HCT/HCU/HCMOS Logic Package Outlines”

Fig.18 Test circuit for measuring AC performance.

Conditions

TEST SWITCH Vis

tPZH

tPZL

tPHZ

tPLZ

others

GND

VCC

GND

VCC

open

VCC

GND

VCC

GND

pulse

CL= load capacitance including jig and probe capacitance

(see AC CHARACTERISTICS for values).

RT= termination resistance should be equal to the output

impedance ZOof the pulse generator.

tr=t

f= 6 ns; when measuring fmax, there is no constraint

tr,t

fwith 50% duty factor.

FAMILY AMPLITUDE VM

tr;t

max;

PULSE WIDTH OTHER

74HC

74HCT VCC

3.0 V 50%

1.3 V <2 ns

<2 ns 6 ns

6 ns

Fig.19 Input pulse definitions.

FAMILY AMPLITUDE VM

tr;t

max;

PULSE WIDTH OTHER

74HC

74HCT VCC

3.0 V 50%

1.3 V <2 ns

<2 ns 6 ns

6 ns

CL= load capacitance including jig and probe capacitance

(see AC CHARACTERISTICS for values).

RT= termination resistance should be equal to the output

impedance ZOof the pulse generator.

tr=t

f= 6 ns; when measuring fmax, there is no constraint

tr,t

fwith 50% duty factor.