SN74LV244A-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCLS695 - JANUARY 2006 FEATURES * * * * * * * * * * * * (1) Controlled Baseline - One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of -55C to 125C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) 2-V to 5.5-V VCC Operation Max tpd of 6.5 ns at 5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25C Supports Mixed-Mode Voltage Operation on All Ports Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 * ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) DW PACKAGE (TOP VIEW) 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20 2 19 3 18 4 5 17 16 6 15 7 14 8 13 12 9 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION/ORDERING INFORMATION This octal buffer/line driver is designed for 2-V to 5.5-V VCC operation. The SN74LV244A-EP is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. ORDERING INFORMATION PACKAGE (1) TA -55C to 125C (1) SOIC - DW Reel of 2000 ORDERABLE PART NUMBER SN74LV244AMDWREP TOP-SIDE MARKING LV244AMEP Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2006, Texas Instruments Incorporated SN74LV244A-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCLS695 - JANUARY 2006 FUNCTION TABLE (EACH BUFFER) INPUTS OE A OUTPUT Y L H H L L L H X Z LOGIC DIAGRAM (POSITIVE LOGIC) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range -0.5 7 V VI Input voltage range (2) -0.5 7 V -0.5 7 V -0.5 VCC + 0.5 state (2) UNIT VO Voltage range applied to any output in the high-impedance or power-off VO Output voltage range applied in the high or low state (2) (3) IIK Input clamp current VI < 0 -20 mA IOK Output clamp current VO < 0 -50 mA IO Continuous output current VO = 0 to VCC 35 mA 70 mA 58 C/W 150 C Continuous current through VCC or GND JA Package thermal Tstg Storage temperature range (1) (2) (3) (4) 2 impedance (4) -65 V Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 5.5 V maximum. The package thermal impedance is calculated in accordance with JESD 51-7. SN74LV244A-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCLS695 - JANUARY 2006 Recommended Operating Conditions VCC (1) Supply voltage VCC = 2 V VIH High-level input voltage MIN MAX 2 5.5 Low-level input voltage VI Input voltage VO Output voltage VCC = 2.3 V to 2.7 V VCC x 0.7 VCC = 3 V to 3.6 V VCC x 0.7 VCC = 4.5 V to 5.5 V VCC x 0.7 VCC = 2.3 V to 2.7 V VCC x 0.3 VCC = 3 V to 3.6 V VCC x 0.3 5.5 High or low state 0 VCC 3-state 0 5.5 VCC = 2.3 V to 2.7 V t/v Input transition rise or fall rate (1) Operating free-air temperature A -8 mA -16 A 50 VCC = 2.3 V to 2.7 V 2 VCC = 3 V to 3.6 V 8 VCC = 4.5 V to 5.5 V 16 VCC = 2.3 V to 2.7 V 200 VCC = 3 V to 3.6 V 100 VCC = 4.5 V to 5.5 V TA V -2 VCC = 3 V to 3.6 V VCC = 2 V Low-level output current V -50 VCC = 4.5 V to 5.5 V IOL V VCC x 0.3 0 VCC = 2 V High-level output current V 0.5 VCC = 4.5 V to 5.5 V IOH V 1.5 VCC = 2 V VIL UNIT mA ns/V 20 -55 125 C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 3 SN74LV244A-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCLS695 - JANUARY 2006 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH TEST CONDITIONS VCC 2 V to 5.5 V IOH = -2 mA 2.3 V IOH = -8 mA 3V 2.48 4.5 V 3.8 IOH = -16 mA VOL MIN IOH = -50 A TYP MAX UNIT VCC - 0.1 2 V IOL = 50 A 2 V to 5.5 V IOL = 2 mA 2.3 V 0.4 IOL = 8 mA 3V 0.44 IOL = 16 mA 4.5 V 0.55 0.1 V II VI = 5.5 V or GND 0 to 5.5 V 1 A IOZ VO = VCC or GND 5.5 V 5 A ICC VI = VCC or GND, IO = 0 5.5 V 20 A Ioff VI or VO = 0 to 5.5 V 0 5 A Ci VI = VCC or GND 3.3 V 2.3 pF Switching Characteristics over recommended operating free-air temperature range, VCC = 2.5 V 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tpd A Y ten OE Y tdis OE Y LOAD CAPACITANCE TA = 25C MIN CL = 50 pF MIN MAX 15.3 1 18 ns 10.8 17.8 1 21 ns 13.4 19.2 1 21 ns 2 ns TYP MAX 9.5 tsk(o) 2 UNIT Switching Characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tpd A ten OE tdis OE Y PARAMETER tsk(o) 4 LOAD CAPACITANCE TA = 25C MIN MAX UNIT 11.9 1 13.5 ns 14.1 1 16 ns 16 1 18 ns 1.5 ns TYP MAX Y 6.8 Y 7.8 CL = 50 pF MIN 11 1.5 SN74LV244A-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCLS695 - JANUARY 2006 Switching Characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tpd A Y ten OE Y tdis OE Y LOAD CAPACITANCE CL = 50 pF TA = 25C MIN MIN MAX 7.5 1 8.5 ns 5.6 9.3 1 10.5 ns 8.8 14.2 1 15.5 ns 1 ns TYP MAX 4.9 tsk(o) 1 UNIT Noise Characteristics (1) VCC = 3.3 V, CL = 50 pF, TA = 25C PARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.55 V VOL(V) Quiet output, minimum dynamic VOL -0.5 V VOH(V) Quiet output, minimum dynamic VOH 2.9 V VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage (1) 2.31 V 0.99 V TYP UNIT Characteristics are for surface-mount packages only. Operating Characteristics TA = 25C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS CL = 50 pF, f = 10 MHz VCC 3.3 V 14 5V 16 pF 5 SN74LV244A-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCLS695 - JANUARY 2006 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test Test Point RL = 1 k From Output Under Test CL (see Note A) S1 Open TEST GND CL (see Note A) LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS VCC 50% VCC Timing Input tw tsu VCC 50% VCC Input 50% VCC 0V th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC 50% VCC Input tPLH 0V tPHL VOH In-Phase Output 50% VCC tPHL Out-of-Phase Output 50% VCC 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 50% VCC 0V tPZL tPLZ VCC 50% VCC tPZH tPLH 50% VCC VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuits and Voltage Waveforms 6 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LV244AMDWREP ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/06604-01XE ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF SN74LV244A-EP : * Catalog: SN74LV244A NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LV244AMDWREP Package Package Pins Type Drawing SOIC DW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.8 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.0 2.7 12.0 24.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV244AMDWREP SOIC DW 20 2000 367.0 367.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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