1
FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
VCC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
VCC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
VCC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
VCC
4A1
4A2
GND
4A3
4A4
3OE
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and
SN74LVC16244A
www.ti.com
....................................................................................................................................................... SCAS699B – AUGUST 2003 – REVISED APRIL 2009
16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
2
•Member of the Texas Instruments Widebus™Family
•Operates From 1.65 V to 3.6 V•Inputs Accept Voltages to 5.5 V•Max t
pd
of 4.1 ns at 3.3 V•Typical V
OLP
(Output Ground Bounce) < 0.8 Vat V
CC
= 3.3 V, T
A
= 25 ° C•Typical V
OHV
(Output V
OH
Undershoot) >2 Vat V
CC
= 3.3 V, T
A
= 25 ° C•I
off
Supports Partial-Power-Down ModeOperation
•Supports Mixed-Mode Signal Operation on AllPorts (5-V Input/Output Voltage With3.3-V V
CC
)•Latch-Up Performance Exceeds 250 mA PerJESD 17•ESD Protection Exceeds JESD 22– 2000-V Human-Body Model (A114-A)– 1000-V Charged-Device Model (C101)
This 16-bit buffer/driver is designed for 1.65-V to3.6-V V
CC
operation.
The SN74LVC16244A is designed specifically toimprove the performance and density of 3-statememory address drivers, clock drivers, andbus-oriented receivers and transmitters.
symmetrical active-low output-enable ( OE) inputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator ina mixed 3.3-V/5-V system environment.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Widebus, MicroStar are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003 – 2009, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
GQL OR ZQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
K
abc
SN74LVC16244A
SCAS699B – AUGUST 2003 – REVISED APRIL 2009 .......................................................................................................................................................
www.ti.com
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
MicroStar™ Junior BGA – ZQL Tape and reel SN74LVC16244AZQLR LD244AFBGA – GRD SN74LVC16244AGRDR
Tape and reel LD244AFBGA – ZRD (Pb-free) SN74LVC16244AZRDR
Tube SN74LVC16244ADLSSOP – DL LVC16244ATape and reel SN74LVC16244ADLR– 40 ° C to 85 ° C
SN74LVC16244ADGGRTSSOP – DGG Tape and reel LVC16244A74LVC16244ADGGRG4
SN74LVC16244ADGVRTVSOP – DGV Tape and reel LD244A74LVC16244ADGVRE4VFBGA – GQL Tape and reel SN74LVC16244AGQLR LD244A
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
TERMINAL ASSIGNMENTS
(1)
(56-Ball GQL/ZQL Package)
123456
A1 OE NC NC NC NC 2 OE
B1Y2 1Y1 GND GND 1A1 1A2
C1Y4 1Y3 V
CC
V
CC
1A3 1A4
D2Y2 2Y1 GND GND 2A1 2A2
E2Y4 2Y3 2A3 2A4
F3Y1 3Y2 3A2 3A1
G3Y3 3Y4 GND GND 3A4 3A3
H4Y1 4Y2 V
CC
V
CC
4A2 4A1
J4Y3 4Y4 GND GND 4A4 4A3
K4 OE NC NC NC NC 3 OE
abc (1) NC – No internal connection
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Product Folder Link(s): SN74LVC16244A
GRD OR ZRD PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
abc
SN74LVC16244A
www.ti.com
....................................................................................................................................................... SCAS699B – AUGUST 2003 – REVISED APRIL 2009
TERMINAL ASSIGNMENTS
(1)
(54-Ball GRD/ZRD Package)
123456
A1Y1 NC 1 OE 2 OE NC 1A1
B1Y3 1Y2 NC NC 1A2 1A3
C2Y1 1Y4 V
CC
V
CC
1A4 2A1
D2Y3 2Y2 GND GND 2A2 2A3
E3Y1 2Y4 GND GND 2A4 3A1
F3Y3 3Y2 GND GND 3A2 3A3
G4Y1 3Y4 V
CC
V
CC
3A4 4A1
H4Y3 4Y2 NC NC 4A2 4A3
J4Y4 NC 4 OE 3 OE NC 4A4
(1) NC – No internal connection
abc
FUNCTION TABLE(EACH 4-BIT BUFFER)
INPUTS
OUTPUT
YOE A
L H HL L LH X Z
Copyright © 2003 – 2009, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): SN74LVC16244A
1OE
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
1
47
46
44
43
2
3
5
6
2OE
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
48
41
40
38
37
8
9
11
12
3OE
3A1
3A2
3A3
3A4
3Y1
3Y2
3Y3
3Y4
25
36
35
33
32
13
14
16
17
4OE
4A1
4A2
4A3
4A4
4Y1
4Y2
4Y3
4Y4
24
30
29
27
26
19
20
22
23
Pin numbers shown are for the DGG, DGV, and DL packages.
ABSOLUTE MAXIMUM RATINGS
(1)
SN74LVC16244A
SCAS699B – AUGUST 2003 – REVISED APRIL 2009 .......................................................................................................................................................
www.ti.com
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range – 0.5 6.5 VV
I
Input voltage range
(2)
– 0.5 6.5 VV
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
– 0.5 6.5 VV
O
Voltage range applied to any output in the high or low state
(2) (3)
– 0.5 V
CC
+ 0.5 VI
IK
Input clamp current V
I
< 0 – 50 mAI
OK
Output clamp current V
O
< 0 – 50 mAI
O
Continuous output current ± 50 mAContinuous current through each V
CC
or GND ± 100 mADGG package 70DGV package 58θ
JA
Package thermal impedance
(4)
DL package 63 ° C/WGQL package 42GRD/ZRD package 36T
stg
Storage temperature range – 65 150 ° C
(1) Stresses beyond those listed under " absolute maximum ratings " may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under " recommended operatingconditions " is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.(3) ' The value of V
CC
is provided in the recommended operating conditions table.(4) The package thermal impedance is calculated in accordance with JESD 51-7.
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Product Folder Link(s): SN74LVC16244A
RECOMMENDED OPERATING CONDITIONS
(1)
SN74LVC16244A
www.ti.com
....................................................................................................................................................... SCAS699B – AUGUST 2003 – REVISED APRIL 2009
MIN MAX UNIT
Operating 1.65 3.6V
CC
Supply voltage VData retention only 1.5V
CC
= 1.65 V to 1.95 V 0.65 × V
CC
V
IH
High-level input voltage V
CC
= 2.3 V to 2.7 V 1.7 VV
CC
= 2.7 V to 3.6 V 2V
CC
= 1.65 V to 1.95 V 0.35 × V
CC
V
IL
Low-level input voltage V
CC
= 2.3 V to 2.7 V 0.7 VV
CC
= 2.7 V to 3.6 V 0.8V
I
Input voltage 0 5.5 VHigh or low state 0 V
CCV
O
Output voltage V3-state 0 5.5V
CC
= 1.65 V – 4V
CC
= 2.3 V – 8I
OH
High-level output current mAV
CC
= 2.7 V – 12V
CC
= 3 V – 24V
CC
= 1.65 V 4V
CC
= 2.3 V 8I
OL
Low-level output current mAV
CC
= 2.7 V 12V
CC
= 3 V 24
Δt/ Δv Input transition rise or fall rate 10 ns/VT
A
Operating free-air temperature – 40 85 ° C
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Copyright © 2003 – 2009, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): SN74LVC16244A
ELECTRICAL CHARACTERISTICS
SWITCHING CHARACTERISTICS
OPERATING CHARACTERISTICS
SN74LVC16244A
SCAS699B – AUGUST 2003 – REVISED APRIL 2009 .......................................................................................................................................................
www.ti.com
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP
(1)
MAX UNIT
I
OH
= – 100 µA 1.65 V to 3.6 V V
CC
– 0.2I
OH
= – 4 mA 1.65 V 1.2I
OH
= – 8 mA 2.3 V 1.7V
OH
V2.7 V 2.2I
OH
= – 12 mA
3 V 2.4I
OH
= – 24 mA 3 V 2.2I
OL
= 100 µA 1.65 V to 3.6 V 0.2I
OL
= 4 mA 1.65 V 0.45V
OL
I
OL
= 8 mA 2.3 V 0.7 VI
OL
= 12 mA 2.7 V 0.4I
OL
= 24 mA 3 V 0.55I
I
V
I
= 0 to 5.5 V 3.6 V ± 5 µAI
off
V
I
or V
O
= 5.5 V 0 ± 10 µAI
OZ
V
O
= 0 to 5.5 V 3.6 V ± 10 µAV
I
= V
CC
or GND 20I
CC
I
O
= 0 3.6 V µA3.6 V ≤V
I
≤5.5 V
(2)
20
ΔI
CC
One input at V
CC
– 0.6 V, Other inputs at V
CC
or GND 2.7 V to 3.6 V 500 µAC
i
V
I
= V
CC
or GND 3.3 V 5.5 pFC
o
V
O
= V
CC
or GND 3.3 V 6 pF
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25 ° C.(2) This applies in the disabled state only.
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 VV
CC
= 2.7 VFROM TO
± 0.15 V ± 0.2 V ± 0.3 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
t
pd
A Y 1.5 6.6 1 3.9 1 4.7 1.1 4.1 nst
en
OE Y 1.5 7.5 1 4.7 1 5.8 1 4.6 nst
dis
OE Y 1.5 10.3 1 5.3 1 6.2 1.8 5.8 nst
sk(o)
1 ns
T
A
= 25 ° C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 VTESTPARAMETER UNITCONDITIONS
TYP TYP TYP
Outputs enabled 33 35 39Power dissipation capacitanceC
pd
f = 10 MHz pFper buffer/driver
Outputs disabled 2 3 4
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Product Folder Link(s): SN74LVC16244A
PARAMETER MEASUREMENT INFORMATION
th
VM
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 VLOAD
Open
GND
RL
RL
Data Input
Timing Input VI
0 V
VI
0 V
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V∆
VOH − V∆≈0 V
VI
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VMVM
VMVM
VMVM
VM
VMVM
VM
VM
VM
VI
VM
VM
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
1 kΩ
500 Ω
500 Ω
500 Ω
VCC RL
2 × VCC
2 × VCC
6 V
6 V
VLOAD CL
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V∆
VCC
VCC
2.7 V
2.7 V
VI
VCC/2
VCC/2
1.5 V
1.5 V
VM
tr/tf
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
INPUTS
tsu
SN74LVC16244A
www.ti.com
....................................................................................................................................................... SCAS699B – AUGUST 2003 – REVISED APRIL 2009
Figure 1. Load Circuit and Voltage Waveforms
Copyright © 2003 – 2009, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): SN74LVC16244A
PACKAGE OPTION ADDENDUM
www.ti.com 3-May-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
74LVC16244ADGGG4 ACTIVE TSSOP DGG 48 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74LVC16244ADGGRG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74LVC16244ADGVRE4 ACTIVE TVSOP DGV 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74LVC16244ADGVRG4 ACTIVE TVSOP DGV 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244ADGG ACTIVE TSSOP DGG 48 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244ADGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244ADGVR ACTIVE TVSOP DGV 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244ADL ACTIVE SSOP DL 48 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244ADLG4 ACTIVE SSOP DL 48 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244ADLR ACTIVE SSOP DL 48 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244ADLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC16244AGQLR LIFEBUY BGA
MICROSTAR
JUNIOR
GQL 56 1000 TBD SNPB Level-1-240C-UNLIM
SN74LVC16244AGRDR LIFEBUY BGA
MICROSTAR
JUNIOR
GRD 54 1000 TBD SNPB Level-1-240C-UNLIM
SN74LVC16244AZQLR ACTIVE BGA
MICROSTAR
JUNIOR
ZQL 56 1000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
SN74LVC16244AZRDR ACTIVE BGA
MICROSTAR
JUNIOR
ZRD 54 1000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 3-May-2012
Addendum-Page 2
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC16244A :
•Automotive: SN74LVC16244A-Q1
•Enhanced Product: SN74LVC16244A-EP
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LVC16244ADGGR TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1
SN74LVC16244ADGVR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1
SN74LVC16244ADLR SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1
SN74LVC16244AGQLR BGA MI
CROSTA
R JUNI
OR
GQL 56 1000 330.0 16.4 4.8 7.3 1.45 8.0 16.0 Q1
SN74LVC16244AGRDR BGA MI
CROSTA
R JUNI
OR
GRD 54 1000 330.0 16.4 5.8 8.3 1.55 8.0 16.0 Q1
SN74LVC16244AZQLR BGA MI
CROSTA
R JUNI
OR
ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1
SN74LVC16244AZRDR BGA MI
CROSTA
R JUNI
OR
ZRD 54 1000 330.0 16.4 5.8 8.3 1.55 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVC16244ADGGR TSSOP DGG 48 2000 367.0 367.0 45.0
SN74LVC16244ADGVR TVSOP DGV 48 2000 367.0 367.0 38.0
SN74LVC16244ADLR SSOP DL 48 1000 367.0 367.0 55.0
SN74LVC16244AGQLR BGA MICROSTAR
JUNIOR GQL 56 1000 333.2 345.9 28.6
SN74LVC16244AGRDR BGA MICROSTAR
JUNIOR GRD 54 1000 333.2 345.9 28.6
SN74LVC16244AZQLR BGA MICROSTAR
JUNIOR ZQL 56 1000 333.2 345.9 28.6
SN74LVC16244AZRDR BGA MICROSTAR
JUNIOR ZRD 54 1000 333.2 345.9 28.6
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040048/E 12/01
48 PINS SHOWN
56
0.730
(18,54)
0.720
(18,29)
4828
0.370
(9,40)
(9,65)
0.380
Gage Plane
DIM
0.420 (10,67)
0.395 (10,03)
A MIN
A MAX
0.010 (0,25)
PINS **
0.630
(16,00)
(15,75)
0.620
0.010 (0,25)
Seating Plane
0.020 (0,51)
0.040 (1,02)
25
24
0.008 (0,203)
0.0135 (0,343)
48
1
0.008 (0,20) MIN
A
0.110 (2,79) MAX
0.299 (7,59)
0.291 (7,39)
0.004 (0,10)
M
0.005 (0,13)
0.025 (0,635)
0°–ā8°
0.005 (0,13)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUAR Y 1998
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040078/F 12/97
48 PINS SHOWN
0,25
0,15 NOM
Gage Plane
6,00
6,20 8,30
7,90
0,75
0,50
Seating Plane
25
0,27
0,17
24
A
48
1
1,20 MAX
M
0,08
0,10
0,50
0°–8°
56
14,10
13,90
48
DIM
A MAX
A MIN
PINS **
12,40
12,60
64
17,10
16,90
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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