LM193AH/883 - Texas Instruments High-Performance Analog

LM193A, LM193QML

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SNOSAM2C –MAY 2005–REVISED MARCH 2013

LM193A/LM193QML Low Power Low Offset Voltage Dual Comparators

Check for Samples: LM193A,LM193QML

1FEATURES DESCRIPTION

The LM193 series consists of two independent

2• Available with Radiation Guarantee precision voltage comparators with an offset voltage

– Total Ionizing Dose 100 krad(Si) specification as low as 2.0 mV max for two

– ELDRS Free 100 krad(Si) comparators which were designed specifically to

operate from a single power supply over a wide range

• Wide Supply of voltages. Operation from split power supplies is

– Voltage Range: 2.0VDC to 36VDC also possible and the low power supply current drain

– Single or Dual Supplies: ±1.0V to ±18V is independent of the magnitude of the power supply

voltage. These comparators also have a unique

• Very Low Supply Current Drain (0.4 mA) — characteristic in that the input common-mode voltage

Independent of Supply Voltage range includes ground, even though operated from a

• Low Input Biasing Current: 25 nA typ single power supply voltage.

• Low Input Offset Current: ±5 nA typ Application areas include limit comparators, simple

• Input Common-Mode Voltage Range Includes analog to digital converters; pulse, squarewave and

Ground time delay generators; wide range VCO; MOS clock

• Differential Input Voltage Range Equal to the timers; multivibrators and high voltage digital logic

gates. The LM193 series was designed to directly

Power Supply Voltage interface with TTL and CMOS. When operated from

• Low Output Saturation Voltage,: 250 mV at 4 both plus and minus power supplies, the LM193

mA typ series will directly interface with MOS logic where

• Output Voltage Compatible with TTL, DTL, their low power drain is a distinct advantage over

ECL, MOS and CMOS Logic Systems standard comparators.

ADVANTAGES

• High Precision Comparators

• Reduced VOS Drift Over Temperature

• Eliminates Need for Dual Supplies

• Allows Sensing Near Ground

• Compatible with All Forms of Logic

• Power Drain Suitable for Battery Operation

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LM193A, LM193QML

SNOSAM2C –MAY 2005–REVISED MARCH 2013

www.ti.com

Schematic and Connection Diagrams

Figure 1. TO-99 Package

See Package Number LMC

Figure 2. CDIP Package

See Package Number NAB0008A

Product Folder Links: LM193A LM193QML

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SNOSAM2C –MAY 2005–REVISED MARCH 2013

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings(1)

Supply Voltage, V+36VDC or ±18VDC

Differential Input Voltage(2) 36V

Input Voltage −0.3VDC to +36VDC

Input Current (VIN<−0.3VDC)(3) 50 mA

Maximum Junction Temperature 150°C

Power Dissipation(4)(5) TO-99 660 mW

CDIP 780 mW

Output Short-Circuit to Ground(6) Continuous

Operating Temperature Range −55°C ≤TA≤+125°C

Storage Temperature Range −65°C ≤TA≤+150°C

Thermal Resistance θJA TO-99 (Still Air) 174°C/W

TO-99 (500LF/Min Air flow) 99°C/W

CDIP (Still Air) 146°C/W

CDIP (500LF/Min Air flow) 85°C/W

θJC TO-99 44°C/W

CDIP 33°C/W

Lead Temperature (Soldering, 10 seconds) 260°C

ESD Tolerance(7) 500V

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the

Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may

degrade when the device is not operated under the listed test conditions.

(2) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode

range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3V (or 0.3V below the

magnitude of the negative power supply, if used).

(3) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of

the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is

also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go

to the V+voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive

and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3VDC.

(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature),

θJA (package junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any

temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower.

(5) The LM193A must be derated based on a 150°C, TJmax. The low bias dissipation and the ON-OFF characteristic of the outputs keep the

chip dissipation very small (PD≤100mV), provided the output transistors are allowed to saturate.

(6) Short circuits from the output to V+can cause excessive heating and eventual destruction. When considering short circuits to ground,

the maximum output current is approximately 20 mA independent of the magnitude of V+.

(7) Human body model, 1.5KΩin series with 100pF.

Quality Conformance Inspection

Mil-Std-883, Method 5005 - Group A

Subgroup Description Temp°C

1 Static tests at 25

2 Static tests at 125

3 Static tests at -55

4 Dynamic tests at 25

5 Dynamic tests at 125

6 Dynamic tests at -55

7 Functional tests at 25

8A Functional tests at 125

8B Functional tests at -55

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Quality Conformance Inspection (continued)

Mil-Std-883, Method 5005 - Group A

Subgroup Description Temp°C

9 Switching tests at 25

10 Switching tests at 125

11 Switching tests at -55

12 Settling time at 25

13 Settling time at 125

14 Settling time at -55

LM193 Electrical Characteristics DC Parameters

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

ICC Supply Current 1.0 mA 1, 2, 3

+V = 36V 2.5 mA 1, 2, 3

ICEX Output Leakage Current +V = 30V, +VI= 1V, -0.65 0.65 µA 1

VO= 30V, -VI= 0V -1.0 1.0 µA 2, 3

ISink Output Sink Current VO= 1.5V, -VI= 1V, 6.0 mA 1

+VI= 0V

VSat Output Saturation Voltage ISink = 4mA, -VI= 1V, 0.4 V 1

+VI= 0V 0.7 V 2, 3

VIO Input Offset Voltage -5.0 5.0 mV 1

-9.0 9.0 mV 2, 3

+V = 30V -5.0 5.0 mV 1

-9.0 9.0 mV 2, 3

+V = 30V, VCM = 28.5V -5.0 5.0 mV 1

+V = 30V, VCM = 28.0V -9.0 9.0 mV 2, 3

±IIB Input Bias Current -100 -1.0 nA 1

-300 -1.0 nA 2, 3

IIO Input offset Current RS= 50Ω-25 25 nA 1

-100 100 nA 2, 3

VCM Common Mode Voltage +V = 30V See(1) 28.5 V 1

See(1) 28 V 2, 3

PSRR Power Supply Rejection Ratio +V = 5V to 30V, 60 dB 1

RS= 50Ω

CMRR Common Mode Rejection Ratio +V = 30V, RS= 50Ω60 dB 1

VCM = 0V to 28.5V,

VDiff Differential Input Voltage +V = 30V, +VI= 36V, See(2) 500 nA 1, 2, 3

-VI= 0V

+V = 30V, +VI= 0V, See(2) 500 nA 1, 2, 3

-VI= +36V

AVS Voltage Gain +V = 15V, RPullUp = 15KΩSee(3) 50 V/mV 4

1V ≤VO≤11V,

(1) Parameter specified by the VIO tests.

(2) The value for VDiff is not datalogged during Read and Record.

(3) Datalog reading in K = V/mV.

Product Folder Links: LM193A LM193QML

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SNOSAM2C –MAY 2005–REVISED MARCH 2013

LM193 Electrical Characteristics AC Parameters

The following conditions apply, unless otherwise specified. +V = 5V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

tRLH Response Time VOD = 5mV 5.0 µS 9

VOD = 50mV 0.8 µS 9

tRHL Response Time VOD = 5mV 2.5 µS 9

VOD = 50mV 0.8 µS 9

LM193A Electrical Characteristics DC Parameters

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

ICC Supply Current RL= Infinity 1.0 mA 1, 2, 3

+V = 36V, RL= Infinity 2.5 mA 1, 2, 3

ICEX Output Leakage Current +V = 30V, +VI= 1V, -0.65 0.65 µA 1

VO= 30, -VI= 0 -1.0 1.0 µA 2, 3

ISink Output Sink Current VO= 1.5V, -VI= 1V, 6.0 mA 1

+VI= 0V 4.0 mA 2, 3

VSat Output Saturation Voltage ISink = 4mA, 0.4 V 1

-VI= 1V, +VI= 0V 0.7 V 2, 3

VIO Input Offset Voltage -2.0 2.0 mV 1

-4.0 4.0 mV 2, 3

+V = 30V -2.0 2.0 mV 1

-4.0 4.0 mV 2, 3

+V = 30V, VCM = 28.5V -2.0 2.0 mV 1

+V = 30V, VCM = 28.0V -4.0 4.0 mV 2, 3

±IIB Input Bias Current VO= 1.5V -100 -1.0 nA 1

-300 -1.0 nA 2, 3

IIO Input offset Current RS= 50Ω, VO= 1.5V -25 25 nA 1

-100 100 nA 2, 3

VCM Common Mode Voltage +V = 30V See(1) 28.5 V 1

See(1) 28 V 2, 3

PSRR Power Supply Rejection Ratio +V = 5V to 30V, 60 dB 1

RS= 50Ω

CMRR Common Mode Rejection Ratio +V = 30V, RS= 50Ω60 dB 1

VCM = 0V to 28.5V,

VDiff Differential Input Voltage +V = 30V, +VI= 36V, -VI= 0V See(2) 500 nA 1, 2, 3

+V = 30V, +VI= 0V, -VI= +36V See(2) 500 nA 1, 2, 3

AVS Voltage Gain +V = 15V, RPullUp = 15KΩSee(3) 50 V/mV 4

1V ≤VO≤11V, See(3) 25 V/mV 5, 6

(1) Parameter specified by the VIO tests.

(2) The value for VDiff is not datalogged during Read and Record.

(3) Datalog reading in K = V/mV.

Product Folder Links: LM193A LM193QML

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LM193A Electrical Characteristics AC Parameters

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

tRLH Response Time VOD = 5mV 5.0 µS 9

VOD = 50mV 0.8 µS 9

tRHL Response Time VOD = 5mV 2.5 µS 9

VOD = 50mV 0.8 µS 9

LM193A Electrical Characteristics DC Drift Parameters

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Delta calculations performed on QMLV devices at Group B, Subgroup 5 only

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

VIO Input Offset Voltage +V = 30V -1.0 1.0 mV 1

±IIB Input Bias Current -15 15 nA 1

LM193A - 100K Radiation Electrical Characteristics DC Parameters(1)(2)

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

ICC Supply Current RL= Infinity 1.0 mA 1, 2, 3

+V = 36V, RL= Infinity 2.5 mA 1, 2, 3

ICEX Output Leakage Current +V = 30V, +VI= 1V, -0.65 0.65 µA 1

VO= 30, -VI= 0 -1.0 1.0 µA 2, 3

ISink Output Sink Current VO= 1.5V, -VI= 1V, 6.0 mA 1

+VI= 0V 4.0 mA 2, 3

VSat Output Saturation Voltage ISink = 4mA, 0.4 V 1

-VI= 1V, +VI= 0V 0.7 V 2, 3

VIO Input Offset Voltage -2.0 2.0 mV 1

-4.0 4.0 mV 2, 3

+V = 30V -2.0 2.0 mV 1

-4.0 4.0 mV 2, 3

+V = 30V, VCM = 28.5V -2.0 2.0 mV 1

+V = 30V, VCM = 28.0V -4.0 4.0 mV 2, 3

±IIB Input Bias Current VO= 1.5V -100 -1.0 nA 1

-300 -1.0 nA 2, 3

IIO Input offset Current RS= 50Ω, VO= 1.5V -25 25 nA 1

-100 100 nA 2, 3

VCM Common Mode Voltage +V = 30V See(3) 28.5 V 1

See(3) 28 V 2, 3

PSRR Power Supply Rejection Ratio +V = 5V to 30V, 60 dB 1

RS= 50Ω

CMRR Common Mode Rejection Ratio +V = 30V, RS= 50Ω60 dB 1

VCM = 0V to 28.5V,

(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post

Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.

Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019

(2) Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no

enhanced low dose rate sensitivity (ELDRS) effect.

(3) Parameter specified by the VIO tests.

Product Folder Links: LM193A LM193QML

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LM193A - 100K Radiation Electrical Characteristics DC Parameters(1)(2) (continued)

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

VDiff Differential Input Voltage +V = 30V, +VI= 36V, -VI= 0V See(4) 500 nA 1, 2, 3

+V = 30V, +VI= 0V, -VI= +36V See(4) 500 nA 1, 2, 3

AVS Voltage Gain +V = 15V, RPullUp = 15KΩSee(3) 50 V/mV 4

1V ≤VO≤11V, See(5) 25 V/mV 5, 6

(4) The value for VDiff is not datalogged during Read and Record.

(5) Datalog reading in K = V/mV.

LM193A - 100K Radiation Electrical Characteristics AC Parameters(1)(2)

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

tRLH Response Time VOD = 5mV 5.0 µS 9

VOD = 50mV 0.8 µS 9

tRHL Response Time VOD = 5mV 2.5 µS 9

VOD = 50mV 0.8 µS 9

(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post

Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.

Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019

(2) Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no

enhanced low dose rate sensitivity (ELDRS) effect.

LM193A - 100K Radiation Electrical Characteristics (Continued) DC Drift Parameters(1)(2)

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Delta calculations performed on QMLV devices at Group B, Subgroup 5 only

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

VIO Input Offset Voltage +V = 30V -1.0 1.0 mV 1

±IIB Input Bias Current -15 15 nA 1

(1) Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no

enhanced low dose rate sensitivity (ELDRS) effect.

(2) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post

Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.

Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019

LM193A - 100K Radiation Electrical Characteristics (Continued) AC Parameters - Post Radiation

Limits @ +25°C(1)(2)

The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V

Symbol Parameter Conditions Sub-

Notes Min Max Unit groups

tRLH Response Time VOD = 50mV 1.0 µS 9

(1) Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post

Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.

Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019

(2) Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no

enhanced low dose rate sensitivity (ELDRS) effect.

Product Folder Links: LM193A LM193QML

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Typical Performance Characteristics

Supply Current Input Current

Figure 3. Figure 4.

Response Time for Various Input Overdrives—Negative

Output Saturation Voltage Transition

Figure 5. Figure 6.

Response Time for Various Input Overdrives—Positive Transition

Figure 7.

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APPLICATION HINTS

The LM193 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the

output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only

during the output voltage transition intervals as the comparator change states. Power supply bypassing is not

required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling.

Reducing the input resistors to < 10 KΩreduces the feedback signal levels and finally, adding even a small

amount (1.0 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to

stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-

output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse

waveform, with relatively fast rise and fall times, hysteresis is not required.

All input pins of any unused comparators should be tied to the negative supply.

The bias network of the LM193 series establishes a drain current which is independent of the magnitude of the

power supply voltage over the range of from 2.0 VDC to 30 VDC.

It is usually unnecessary to use a bypass capacitor across the power supply line.

The differential input voltage may be larger than V+without damaging the device (see following note).

NOTE

Positive excursions of input voltage may exceed the power supply level. As long as the

other voltage remains within the common-mode range, the comparator will provide a

proper output state. The low input voltage state must not be less than −0.3V (or 0.3V

below the magnitude of the negative power supply, if used).

Protection should be provided to prevent the input voltages from going negative more than −0.3 VDC (at 25°C).

An input clamp diode can be used as shown in the applications section.

The output of the LM193 series is the uncommitted collector of a grounded-emitter NPN output transistor. Many

collectors can be tied together to provide an output OR'ing function. An output pull-up resistor can be connected

to any available power supply voltage within the permitted supply voltage range and there is no restriction on this

voltage due to the magnitude of the voltage which is applied to the V+terminal of the LM193 package. The

output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of

current which the output device can sink is limited by the drive available (which is independent of V+) and the β

of this device. When the maximum current limit is reached (approximately 16mA), the output transistor will come

out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the

approximately 60ΩrSAT of the output transistor. The low offset voltage of the output transistor (1.0mV) allows the

output to clamp essentially to ground level for small load currents.

Product Folder Links: LM193A LM193QML

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Typical Applications

(V+=5.0 VDC)Basic Comparator Driving CMOS Driving TTL

Squarewave Oscillator Pulse Generator Crystal Controlled Oscillator

* For large ratios of R1/R2,

D1 can be omitted.

Figure 8. Two-Decade High Frequency VCO

V* = +30 VDC

+250 mVDC ≤VC≤+50 VDC

700Hz ≤fo≤100kHz

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Basic Comparator Non-Inverting Comparator with Hysteresis

Inverting Comparator with Hysteresis Output Strobing

AND Gate OR Gate

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Large Fan-in AND Gate Limit Comparator

Comparing Input Voltages of Opposite Polarity ORing the Outputs

Zero Crossing Detector (Single Power Supply) One-Shot Multivibrator

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SNOSAM2C –MAY 2005–REVISED MARCH 2013

Bi-Stable Multivibrator One-Shot Multivibrator with Input Lock Out

Zero Crossing Detector Comparator With a Negative Reference

Figure 9. Time Delay Generator

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Split-Supply Applications

(V+=+15 VDC and V−=−15 VDC)

Figure 10. MOS Clock Driver

Product Folder Links: LM193A LM193QML

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SNOSAM2C –MAY 2005–REVISED MARCH 2013

Table 1. Revision History

Date Released Revision Section Originator Changes

05/09/05 A New Release. Corporate format L. Lytle 2 MDS datasheets converted into one Corp.

datasheet format. MNLM193A-X Rev 1B3 &

MNLM193–X Rev 0E1. The Iout Vsat condition

for LM193 was changed to Isink for consistency

with the LM193A and JAN electrical conditions.

Also, redundant parameters were removed

from conditions that were defined at beginning

of the table. MDS data sheets will be archived.

05/07/07 B Features, Ordering Information, LM193A Larry McGee Added Radiation Electrical information for

Electricals LM193A Device. Revision A will be archived.

10/29/07 C Features, Ordering Information, Notes Larry McGee Added reference to New ELDS NSID and SMD

Device 03, ELDRS Note 12. Revision B will be

archived.

03/20/13 C All Changed layout of National Data Sheet to TI

format

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PACKAGE OPTION ADDENDUM

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Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Top-Side Markings

(4)

Samples

5962-9452602MGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AH/883

5962-9452602MGA Q

ACO

5962-9452602MGA Q

5962-9452602MPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ/883

5962-94526

02MPA Q ACO

02MPA Q >T

5962-9452602VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ-QMLV

5962-94526

02VPA Q ACO

02VPA Q >T

5962R9452602VGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRQMLV

5962R9452602VGA Q

ACO

5962R9452602VGA Q

5962R9452602VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRQMLV

5962R94526

02VPA Q ACO

02VPA Q >T

5962R9452603VGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRLQMLV

5962R9452603VGA Q

ACO

5962R9452603VGA Q

5962R9452603VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRLV

5962R94526

03VPA Q ACO

03VPA Q >T

LM193AH/883 ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AH/883

5962-9452602MGA Q

ACO

5962-9452602MGA Q

LM193AHRLQMLV ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRLQMLV

PACKAGE OPTION ADDENDUM

www.ti.com 11-Apr-2013

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Top-Side Markings

(4)

Samples

5962R9452603VGA Q

ACO

5962R9452603VGA Q

LM193AHRQMLV ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRQMLV

5962R9452602VGA Q

ACO

5962R9452602VGA Q

LM193AJ-QMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ-QMLV

5962-94526

02VPA Q ACO

02VPA Q >T

LM193AJ/883 ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ/883

5962-94526

02MPA Q ACO

02MPA Q >T

LM193AJRLQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRLV

5962R94526

03VPA Q ACO

03VPA Q >T

LM193AJRQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRQMLV

5962R94526

02VPA Q ACO

02VPA Q >T

LM193H/883 ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193H/883 Q ACO

LM193H/883 Q >T

LM193J/883 ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193J

/883 Q ACO

/883 Q >T

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

PACKAGE OPTION ADDENDUM

www.ti.com 11-Apr-2013

Addendum-Page 3

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a

continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF LM193QML, LM193QML-SP :

•Military: LM193QML

•Space: LM193QML-SP

NOTE: Qualified Version Definitions:

•Military - QML certified for Military and Defense Applications

•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application

MECHANICAL DATA

NAB0008A

www.ti.com

J08A (Rev M)

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