LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 LM193A/LM193QML Low Power Low Offset Voltage Dual Comparators Check for Samples: LM193A, LM193QML FEATURES DESCRIPTION * The LM193 series consists of two independent precision voltage comparators with an offset voltage specification as low as 2.0 mV max for two comparators which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. These comparators also have a unique characteristic in that the input common-mode voltage range includes ground, even though operated from a single power supply voltage. 1 2 * * * * * * * * Available with Radiation Guarantee - Total Ionizing Dose 100 krad(Si) - ELDRS Free 100 krad(Si) Wide Supply - Voltage Range: 2.0VDC to 36VDC - Single or Dual Supplies: 1.0V to 18V Very Low Supply Current Drain (0.4 mA) -- Independent of Supply Voltage Low Input Biasing Current: 25 nA typ Low Input Offset Current: 5 nA typ Input Common-Mode Voltage Range Includes Ground Differential Input Voltage Range Equal to the Power Supply Voltage Low Output Saturation Voltage,: 250 mV at 4 mA typ Output Voltage Compatible with TTL, DTL, ECL, MOS and CMOS Logic Systems Application areas include limit comparators, simple analog to digital converters; pulse, squarewave and time delay generators; wide range VCO; MOS clock timers; multivibrators and high voltage digital logic gates. The LM193 series was designed to directly interface with TTL and CMOS. When operated from both plus and minus power supplies, the LM193 series will directly interface with MOS logic where their low power drain is a distinct advantage over standard comparators. ADVANTAGES * * * * * * High Precision Comparators Reduced VOS Drift Over Temperature Eliminates Need for Dual Supplies Allows Sensing Near Ground Compatible with All Forms of Logic Power Drain Suitable for Battery Operation 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2005-2013, Texas Instruments Incorporated LM193A, LM193QML SNOSAM2C - MAY 2005 - REVISED MARCH 2013 www.ti.com Schematic and Connection Diagrams Figure 1. TO-99 Package See Package Number LMC Figure 2. CDIP Package See Package Number NAB0008A 2 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) Supply Voltage, V+ 36VDC or 18VDC Differential Input Voltage (2) 36V -0.3VDC to +36VDC Input Voltage Input Current (VIN< -0.3VDC) (3) 50 mA Maximum Junction Temperature 150C Power Dissipation (4) (5) TO-99 CDIP Output Short-Circuit to Ground (6) 780 mW Continuous -55C TA +125C Operating Temperature Range -65C TA +150C Storage Temperature Range Thermal Resistance 660 mW JA TO-99 (Still Air) JC 174C/W TO-99 (500LF/Min Air flow) 99C/W CDIP (Still Air) 146C/W CDIP (500LF/Min Air flow) 85C/W TO-99 44C/W CDIP 33C/W Lead Temperature (Soldering, 10 seconds) 260C ESD Tolerance (7) 500V (1) (2) (3) (4) (5) (6) (7) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3V (or 0.3V below the magnitude of the negative power supply, if used). This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3VDC. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), JA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/JA or the number given in the Absolute Maximum Ratings, whichever is lower. The LM193A must be derated based on a 150C, TJmax. The low bias dissipation and the ON-OFF characteristic of the outputs keep the chip dissipation very small (PD 100mV), provided the output transistors are allowed to saturate. Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20 mA independent of the magnitude of V+. Human body model, 1.5K in series with 100pF. Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A Subgroup Description 1 Static tests at TempC 25 2 Static tests at 125 3 Static tests at -55 4 Dynamic tests at 25 5 Dynamic tests at 125 6 Dynamic tests at -55 7 Functional tests at 25 8A Functional tests at 125 8B Functional tests at -55 Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML Submit Documentation Feedback 3 LM193A, LM193QML SNOSAM2C - MAY 2005 - REVISED MARCH 2013 www.ti.com Quality Conformance Inspection (continued) Mil-Std-883, Method 5005 - Group A Subgroup Description TempC 9 Switching tests at 25 10 Switching tests at 125 11 Switching tests at -55 12 Settling time at 25 13 Settling time at 125 14 Settling time at -55 LM193 Electrical Characteristics DC Parameters The following conditions apply, unless otherwise specified. Symbol ICC Parameter +V = 5V, VCM = 0V Conditions Notes Max Unit Subgroups 1.0 mA 1, 2, 3 2.5 mA 1, 2, 3 -0.65 0.65 A 1 -1.0 1.0 A 2, 3 mA 1 Min Supply Current +V = 36V ICEX Output Leakage Current +V = 30V, +VI = 1V, VO = 30V, -VI = 0V ISink Output Sink Current VO = 1.5V, -VI = 1V, +VI = 0V VSat Output Saturation Voltage ISink = 4mA, -VI = 1V, +VI = 0V VIO 6.0 0.4 V 1 0.7 V 2, 3 -5.0 5.0 mV 1 -9.0 9.0 mV 2, 3 -5.0 5.0 mV 1 -9.0 9.0 mV 2, 3 +V = 30V, VCM = 28.5V -5.0 5.0 mV 1 +V = 30V, VCM = 28.0V -9.0 9.0 mV 2, 3 -100 -1.0 nA 1 -300 -1.0 nA 2, 3 -25 25 nA 1 -100 100 nA 2, 3 See (1) 28.5 V 1 See (1) 28 V 2, 3 Input Offset Voltage +V = 30V IIB Input Bias Current IIO Input offset Current VCM Common Mode Voltage RS = 50 +V = 30V PSRR Power Supply Rejection Ratio +V = 5V to 30V, RS = 50 60 dB 1 CMRR Common Mode Rejection Ratio +V = 30V, RS = 50 VCM = 0V to 28.5V, 60 dB 1 VDiff Differential Input Voltage +V = 30V, +VI = 36V, -VI = 0V See (2) 500 nA 1, 2, 3 +V = 30V, +VI = 0V, -VI = +36V See (2) 500 nA 1, 2, 3 +V = 15V, RPullUp = 15K 1V VO 11V, See (3) V/mV 4 AVS (1) (2) (3) 4 Voltage Gain 50 Parameter specified by the VIO tests. The value for VDiff is not datalogged during Read and Record. Datalog reading in K = V/mV. Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 LM193 Electrical Characteristics AC Parameters The following conditions apply, unless otherwise specified. Symbol tRLH Parameter Response Time tRHL +V = 5V Conditions Response Time Max Unit Subgroups VOD = 5mV 5.0 S 9 VOD = 50mV 0.8 S 9 VOD = 5mV 2.5 S 9 VOD = 50mV 0.8 S 9 Max Unit Subgroups RL = Infinity 1.0 mA 1, 2, 3 +V = 36V, RL = Infinity 2.5 mA 1, 2, 3 A 1 A 2, 3 Notes Min LM193A Electrical Characteristics DC Parameters The following conditions apply, unless otherwise specified. Symbol ICC Parameter +V = 5V, VCM = 0V Conditions Supply Current Notes Min ICEX Output Leakage Current +V = 30V, +VI = 1V, VO = 30, -VI = 0 -0.65 0.65 -1.0 1.0 ISink Output Sink Current VO = 1.5V, -VI = 1V, +VI = 0V 6.0 mA 1 4.0 mA 2, 3 VSat Output Saturation Voltage VIO ISink = 4mA, -VI = 1V, +VI = 0V Input Offset Voltage +V = 30V +V = 30V, VCM = 28.5V IIB Input Bias Current IIO Input offset Current VCM V 1 0.7 V 2, 3 -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 -2.0 2.0 mV 1 2, 3 +V = 30V, VCM = 28.0V -4.0 4.0 mV VO = 1.5V -100 -1.0 nA 1 -300 -1.0 nA 2, 3 -25 25 nA 1 -100 100 nA 2, 3 28.5 V 1 28 V 2, 3 RS = 50, VO = 1.5V Common Mode Voltage 0.4 +V = 30V See (1) See (1) PSRR Power Supply Rejection Ratio +V = 5V to 30V, RS = 50 60 dB 1 CMRR Common Mode Rejection Ratio +V = 30V, RS = 50 VCM = 0V to 28.5V, 60 dB 1 VDiff Differential Input Voltage +V = 30V, +VI = 36V, -VI = 0V See (2) 500 nA 1, 2, 3 +V = 30V, +VI = 0V, -VI = +36V See (2) 500 nA 1, 2, 3 AVS (1) (2) (3) Voltage Gain +V = 15V, RPullUp = 15K 1V VO 11V, (3) 50 V/mV 4 See (3) 25 V/mV 5, 6 See Parameter specified by the VIO tests. The value for VDiff is not datalogged during Read and Record. Datalog reading in K = V/mV. Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML Submit Documentation Feedback 5 LM193A, LM193QML SNOSAM2C - MAY 2005 - REVISED MARCH 2013 www.ti.com LM193A Electrical Characteristics AC Parameters The following conditions apply, unless otherwise specified. Symbol tRLH Parameter Response Time tRHL Response Time +V = 5V, VCM = 0V Conditions Max Unit Subgroups VOD = 5mV 5.0 S 9 VOD = 50mV 0.8 S 9 VOD = 5mV 2.5 S 9 VOD = 50mV 0.8 S 9 Min Max Unit Subgroups -1.0 1.0 mV 1 -15 15 nA 1 Max Unit Subgroups RL = Infinity 1.0 mA 1, 2, 3 +V = 36V, RL = Infinity 2.5 mA 1, 2, 3 Notes Min LM193A Electrical Characteristics DC Drift Parameters The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V Delta calculations performed on QMLV devices at Group B, Subgroup 5 only Symbol Parameter VIO Input Offset Voltage IIB Input Bias Current Conditions Notes +V = 30V LM193A - 100K Radiation Electrical Characteristics DC Parameters (1) (2) The following conditions apply, unless otherwise specified. Symbol ICC Parameter Supply Current ICEX Output Leakage Current +V = 5V, VCM = 0V Conditions -0.65 0.65 A 1 -1.0 1.0 A 2, 3 6.0 mA 1 mA 2, 3 Output Sink Current VO = 1.5V, -VI = 1V, +VI = 0V VSat Output Saturation Voltage ISink = 4mA, -VI = 1V, +VI = 0V 4.0 0.4 V 1 0.7 V 2, 3 -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 +V = 30V, VCM = 28.5V -2.0 2.0 mV 1 +V = 30V, VCM = 28.0V -4.0 4.0 mV 2, 3 -100 -1.0 nA 1 -300 -1.0 nA 2, 3 -25 25 nA 1 -100 100 nA 2, 3 28.5 V 1 28 V 2, 3 Input Offset Voltage +V = 30V IIB Input Bias Current VO = 1.5V IIO Input offset Current RS = 50, VO = 1.5V VCM Common Mode Voltage Min +V = 30V, +VI = 1V, VO = 30, -VI = 0 ISink VIO Notes +V = 30V See (3) See (3) PSRR Power Supply Rejection Ratio +V = 5V to 30V, RS = 50 60 dB 1 CMRR Common Mode Rejection Ratio +V = 30V, RS = 50 VCM = 0V to 28.5V, 60 dB 1 (1) (2) (3) 6 Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. Parameter specified by the VIO tests. Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 LM193A - 100K Radiation Electrical Characteristics DC Parameters(1)(2) (continued) The following conditions apply, unless otherwise specified. Symbol VDiff +V = 5V, VCM = 0V Conditions Differential Input Voltage AVS (4) (5) Parameter Voltage Gain Notes Min Max Unit Subgroups +V = 30V, +VI = 36V, -VI = 0V See (4) 500 nA 1, 2, 3 +V = 30V, +VI = 0V, -VI = +36V See (4) 500 nA 1, 2, 3 +V = 15V, RPullUp = 15K 1V VO 11V, See (3) 50 V/mV 4 (5) 25 V/mV 5, 6 Max Unit Subgroups VOD = 5mV 5.0 S 9 VOD = 50mV 0.8 S 9 VOD = 5mV 2.5 S 9 VOD = 50mV 0.8 S 9 See The value for VDiff is not datalogged during Read and Record. Datalog reading in K = V/mV. LM193A - 100K Radiation Electrical Characteristics AC Parameters (1) (2) The following conditions apply, unless otherwise specified. Symbol Parameter tRLH Response Time tRHL Response Time (1) +V = 5V, VCM = 0V Conditions Notes Min Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. (2) LM193A - 100K Radiation Electrical Characteristics (Continued) DC Drift Parameters (1) (2) The following conditions apply, unless otherwise specified. +V = 5V, VCM = 0V Delta calculations performed on QMLV devices at Group B, Subgroup 5 only Symbol Parameter VIO Input Offset Voltage IIB Input Bias Current (1) Conditions Notes +V = 30V Min Max Unit Subgroups -1.0 1.0 mV 1 -15 15 nA 1 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019 (2) LM193A - 100K Radiation Electrical Characteristics (Continued) AC Parameters - Post Radiation Limits @ +25C (1) (2) The following conditions apply, unless otherwise specified. Symbol tRLH (1) (2) Parameter +V = 5V, VCM = 0V Conditions Response Time Notes VOD = 50mV Min Max Unit Subgroups 1.0 S 9 Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, Method 1019 Low dose rate testing has been performed on a wafer-by-wafer basis, per test method 1019 condition D of MIL-STD-883, with no enhanced low dose rate sensitivity (ELDRS) effect. Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML Submit Documentation Feedback 7 LM193A, LM193QML SNOSAM2C - MAY 2005 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics Supply Current Input Current Figure 3. Figure 4. Output Saturation Voltage Response Time for Various Input Overdrives--Negative Transition Figure 5. Figure 6. Response Time for Various Input Overdrives--Positive Transition Figure 7. 8 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 APPLICATION HINTS The LM193 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only during the output voltage transition intervals as the comparator change states. Power supply bypassing is not required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling. Reducing the input resistors to < 10 K reduces the feedback signal levels and finally, adding even a small amount (1.0 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause inputoutput oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform, with relatively fast rise and fall times, hysteresis is not required. All input pins of any unused comparators should be tied to the negative supply. The bias network of the LM193 series establishes a drain current which is independent of the magnitude of the power supply voltage over the range of from 2.0 VDC to 30 VDC. It is usually unnecessary to use a bypass capacitor across the power supply line. The differential input voltage may be larger than V+ without damaging the device (see following note). NOTE Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3V (or 0.3V below the magnitude of the negative power supply, if used). Protection should be provided to prevent the input voltages from going negative more than -0.3 VDC (at 25C). An input clamp diode can be used as shown in the applications section. The output of the LM193 series is the uncommitted collector of a grounded-emitter NPN output transistor. Many collectors can be tied together to provide an output OR'ing function. An output pull-up resistor can be connected to any available power supply voltage within the permitted supply voltage range and there is no restriction on this voltage due to the magnitude of the voltage which is applied to the V+ terminal of the LM193 package. The output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of current which the output device can sink is limited by the drive available (which is independent of V+) and the of this device. When the maximum current limit is reached (approximately 16mA), the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the approximately 60 rSAT of the output transistor. The low offset voltage of the output transistor (1.0mV) allows the output to clamp essentially to ground level for small load currents. Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML Submit Documentation Feedback 9 LM193A, LM193QML SNOSAM2C - MAY 2005 - REVISED MARCH 2013 www.ti.com Typical Applications (V+=5.0 VDC) Basic Comparator Driving CMOS Driving TTL Squarewave Oscillator Pulse Generator Crystal Controlled Oscillator * For large ratios of R1/R2, D1 can be omitted. Figure 8. Two-Decade High Frequency VCO V* = +30 VDC +250 mVDC VC +50 VDC 700Hz fo 100kHz 10 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 Basic Comparator Non-Inverting Comparator with Hysteresis Inverting Comparator with Hysteresis Output Strobing AND Gate OR Gate Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML Submit Documentation Feedback 11 LM193A, LM193QML SNOSAM2C - MAY 2005 - REVISED MARCH 2013 12 www.ti.com Large Fan-in AND Gate Limit Comparator Comparing Input Voltages of Opposite Polarity ORing the Outputs Zero Crossing Detector (Single Power Supply) One-Shot Multivibrator Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 Bi-Stable Multivibrator One-Shot Multivibrator with Input Lock Out Zero Crossing Detector Comparator With a Negative Reference Figure 9. Time Delay Generator Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML Submit Documentation Feedback 13 LM193A, LM193QML SNOSAM2C - MAY 2005 - REVISED MARCH 2013 www.ti.com Split-Supply Applications (V+=+15 VDC and V-=-15 VDC) Figure 10. MOS Clock Driver 14 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML LM193A, LM193QML www.ti.com SNOSAM2C - MAY 2005 - REVISED MARCH 2013 Table 1. Revision History Date Released Revision Section Originator Changes 05/09/05 A New Release. Corporate format L. Lytle 2 MDS datasheets converted into one Corp. datasheet format. MNLM193A-X Rev 1B3 & MNLM193-X Rev 0E1. The Iout Vsat condition for LM193 was changed to Isink for consistency with the LM193A and JAN electrical conditions. Also, redundant parameters were removed from conditions that were defined at beginning of the table. MDS data sheets will be archived. 05/07/07 B Features, Ordering Information, LM193A Larry McGee Electricals Added Radiation Electrical information for LM193A Device. Revision A will be archived. 10/29/07 C Features, Ordering Information, Notes Added reference to New ELDS NSID and SMD Device 03, ELDRS Note 12. Revision B will be archived. 03/20/13 C All Larry McGee Changed layout of National Data Sheet to TI format Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM193A LM193QML Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) (3) Top-Side Markings (4) 5962-9452602MGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AH/883 5962-9452602MGA Q ACO 5962-9452602MGA Q >T 5962-9452602MPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ/883 5962-94526 02MPA Q ACO 02MPA Q >T 5962-9452602VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ-QMLV 5962-94526 02VPA Q ACO 02VPA Q >T 5962R9452602VGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRQMLV 5962R9452602VGA Q ACO 5962R9452602VGA Q >T 5962R9452602VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRQMLV 5962R94526 02VPA Q ACO 02VPA Q >T 5962R9452603VGA ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRLQMLV 5962R9452603VGA Q ACO 5962R9452603VGA Q >T 5962R9452603VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRLV 5962R94526 03VPA Q ACO 03VPA Q >T LM193AH/883 ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AH/883 5962-9452602MGA Q ACO 5962-9452602MGA Q >T LM193AHRLQMLV ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRLQMLV Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Top-Side Markings (3) (4) 5962R9452603VGA Q ACO 5962R9452603VGA Q >T LM193AHRQMLV ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193AHRQMLV 5962R9452602VGA Q ACO 5962R9452602VGA Q >T LM193AJ-QMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ-QMLV 5962-94526 02VPA Q ACO 02VPA Q >T LM193AJ/883 ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJ/883 5962-94526 02MPA Q ACO 02MPA Q >T LM193AJRLQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRLV 5962R94526 03VPA Q ACO 03VPA Q >T LM193AJRQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193AJRQMLV 5962R94526 02VPA Q ACO 02VPA Q >T LM193H/883 ACTIVE TO-99 LMC 8 20 TBD Call TI Call TI -55 to 125 LM193H/883 Q ACO LM193H/883 Q >T LM193J/883 ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM193J /883 Q ACO /883 Q >T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF LM193QML, LM193QML-SP : * Military: LM193QML * Space: LM193QML-SP NOTE: Qualified Version Definitions: * Military - QML certified for Military and Defense Applications * Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3 MECHANICAL DATA NAB0008A J08A (Rev M) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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