SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Bi-MOS Technology With TTL and CMOS
Compatibility
D
Meets or Exceeds the Requirements of
ANSI EIA/TIA-232-E and ITU
Recommendation V.28
D
Very Low Quiescent Current...95 µA Typ
VCC± = ±12 V
D
Current-Limited Outputs...10 mA Typ
D
CMOS-and TTL-Compatible Inputs
D
On-Chip Slew Rate Limited to 30 V/µs max
D
Flexible Supply Voltage Range
D
Characterized at VCC± of ±4.5 V and ±15 V
D
Functionally Interchangeable With Texas
Instruments SN75188, Motorola MC1488,
and National Semiconductor DS14C88
description
The SN75C188 is a monolithic, low-power, quadruple line driver that interfaces data terminal equipment with
data communications equipment. This device is designed to conform to ANSI Standard EIA/TIA-232-E.
An external diode in series with each supply-voltage terminal is needed to protect the SN75C188 under certain
fault conditions to comply with EIA/TIA-232-E.
The SN75C188 is characterized for operation from 0°C to 70°C.
Function Tables
DRIVER 1
BY
H L
L H
DRIVERS 2 – 4
AB Y
H H L
LXH
XLH
H = high level, L = low level,
X = don’t care
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC–
1A
1Y
2A
2B
2Y
GND
VCC+
4B
4A
4Y
3B
3A
3Y
D, DB†, OR N PACKAGE
(TOP VIEW)
†The DB package is only avalable left-end taped
and reeled, i.e., order device SN75C188DBLE.
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†
4Y
3Y
2Y
1Y
13
12
10
9
5
4
2
4B
4A
3B
3A
2B
2A
1A
11
8
6
3
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
&
logic diagram (positive logic)
4Y
3Y
2Y
1Y
13
12
10
9
5
4
2
4B
4A
3B
3A
2B
2A
1A
11
8
6
3
positive logic
Y = A (driver 1)
Y = AB or A + B (drivers 2 through 4)
schematics of inputs and outputs
EACH OUTPUT‡
GND
VCC–
74 Ω
160 Ω
72 Ω
Output
VCC+
(driver 1 only)
Internal
1.4-V Ref
to GND
VCC+
Input A
Input B
(drivers 2, 3
and 4 only)
GND
VCC–
EACH INPUT
‡All resistor values shown are nominal.
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC+ (see Note 1) 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, VCC– (see Note 1) –15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI V
CC– to VCC+
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO V
CC– –6 V to VCC+ +6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: All voltage values are with respect to the network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
T
A
≤ 25°CDERATING FACTOR T
A
= 70°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
D950 mW 7.6 mW/°C 608 mW
DB 525 mW 4.2 mW/°C 336 mW
N 1150 mW 9.2 mW/°C 736 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, VCC+ 4.5 12 15 V
Supply voltage, VCC– –4.5 –12 –15 V
Input voltage, VIVCC–+2 VCC+ V
High-level Input voltage, VIH 2 V
Low-level Input voltage, VIL 0.8 V
Operating free-air temperature, TA0 70 °C
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over operating free-air temperature range, VCC+ = 12 V, VCC– = –12 V
(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
CC+
= 5 V,
4
VOH
High level out
p
ut voltage
VIL =08V
RL=3kΩ
CC+ ,
VCC– = –5 V
4
V
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
V
IL =
0
.
8
V
,
R
L =
3
kΩ
V
CC+
= 12 V,
10
V
CC+ ,
VCC– = –12 V
10
V
CC+
= 5 V,
4
VOL
Low-level output voltage
VIH =2V
RL=3kΩ
CC+ ,
VCC– = –5 V –
4
V
V
OL
g
(see Note 2)
V
IH =
2
V
,
R
L =
3
kΩ
V
CC+
= 12 V,
10
V
CC+ ,
VCC– = –12 V –
10
IIH High-level input current VI = 5 V 10 µA
IIL Low-level input current VI = 0 –10 µA
IOS(H)
High-level short-circuit
VI=08V
55
10
19 5
mA
I
OS(H)
g
output current‡
V
I =
0
.
8
V
,
O =
CC– –
5
.
5
–
10
–
19
.
5
mA
IOS(L)
Low-level short-circuit
VI=2V
55
10
19 5
mA
I
OS(L) output current‡
V
I =
2
V
,
O =
CC+
5
.
5
10
19
.
5
mA
rOOutput resistance, power off VCC+ = 0, VCC– = 0, VI = –2 V to 2 V 300 Ω
V
CC+
= 5 V, V
CC
– = – 5 V
,
All in
p
utsat2Vor08V
90
160
ICC
Su
pp
ly current from VCC
CC+ ,
No load
VCC–
5
V,
All
inp
u
ts
at
2
V
or
0
.
8
V
90
160
µA
I
CC+
S
u
ppl
y
c
u
rrent
from
V
CC+ V
CC+
= 12 V, V
CC
– = –12 V
,
All in
p
utsat2Vor08V
95
160
µ
A
CC+ ,
No load
VCC–
12
V,
All
inp
u
ts
at
2
V
or
0
.
8
V
95
160
V
CC+
= 5 V, V
CC
– = – 5 V
,
All in
p
utsat2Vor08V
90
160
ICC
Su
pp
ly current from VCC
CC+ ,
No load
VCC–
5
V,
All
inp
u
ts
at
2
V
or
0
.
8
V
–
90
–
160
µA
I
CC–
S
u
ppl
y
c
u
rrent
from
V
CC– VCC+ = 12 V, VCC– = –12
All in
p
utsat2Vor08V
95
160
µ
A
CC+
No load
CC
All
inp
u
ts
at
2
V
or
0
.
8
V
–
95
–
160
†All typical values are at TA = 25°C.
‡Not more than one output should be shorted at a time.
NOTE 2: The algebraic convention, in which the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only; e.g., if –4 V is a maximum, the typical value is a more negative voltage.
switching characteristics, VCC+ = 12 V, VCC– = –12 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output§R
L
= 3 kΩ, C
L
= 15 pF, 3µs
tPHL Propagation delay time, high- to low-level output§
L,
See Figure 1
L,
3.5 µs
tTLH T ransition time, low- to high-level output0.53 3.2 µs
tTHL T ransition time, high- to low-level output0.53 3.2 µs
tTLH T ransition time, low- to high-level output#R
L
= 3 kΩ to 7 kΩ, C
L
= 2500 pF, 1.5 µs
tTHL T ransition time, high- to low-level output#
L,
See Figure 1
L,
1.5 µs
SR Output slew rate§RL = 3 kΩ to 7 kΩ, CL = 15 pF 6 15 30 V/µs
§Measured at the 50% level
Measured between the 10% and 90% points on the output waveform
#Measured between the 3-V and –3-V points on the output waveform (EIA/TIA-232-E conditions), all unused inputs tied either high or low
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT VOLTAGE WAVEFORMS
Output
Input
10%
50%
90%
tPHL tPLH
VOL
VOH
0 V
3 V
CL
(see Note B)
RL
Output
Input
Pulse
Generator
(see Note A)
tTHL tTLH
1.5 V
50%
90%
10%
1.5 V
NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHZ, ZO = 50 Ω, tr = tf ≤ 50 ns.
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 2
0
VI – Input Voltage – V
15
20.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
–9
–6
–3
0
3
6
9
12
VO – Output Voltage – V
VOLTAGE TRANSFER CHARACTERISTICS
VCC± = ±5 V
VCC± = ±12 V
VCC± = ±5 V
VCC± = ±15 V
VCC± = ±12 V
VCC± = ±9 V
VCC± = ±5 V
ÁÁÁ
ÁÁÁ
VO
VCC±= ±9 V
RL = 3 kΩ
TA = 25°C
–12
–15
Figure 3
–16
VO – Output Voltage – V
20
16
–20 –12 –8 –4 0 4 8 12
–16
–12
–8
–4
0
4
8
12
16 VCC± = ±12 V
TA = 25°C
IO – Output Current – mA
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
3-kΩ Load Line
VOL = (VI = 2 V)
ÁÁ
ÁÁ
IO
VOH (VI = 0.8 V)
Figure 4
15
–15
–10
0
5
10
100806040200 120
TA – Free-Air Temperature – °C
IOS – Short-Circuit Output Current – mA
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
–5
ÁÁ
ÁÁ
ÁÁ
OS
I
VCC± = ±12 V
IOS(L)
VI = 2 V
VO = 0 or VCC+
IOS(H)
VI = 0.8 V
VO = 0 or VCC–
Figure 5
VOL (VCC±= ±12 V, VI = 2 V)
VOL( VCC± = ±5 V, VI = 2 V)
TA – Free-Air Temperature – °C
12
120
–120 20 40 60 80 100
–8
–4
0
4
8
– Output Voltage – V
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VO
RL = 3 kΩ
VOH (VCC± = ±12 V, VI = 0.8 V)
VOH (VCC± = ±5 V, VI = 0.8 V)
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
TA – Free-Air Temperature – °C
120
120
–400 20 40 60 80 100
–20
0
20
40
60
80
100
IIH, VI = 5 V
II – Input Current – nA
INPUT CURRENT
vs
FREE-AIR TEMPERATURE
I
I
VCC± = ±12 V
IIL, VI = 0
Figure 7
ro – Power-off Output Resistance –
500
300
350
400
450
100806040200 120
TA – Free-Air Temperature – °C
POWER-OFF OUTPUT RESISTANCE
vs
FREE-AIR TEMPERATURE
ΩrO
475
425
375
325
VO = –2 V
VO = 2 V
VCC+ = VCC– = 0
Figure 8
– Supply Current –
120
–120
–80
–40
0
40
80
RL = ∞
VI = 0.8 V or 2 V
ICC+
ICC–
100806040200 120
TA – Free-Air Temperature – °C
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
Aµ
VCC± = ±12 V
VCC± = ±5 V
VCC± = ±5 V
VCC± = ±12 V
CC ±
I
Figure 9
30
0
10
20
100806040200 120
TA – Free-Air Temperature – °C
RL = 3 kΩ
RL = 7 kΩ
RL = 3 kΩ
Slew Rate
SR – Output Slew Rate – V/s
OUTPUT SLEW RATE
vs
FREE-AIR TEMPERATURE
Positive Transition
25
15
5
Slew Rate
Negative
Transition
RL = 7 kΩ
VCC± = ±12 V
CL = 15 pF
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
tpd – Propagation Delay Time –
TA – Free-Air Temperature – °C
2
120
00 20 40 60 80 100
0.5
1
1.5
tPHL
RL = 3 kΩ
RL = 7 kΩ
RL = 7 kΩ
RL = 3 kΩ
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
tpd sµ
tPLH
VCC± = ±12 V
CL = 15 pF
Figure 11
1.5
0.5
0
2
100806040200 120
TA – Free-Air Temperature – °C
tTHL
tTLH
tTHL
tTLH
1
OUTPUT TRANSITION TIME
vs
FREE-AIR TEMPERATURE
ttsµ
1.75
1.25
0.75
0.25
CL = 2500 pF
CL = 15 pF
– Output Transition Time –
VCC+ = 12 V
VCC– = –12 V
RL = 3 kΩ to 7 kΩ
APPLICATION INFORMATION
3 V
1/4 ’C188
–12 V
Output to RTL
–0.7 V to 3.7 V
5 V
1/4 ’C188
1/4 ’C188
1/4 ’C188 1 kΩ10 kΩ
Input From
TTL, DTL, or CMOS
VCC± = ±12 V
Output to DTL
–0.7 V to 5.7 V
Output to HNIL or
10-V CMOS
–0.7 V to 10 V
Output to MOS
–10 V to 0 V
Figure 12. Logic Translator Applications
SN75C188
QUADRUPLE LOW-POWER LINE DRIVERS
SLLS033F – JANUARY 1988 – REVISED MARCH 1997
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
SN75C188 SN75C188
Output
+15 V
VCC+
VCC–
VCC–
VCC+
NOTE A: External diodes placed in series with the VCC+ and VCC– leads protect the SN75C188 in the fault condition where the device outputs
are shorted to ±15 V and the power supplies are at low voltage and provide low-impedance paths to GND.
Figure 13. Power Supply Protection to Meet Power-Off Fault Conditions of Standard EIA/TIA-232-E
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN75C188D ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI
SN75C188DBR ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DRE4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188DRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188N ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75C188NE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75C188NSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188NSRE4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75C188NSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jun-2007
Addendum-Page 1
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jun-2007
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN75C188DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN75C188DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN75C188DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN75C188NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75C188DBR SSOP DB 14 2000 367.0 367.0 38.0
SN75C188DR SOIC D 14 2500 333.2 345.9 28.6
SN75C188DR SOIC D 14 2500 367.0 367.0 38.0
SN75C188NSR SO NS 14 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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