TLE4964-1K - Infineon Technologies AG

Sense & Control

Data Sheet

Revision 1.0, 2012-05-15

TLE4964-1K

High Precision Automotive Hall Effect Switch

Edition 2012-05-15

Published by

Infineon Technologies AG

81726 Munich, Germany

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or

characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any

information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties

and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights

of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest

Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in

question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written

approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure

of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support

devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain

and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

be endangered.

TLE4964-1K

Data Sheet 3 Revision 1.0, 2012-05-15

Trademarks of Infineon Technologies AG

AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™,

CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™,

EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™,

ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™,

PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™,

SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™.

Other Trademarks

Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,

PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR

development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,

FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.

FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of

Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data

Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of

MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics

Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™

of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,

OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.

RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.

SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden

Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.

UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™

of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of

Diodes Zetex Limited.

Last Trademarks Update 2011-02-24

Revision History

Page or Item Subjects (major changes since previous revision)

Revision 1.0, 2012-05-15

13 Table 3-1 Lifetime statement added

13,14 VQ Min changed

17 Packing Information added

TLE4964-1K
Table of Contents
    
   Data Sheet 4 Revision 1.0, 2012-05-15
   
Table of Contents  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  6
Product Description  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
2 Features  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
3 Target Applications  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
1 General  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
2 Pin Configuration (top view)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
3 Pin Description  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
4 Block Diagram   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
5 Functional Block Description   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
6 Start-up behavior   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  11
Specification  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  12
1 Application Circuit  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  12
2 Absolute Maximum Ratings   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  13
3 Operating Range   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  14
4 Electrical and Magnetic Characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  14
5 Electro Magnetic Compatibility  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  16
Package Information   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
1 Package Outline PG-SC59-3-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
2 Packing Information PG-SC59-3-5  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
3 Footprint PG-SC59-3-5 and PG-SOT23-3-15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4 PG-SC59-3-5 Distance between Chip and Package   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  18
5 Package Marking   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  18
Graphs of the Magnetic Parameters  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  19
Graphs of the Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  20
Table of Contents

TLE4964-1K
List of Figures
    
   Data Sheet 5 Revision 1.0, 2012-05-15
   
Figure 1-1 Image of TLE4964-1K in the PG-SC59-3-5 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
Figure 2-1 Pin Configuration and Center of Sensitive Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
Figure 2-2 Functional Block Diagram TLE4964-1K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
Figure 2-3 Timing Diagram TLE4964-1K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  10
Figure 2-4 Output Signal TLE4964-1K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  10
Figure 2-5 Illustration of the start-up behavior of the TLE4964-1K  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  11
Figure 3-1 Application Circuit 1: with external resistor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  12
Figure 3-2 Application Circuit 2: without external resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  12
Figure 3-3 Definition of magnetic field direction PG-SC59-3-5  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  15
Figure 3-4 EMC test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  16
Figure 4-1 PG-SC59-3-5 Package Outline (All dimensions in mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
Figure 4-2 Packing of the PG-SC59-3-5 in a tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
Figure 4-3 Footprint PG-SC59-3-5 and PG-SOT23-3-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 4-4 Distance between chip and package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  18
Figure 4-5 Marking of TLE4964-1K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  18
Figure 5-1 Operating Point (BOP) of the TLE4964-1K over Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . .  19
Figure 5-2 Release Point (BRP) of the TLE4964-1K over Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  19
Figure 5-3 Hysteresis (BHys) of the TLE4964-1K over Temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  19
Figure 6-1 Power On Time tPON of the TLE4964-1K over Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  20
Figure 6-2 Signal Delay Time of the TLE4964-1K over Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  20
Figure 6-3 Supply Current of the TLE4964-1K over Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  21
Figure 6-4 Supply Current of the TLE4964-1K over Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  21
Figure 6-5 Output Current Limit of the TLE4964-1K over Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  22
Figure 6-6 Output Current Limit of the TLE4964-1K over applied Pull-up Voltage  . . . . . . . . . . . . . . . . . . . . .  22
Figure 6-7 Output Fall Time of the TLE4964-1K over Temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  22
Figure 6-8 Output Fall Time of the TLE4964-1K over applied Pull-up Voltage . . . . . . . . . . . . . . . . . . . . . . . .  23
Figure 6-9 Output Rise Time of the TLE4964-1K over Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  23
Figure 6-10 Output Rise Time of the TLE4964-1K over applied Pull-up Voltage. . . . . . . . . . . . . . . . . . . . . . . .  23
Figure 6-11 Output Leakage Current of the TLE4964-1K over Temperature  . . . . . . . . . . . . . . . . . . . . . . . . . .  24
Figure 6-12 Saturation Voltage of the TLE4964-1K over Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  24
Figure 6-13 Saturation Voltage of the TLE4964-1K over Output Current  . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  24
Figure 6-14 Effective Noise of the TLE4964-1K Thresholds over Temperature  . . . . . . . . . . . . . . . . . . . . . . . .  25
Figure 6-15 Output Signal Jitter of the TLE4964-1K over Temperature  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  25
List of Figures

TLE4964-1K
List of Tables
    
   Data Sheet 6 Revision 1.0, 2012-05-15
   
Table 1-1 Ordering Information  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
Table 2-1 Pin Description PG-SC59-3-5  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
Table 3-1 Absolute Maximum Rating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  13
Table 3-2 ESD Protection (TA = 25°C)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  13
Table 3-3 Operating Conditions Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  14
Table 3-4 General Electrical Characteristics  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  14
Table 3-5 Magnetic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  15
Table 3-6 Magnetic Compatibility   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  16
Table 3-7 Electro Magnetic Compatibility  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  16
List of Tables

TLE4964-1K

Product Description

Data Sheet 7 Revision 1.0, 2012-05-15

1 Product Description

1.1 Overview

Figure 1-1 Image of TLE4964-1K in the PG-SC59-3-5 package

1.2 Features

• 3.0 V to 32 V operating supply voltage

• Operation from unregulated power supply

• Reverse polarity protection (-18 V)

• Overvoltage capability up to 42 V without external resistor

• Output overcurrent & overtemperature protection

• Active error compensation

• High stability of magnetic thresholds

• Low jitter (typ. 0.35 μs)

• High ESD performance

• SOT23 like SMD package PG-SC59-3-5 (TLE4964-1K)

1.3 Target Applications

Target applications for the TLE496x Hall switch family are all applications which require a high precision Hall

switch with an operating temperature range from -40°C to 170°C. Its superior supply voltage range from 3.0 V to

32 V with overvoltage capability (e.g. load-dump) up to 42 V without external resistor makes it ideally suited for

automotive and industrial applications.

The TLE4964-1K is a unipolar switch with a typical operating point BOP = 18 mT and a hysteresis of BHYS = 5.5 mT.

It is ideally suited for various position detection applications.

Characteristic Supply Voltage Supply Current Sensitivity Interface Temperature

Unipolar Hall

Effect Switch

3.0~32 V 1.6 mA Low

BOP:18 mT

BRP:12.5 mT

Open Drain

Output

-40°C to 170°C

Table 1-1 Ordering Information

Product Name Product Type Ordering Code Package

TLE4964-1K Unipolar Hall Switch SP000848000 PG-SC59-3-5

TLE4964-1K

Functional Description

Data Sheet 8 Revision 1.0, 2012-05-15

2 Functional Description

2.1 General

The TLE4964-1K is an integrated Hall effect switch designed specifically for highly accurate applications with

superior supply voltage capability, operating temperature range and temperature stability of the magnetic

thresholds.

2.2 Pin Configuration (top view)

Figure 2-1 Pin Configuration and Center of Sensitive Area

2.3 Pin Description

Table 2-1 Pin Description PG-SC59-3-5

Pin No. Symbol Function

1 VDD Supply voltage

2 Q Output

3 GND Ground

Center of

Sensitive Area

1.5

±0.1

SC59

0.8

±0.1

TLE4964-1K

Functional Description

Data Sheet 9 Revision 1.0, 2012-05-15

2.4 Block Diagram

Figure 2-2 Functional Block Diagram TLE4964-1K

2.5 Functional Block Description

The chopped Hall IC switch comprises a Hall probe, bias generator, compensation circuits, oscillator and output

transistor.

The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize the

temperature behavior and reduce influence of technology variations.

The active error compensation (chopping technique) rejects offsets in the signal path and the influence of

mechanical stress to the Hall probe caused by molding and soldering processes and other thermal stress in the

package. The chopped measurement principle together with the threshold generator and the comparator ensures

highly accurate and temperature stable magnetic thresholds.

The output transistor has an integrated overcurrent and overtemperature protection.

Voltage

Regulator

Bias and

Compensation

Circuits

Oscillator and

Sequencer

To All Subcircuits

Spinning Hall

Probe

Chopper

Multiplexer

Amplifier

Demodulator

Low Pass

Filter

Comparator

with

Hysteresis

Control

Overtemperature

& overcurrent

protection

GND

Reference

TLE4964-1K

Functional Description

Data Sheet 10 Revision 1.0, 2012-05-15

Figure 2-3 Timing Diagram TLE4964-1K

Figure 2-4 Output Signal TLE4964-1K

Applied

Magnetic

Field

90%

10%

TLE4964-1K

Functional Description

Data Sheet 11 Revision 1.0, 2012-05-15

2.6 Start-up behavior

The magnetic threshold exhibit a hysteresis BHYS = BOP-BRP. In case of a power-on with a magnetic field B within

hysteresis (BRP < B < BOP) the output of the sensor is set to “HIGH” per default. After the first crossing of BOP or

BRP of the magnetic field the output is set to the correct value.

Figure 2-5 Illustration of the start-up behavior of the TLE4964-1K

B > B

B < B

> B > B

Magnetic field above threshold

Magnetic field below threshold

Magnetic field in hysteresis

Power on ramp The device always applies

level at start -up

independent from the

applied magnetic field !

Pon

TLE4964-1K

Specification

Data Sheet 12 Revision 1.0, 2012-05-15

3 Specification

3.1 Application Circuit

The following Figure 3-1 shows one option of an application circuit. As explained above the resistor RS can be left

out (see Figure 3-2). The resistor RQ has to be in a dimension to match the applied VS to keep IQ limited to the

operating range of maximum 25 mA.

e.g.:

VS = 12 V

IQ = 12 V/1200 Ω = 10 mA

Figure 3-1 Application Circuit 1: with external resistor

Figure 3-2 Application Circuit 2: without external resistor

TLE496x

GND

= 1.2kΩ

= 47nF

TVS diode

e.g. ESD24VS2U

= 100Ω

TLE496x

GND

= 1.2kΩ

= 47nF

TVS diode

e.g. ESD24VS2U

TLE4964-1K

Specification

Data Sheet 13 Revision 1.0, 2012-05-15

3.2 Absolute Maximum Ratings

Attention: Stresses above the max. values listed here may cause permanent damage to the device.

Exposure to absolute maximum rating conditions for extended periods may affect device

reliability. Maximum ratings are absolute ratings; exceeding only one of these values may

cause irreversible damage to the integrated circuit.

Calculation of the dissipated power PDIS and junction temperature TJ of the chip (SC59 example):

e.g for: VDD = 12 V, IS = 2.5 mA, VQSAT = 0.5 V, IQ = 20 mA

Power dissipation: PDIS = 12 V x 2.5 mA + 0.5 V x 20 mA = 30 mW + 10 mW = 40 mW

Temperature ∆T = RthJA x PDIS = 300 K/W x 40 mW = 12 K

For TA = 150 °C: TJ = TA + ∆T = 150 °C + 12 K = 162 °C

Table 3-1 Absolute Maximum Rating Parameters

Parameter Symbol Values Unit Note / Test Condition

Min. Typ. Max.

Supply voltage VDD -18 32

10h, no external resistor required

Output voltage VQ-0.5 32 V

Reverse output current IQ-70 mA

Junction temperature1)

1) This lifetime statement is an anticipation based on an extrapolation of Infineon’s qualification test results. The actual lifetime

of a component depends on its form of application and type of use etc. and may deviate from such statement. The lifetime

statement shall in no event extend the agreed warranty period.

TJ-40 155

165

175

195

°C for 2000h (not additive)

for 1000h (not additive)

for 168h (not additive)

for 3 x 1h (additive)

Storage temperature TS-40 150 °C

Thermal resistance

Junction ambient

RthJA 300 K/W for PG-SC59-3-5 (2s2p)

Thermal resistance

Junction lead

RthJL 100 K/W for PG-SC59-3-5

Table 3-2 ESD Protection1) (TA = 25°C)

1) Characterization of ESD is carried out on a sample basis, not subject to production test.

Parameter Symbol Values Unit Note / Test Condition

Min. Typ. Max.

ESD voltage (HBM)2)

2) Human Body Model (HBM) tests according to EIA/JESD22-A114.

VESD -7 7 kV R = 1.5 kΩ, C = 100 pF

ESD voltage (SDM)3)

3) Socket device model (SDM) tests according to EOS/ESD-DS5.3-1993.

-1 1

ESD voltage (system level)4)

4) Gun test (2kΩ / 330pF or 330Ω / 150pF) according to ISO 10605-2008.

-15 15 with circuit shown in

Figure 3-1 & Figure 3-2

TLE4964-1K
Specification
    
   Data Sheet 14 Revision 1.0, 2012-05-15
   
3.3 Operating Range
The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4964-1K.
All parameters specified in the following sections refer to these operating conditions unless otherwise mentioned.
3.4 Electrical and Magnetic Characteristics
Product characteristics involve the spread of values guaranteed within the specified voltage and ambient
temperature range. Typical characteristics are the median of the production and correspond to VDD = 12 V and
TA = 25°C. The below listed specification is valid in combination with the application circuit shown in Figure 3-1
and Figure 3-2
Table 3-3 Operating Conditions Parameters
Parameter Symbol Values Unit Note / Test Condition
Min. Typ. Max.
Supply voltage VDD 3.0 321)
1) Latch-up test with factor 1.5 is not covered. Please see max ratings also.
V
Output voltage VQ-0.3 32 V
Junction temperature Tj-40 170 °C
Output current IQ025mA
Magnetic signal input frequency2)
2) For operation at the maximum switching frequency the magnetic input signal must be 1.4 times higher than for static fields.
This is due to the -3dB corner frequency of the internal low-pass filter in the signal path.
fSW 010kHz
Table 3-4 General Electrical Characteristics
Parameter Symbol Values Unit Note / Test Condition
Min. Typ. Max.
Supply current IS1.11.62.5mA
Reverse current ISR 0.05 1 mA for VDD = -18 V
Output saturation 
voltage
VQSAT 0.2 0.5 V IQ = 20 mA
0.24 0.6 V IQ = 25 mA
Output leakage 
current
IQLEAK 10 μA
Output current 
limitation
IQLIMIT 30 56 70 mA internally limited & thermal 
shutdown
Output fall time1)
1) Not subject to production test, verified by design/characterization.
tf0.17 0.4 1 μs1.2kΩ / 50 pF, see Figure 2-3
Output rise time1) tr0.4 0.5 1 μs1.2kΩ / 50 pF, see Figure 2-3
Output jitter1)2)
2) Output jitter is the 1σ value of the output switching distribution.
tQJ 0.35 1 μs For square wave signal with 1 kHz
Delay time1)3)
3) Systematic delay between magnetic threshold reached and output switching.
td12 15 30 μssee Figure 2-3
Power-on time1)4)
4) Time from applying VDD = 3.0 V to the sensor until the output is valid.
tPON 80 150 μsV
DD =3V,B≤BRP -0.5mTor
B≥BOP +0.5mT
Chopper frequency1) fOSC 350 kHz

TLE4964-1K

Specification

Data Sheet 15 Revision 1.0, 2012-05-15

Field Direction Definition

Positive magnetic fields are defined with the south pole of the magnet to the branded side of package.

Figure 3-3 Definition of magnetic field direction PG-SC59-3-5

Table 3-5 Magnetic Characteristics

Parameter Symbol T (°C) Values Unit Note / Test

Condition

Min. Typ. Max.

Operating point BOP -40 13.5 19.4 25.3 mT

25 12.5 18.0 23.5

170 10.2 14.9 19.6

Release point BRP -40 9.1 13.5 17.9 mT

25 8.4 12.5 16.6

170 6.7 10.3 13.9

Hysteresis BHYS -40 4.4 5.9 8.0 mT

25 4.1 5.5 7.5

170 3.4 4.6 6.3

Effective noise value of the

magnetic switching points1)

1) The magnetic noise is normal distributed and can be assumed as nearly independent to frequency without sampling noise

or digital noise effects. The typical value represents a the rms-value and corresponds therefore to a 1 σ probability of

normal distribution. Consequently a 3 σ value corresponds to 99.7% probability of appearance.

BNeff 25 62 μT

Temperature compensation of

magnetic thresholds2)

2) Not subject to production test, verified by design/characterization.

TC-1200 ppm/K

Branded Side

TLE4964-1K

Specification

Data Sheet 16 Revision 1.0, 2012-05-15

3.5 Electro Magnetic Compatibility

Characterization of Electro Magnetic Compatibility is carried out on a sample basis from one qualification lot. Not

all specification parameters have been monitored during EMC exposure.

Figure 3-4 EMC test circuit

Ref: ISO 7637-2 (Version 2004), test circuit Figure 3.4 (with external resistor, RS = 100 Ω)

Ref: ISO 7637-2 (Version 2004), test circuit Figure 3.4 (without external resistor, RS = 0Ω)

Table 3-6 Magnetic Compatibility

Parameter Symbol Level / Type Status

Testpulse 1

Testpulse 2a1)

Testpulse 2b

Testpulse 3a

Testpulse 3b

Testpulse 42)

Testpulse 5b3)

1) ISO 7637-2 (2004) describes internal resistance = 2 Ω (former 10 Ω).

2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V +/- 0.2 V.

3) A central load dump protection of 42 V is used. Us* = 42 V-13.5 V.

VEMC -100 V

60 V/110 V

10 V

-150 V

100 V

-7 V / -5.5 V

US = 86.5 V / US* = 28.5 V

A/C

Table 3-7 Electro Magnetic Compatibility

Parameter Symbol Level / Type Status

Testpulse 1

Testpulse 2a1)

Testpulse 2b

Testpulse 3a

Testpulse 3b

Testpulse 42)

Testpulse 5b3)

1) ISO 7637-2 (2004) describes internal resistance = 2 Ω (former 10 Ω).

2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V +/- 0.2 V.

3) A central load dump protection of 42 V is used. Us* = 42 V-13.5 V.

VEMC -50 V

50 V

10 V

-150 V

100 V

-7 V / 5.5 V

US = 86.5 V / US* = 28.5 V

TLE496x

GND

= 1.2kΩ

= 10nF

+5V

TLE4964-1K

Package Information

Data Sheet 17 Revision 1.0, 2012-05-15

4 Package Information

The TLE4964-1K is available in the halogen free SMD package PG-SC59-3-5 with a SOT23 like pinout and

footprint.

4.1 Package Outline PG-SC59-3-5

Figure 4-1 PG-SC59-3-5 Package Outline (All dimensions in mm)

4.2 Packing Information PG-SC59-3-5

Figure 4-2 Packing of the PG-SC59-3-5 in a tape

3x0.4

+0.05

-0.1 M

0.1

0.95

(0.55)

3±0.1

+0.2

2.8

-0.1

0.15 MAX.

1.1

±0.1

0.2

+0.1

-0.05

0.15

0˚...8˚ MAX.

GPS09473

0.45

±0.15

+0.15

-0.3

1.6

0.1

SC59-TP V04

3.18

3.28

0.2

1.32

Pin 1

TLE4964-1K

Package Information

Data Sheet 18 Revision 1.0, 2012-05-15

4.3 Footprint PG-SC59-3-5 and PG-SOT23-3-15

Figure 4-3 Footprint PG-SC59-3-5 and PG-SOT23-3-15

4.4 PG-SC59-3-5 Distance between Chip and Package

Figure 4-4 Distance between chip and package

4.5 Package Marking

Figure 4-5 Marking of TLE4964-1K

Reflow Soldering Wave Soldering

0.8

1.2

0.9 1.3 0.9

0.8

1.2

1.6 1.4 min1.4 min

Branded Side

d: Distance chip to upper side of IC

SC59: 0.515

±0 .05

Year (y) = 0...9

Month (m) = 1...9,

o - October

n - November

d - December

y m

H41

TLE4964-1K

Graphs of the Magnetic Parameters

Data Sheet 19 Revision 1.0, 2012-05-15

5 Graphs of the Magnetic Parameters

Figure 5-1 Operating Point (BOP) of the TLE4964-1K over Temperature

Figure 5-2 Release Point (BRP) of the TLE4964-1K over Temperature

Figure 5-3 Hysteresis (BHys) of the TLE4964-1K over Temperature

BOP[mT]

Typ

Min

50,00 0,00 50,00 100,00 150,00

TA[°C]

Max

BRP[mT]

Typ

Min

50,00 0,00 50,00 100,00 150,00

TA[°C]

Max

BHys[mT]

Typ

Min

50,00 0,00 50,00 100,00 150,00

TA[°C]

Max

TLE4964-1K

Graphs of the Electrical Parameters

Data Sheet 20 Revision 1.0, 2012-05-15

6 Graphs of the Electrical Parameters

Figure 6-1 Power On Time tPON of the TLE4964-1K over Temperature

Figure 6-2 Signal Delay Time of the TLE4964-1K over Temperature

tPON_max [μs]

50 30 10 10 30 50 70 90 110 130 150

T[°C]

14,5

15,5

tD[µs]

3V 12V

12,5

13,5

-50 -30 -10 10 30 50 70 90 110 130 150

T [°C]

TLE4964-1K

Graphs of the Electrical Parameters

Data Sheet 21 Revision 1.0, 2012-05-15

Figure 6-3 Supply Current of the TLE4964-1K over Temperature

Figure 6-4 Supply Current of the TLE4964-1K over Supply Voltage

1,4

1,5

1,6

1,7

1,8

1,9

IS[mA]

Vs=3V

Vs=12V

Vs=32V

1,1

1,2

1,3

-50 -30 -10 10 30 50 70 90 110 130 150

T [°C]

Vs=42V

1,4

1,5

1,6

1,7

1,8

1,9

IS[mA]

-40°C

25°C

150°C

1,1

1,2

1,3

0 5 10 15 20 25 30 35 40 45

VS[V]

TLE4964-1K

Graphs of the Electrical Parameters

Data Sheet 22 Revision 1.0, 2012-05-15

Figure 6-5 Output Current Limit of the TLE4964-1K over Temperature

Figure 6-6 Output Current Limit of the TLE4964-1K over applied Pull-up Voltage

Figure 6-7 Output Fall Time of the TLE4964-1K over Temperature

57,0

58,0

59,0

60,0

61,0

62,0

63,0

IQLIMIT [mA]

12V

32V

54,0

55,0

56,0

5030101030507090110130150

T[°C]

57,0

58,0

59,0

60,0

61,0

62,0

63,0

IQLIMIT [mA]

40

150

54,0

55,0

56,0

0 5 10 15 20 25 30 35

VQ[V]

400

500

600

700

tf[ns]

12V

100

200

300

-50-30-101030507090110130150

T [°C]

32V

TLE4964-1K

Graphs of the Electrical Parameters

Data Sheet 23 Revision 1.0, 2012-05-15

Figure 6-8 Output Fall Time of the TLE4964-1K over applied Pull-up Voltage

Figure 6-9 Output Rise Time of the TLE4964-1K over Temperature

Figure 6-10 Output Rise Time of the TLE4964-1K over applied Pull-up Voltage

400

500

600

700

tf[ns]

-40°C

25°C

100

200

300

0 5 10 15 20 25 30 35

VQ[V]

150°C

500

600

700

tr[ns]

12V

300

400

-50 -30 -10 10 30 50 70 90 110 130 150

T [°C]

32V

400

500

600

700

tf[ns]

-40°C

25°C

100

200

300

0 5 10 15 20 25 30 35

VQ[V]

150°C

TLE4964-1K

Graphs of the Electrical Parameters

Data Sheet 24 Revision 1.0, 2012-05-15

Figure 6-11 Output Leakage Current of the TLE4964-1K over Temperature

Figure 6-12 Saturation Voltage of the TLE4964-1K over Temperature

Figure 6-13 Saturation Voltage of the TLE4964-1K over Output Current

0,1

QLEAK [µA]

32V

0,001

0,01

80 90 100 110 120 130 140 150 160 170 180

T [°C]

150

200

250

300

350

400

QSAT

[mV]

10mA

15mA

20mA

100

-50 -30 -10 10 30 50 70 90 110 130 150

T [°C]

25mA

150

200

250

300

350

400

QSAT

[mV]

-40°C

25°C

150°C

100

8 101214161820222426

[mA]

TLE4964-1K

Graphs of the Electrical Parameters

Data Sheet 25 Revision 1.0, 2012-05-15

Figure 6-14 Effective Noise of the TLE4964-1K Thresholds over Temperature

Figure 6-15 Output Signal Jitter of the TLE4964-1K over Temperature

100

110

120

eff [µT(rms)]

12V

-50 -30 -10 10 30 50 70 90 110 130 150

T [°C]

0,4

0,5

0,6

0,7

0,8

QJ [µs(rms)]

12V

0,1

0,2

-50-30-101030507090110130150

T [°C]

Published by Infineon Technologies AG