1996 Microchip Technology Inc. DS11173E-page 1
27C512A
FEATURES
High speed performance
CMOS Technology for low power consumption
- 25 mA Active current
- 30
µ
A Standby current
Factory programming available
Auto-insertion-compatible plastic packages
Auto ID aids automated programming
High speed express programming algorithm
Organized 64K x 8: JEDEC standard pinouts
- 28-pin Dual-in-line package
- 32-pin PLCC Package
- 28-pin SOIC package
- 28-pin TSOP package
- 28-pin VSOP package
- Tape and reel
Data Retention > 200 years
Available for the following temperature ranges
- Commercial: 0˚C to +70˚C
- Industrial: -40˚C to +85˚C
- Automotive: -40˚C to +125˚C
DESCRIPTION
The Microchip Technology Inc. 27C512A is a CMOS
512K bit electrically Programmable Read Only Memory
(EPROM). The device is organized into 64K words by
8 bits (64K bytes). Accessing individual bytes from an
address transition or from power-up (chip enable pin
going low) is accomplished in less than 90 ns. This
very high speed device allows the most sophisticated
microprocessors to run at full speed without the need
for WAIT states. CMOS design and processing enables
this part to be used in systems where reduced power
consumption and high reliability are requirements.
A complete family of packages is of fered to provide the
most flexibility in applications. For surface mount appli-
cations, PLCC, VSOP, TSOP or SOIC packaging is
available. Tape or reel packaging is also available for
PLCC or SOIC packages.
PACKAGE TYPES
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
VSS
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
A6
A5
A4
A3
A2
A1
A0
NC
O0
A8
A9
A11
NC
OE/VPP
A10
CE
O7
O6
A7
A12
A15 
NU
Vcc
A14
A13
O1
O2
V 
NU
O3
O4
O5
SS
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14
15
16
17
18
19
20
4
3
2
1
32
31
30
OE/VPP
A11
A9
A8
A13
A14
VCC
A15
A12
A7
A6
A5
A4
A3
A10
CE
D7
D6
D5
D4
D3
VSS
D2
D1
D0
A0
A1
A2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
21
20
19
VSS
O2
14
13
12
OE/VPP
A11
A9
A8
22
23
24
A15
A12
A7
1
2
3
4
5
25
26
27
28
6
7
A13
A14
VCC
A6
A5
A4
A3
O7 
O6
O5
O4
O3
O1 
O0
A0
A1
A2
18
17
16
15
11
10
9
8
TSOP
27C512A
PLCC
DIP/SOIC
VSOP
27C512A
27C512A 27C512A
512K (64K x 8) CMOS EPROM
This document was created with FrameMaker404
27C512A
DS11173E-page 2
1996 Microchip Technology Inc.
1.0 ELECTRICAL CHARA CTERISTICS
1.1 Maximum Ratings*
V
CC
and input voltages w.r.t. V
SS
........-0.6V to +7.25V
V
PP
voltage w.r.t. V
SS
during
programming.........................................-0.6V to +14V
Voltage on A9 w.r.t. V
SS
......................-0.6V to +13.5V
Output voltage w.r.t. V
SS
............... -0.6V to V
CC
+1.0V
Storage temperature ..........................-65˚C to +150˚C
Ambient temp. with power applied .....-65˚C to +125˚C
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
TABLE 1-1: PIN FUNCTION TABLE
Name Function
A0-A15 Address Inputs
CE Chip Enable
OE/V
PP
Output Enable/Programming Voltage
O0 - O7 Data Output
V
CC
+5V Power Supply
V
SS
Ground
NC No Connection; No Internal Connec-
tion
NU Not Used; No External Connection is
Allowed
TABLE 1-2: READ OPERATION DC CHARACTERISTICS
V
CC
= +5V
±
10%
Commercial: Tamb = 0˚C to +70˚C
Industrial: Tamb = -40˚C to +85˚C
Extended (Automotive): Tamb = -40˚C to +125˚C
Parameter Part* Status Symbol Min Max Units Conditions
Input Voltages all Logic "1"
Logic "0" V
IH
V
IL
2.0
-0.5 V
CC
+1
0.8 V
V
Input Leakage all I
LI
-10 10
µ
AV
IN
= 0 to V
CC
Output Voltages all Logic "1"
Logic "0" V
OH
V
OL
2.4 0.45 V
VI
OH
= - 400
µ
A
I
OL
= 2.1 mA
Output Leakage all I
LO
-10 10
µ
AV
OUT
= 0V to V
CC
Input Capacitance all C
IN
6 pF V
IN
= 0V; Tamb = 25
°
C;
f = 1 MHz
Output Capacitance all C
OUT
—12pFV
OUT
= 0V; Tamb = 25
°
C;
f = 1 MHz
Power Supply Current,
Active C
I, E TTL input
TTL input I
CC
I
CC
25
35 mA
mA V
CC
= 5.5V
f = 1 MHz;
OE/V
PP
= CE = V
IL
;
I
OUT
= 0 mA;
V
IL
= -0.1 to 0.8V;
V
IH
= 2.0 to V
CC
;
Note 1
Power Supply Current,
Standby C
I, E
all
TTL input
TTL input
CMOS input
I
CC
(
S
)
TLL
I
CC
(
S
)
TLL
I
CC
(
S
)
CMOS
1
2
30
mA
mA
µ
ACE
= Vcc
±
0.2V
* Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.
1996 Microchip Technology Inc. DS11173E-page 3
27C512A
TABLE 1-3: READ OPERATION AC CHARACTERISTICS
FIGURE 1-1: READ WAVEFORMS
AC Testing Waveform: V
IH
= 2.4V and V
IL
= .45V; V
OH
= 2.0V and V
OL
= 0.8V
Output Load: 1 TTL Load + 100 pF
Input Rise and Fall Times: 10 ns
Ambient Temperature: Commercial: Tamb = 0˚C to +70˚C
Industrial: Tamb = -40˚C to +85˚C
Extended (Automotive): Tamb = -40˚C to +125˚C
Parameter Sym 27C512-90* 27C512-10* 27C512-12 27C512-15 Units Conditions
Min Max Min Max Min Max Min Max
Address to Output
Delay t
ACC
90 100 120 150 ns CE = OE/
V
PP
= V
IL
CE to Output Delay t
CE
90 100 120 150 ns OE/V
PP
=
V
IL
OE to Output Delay t
OE
—40—40—50—60nsCE
= V
IL
OE to Output High
Impedance t
OFF
035035040045ns
Output Hold from
Address, CE or OE/
V
PP
, whichever
occurred first
t
OH
0—0—0—0—ns
*90/10 AC Testing Waveforms: V
IH
= 3.0V and V
IL
= 0V; V
OH
= 1.5V and V
OL
= 1.5V
Output Load: 1 TTL Load + 30 pF
Address
CE
VIH
VIL
VIH
VIL
VIH
VIL
OE
Outputs
O0 - O7
VOH
VOL
Address Valid
tCE(2)
tOE(2)
High Z Valid Output
tACC
(1) tOFF is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE
(3) This parameter is sampled and is not 100% tested.
High Z
tOH
tOFF(1,3)
Notes:
27C512A
DS11173E-page 4
1996 Microchip Technology Inc.
TABLE 1-4: PROGRAMMING DC CHARACTERISTICS
TABLE 1-5: PROGRAMMING AC CHARACTERISTICS
Ambient Temperature: Tamb = 25
°
C
±
5
°
C
V
CC
= 6.5V
±
0.25V, OE/V
PP
= V
H
= 13.0V
±
0.25V
Parameter Status Symbol Min. Max. Units Conditions (See Note 1)
Input Voltages Logic “1”
Logic “0” V
IH
V
IL
2.0
-0.1 V
CC
+1
0.8 V
V
Input Leakage I
LI
-10 10
µ
AV
IN
= 0V to V
CC
Output Voltages Logic “1”
Logic “0” V
OH
V
OL
2.4
0.45 V
VI
OH
= -400
µ
A
I
OL
= 2.1 mA
V
CC
Current, program & verify I
CC2
—35mACE
= V
IL
OE/V
PP
Current, program I
PP2
—25mA
A9 Product Identification V
ID
11.5 12.5 V
Note 1: V
CC
must be applied simultaneously or before V
PP
voltage on OE/VPP and removed simultaneously or after
the VPP voltage on OE/VPP.
for Program, Program Verify AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V
and Program Inhibit Modes Ambient Temperature: 25°C ±5°C
VCC = 6.5V ± 0.25V, OE/VPP = VH = 13.0V ± 0.25 V
Parameter Symbol Min. Max. Units Remarks
Address Set-Up Time tAS 2—µs
Data Set-Up Time tDS 2—µs
Data Hold Time tDH 2—µs
Address Hold Time tAH 0—µs
Float Delay (2) tDF 0 130 ns
VCC Set-Up Time tVCS 2—µs
Program Pulse Width (1) tPW 95 105 µs 100 µs typical
CE Set-Up Time tCES 2—µs
OE Set-Up Time tOES 2—µs
OE Hold Time tOEH 2—µs
OE Recovery Time tOR 2—µs
OE /VPP Rise Time During Programming tPRT 50 ns
Note 1: For express algorithm, initial programming width tolerance is 100 µs ±5%.
2: This parameter is only sampled and not 100% teted. Output float is defined as the point where data is no
longer driven (see timing diagram).
1996 Microchip Technology Inc. DS11173E-page 5
27C512A
FIGURE 1-2: PROGRAMMING WAVEFORMS (1)
TABLE 1-6: MODES
Operation Mode CE OE/VPP A9 O0 - O7
Read VIL VIL XDOUT
Program VIL VHXDIN
Program Verify VIL VIL XDOUT
Program Inhibit VIH VHX High Z
Standby VIH X X High Z
Output Disable VIL VIH X High Z
Identity VIL VIL VHIdentity Code
X = Don’t Care
tOPW
tOEH
tCE
(2)
VIH
VIL
VIH
VIL
6.5 V (3)
5.0V
VIH
VIL
Address
Data
VCC
CE
Address Stable
tDS
tAS
Data In Stable Data Out Valid
Verify
tVCS
Notes: The input timing reference level is 0.8V for VIL and 2.0V for VIH.
tDF and tOE are characteristics of the device but must be accommodated by the programmer.
VCC = 6.5V ±0.25V, VPP = VH = 13.0V ±0.5V for express programming algorithm.
(1)
(2)
(3)
tDH
tOR
tDF
(2)
tAH
tPRT
tCES
tPW
tOES
13.0 V (3)
VIL
OE/VPP
Program
1.2 Read Mode
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when
a) the CE pin is low to power up (enable) the chip
b) the OE/VPP pin is low to gate the data to the
output pins
For Read operations, if the addresses are stable, the
address access time (tACC) is equal to the delay from
CE to output (tCE). Data is transferred to the output
after a delay (tOE) from the falling edge of OE/VPP.
27C512A
DS11173E-page 6 1996 Microchip Technology Inc.
1.3 Standby Mode
The standby mode is entered when the CE pin is high,
and the program mode is not identified.
When this conditions are met, the supply current will
drop from 25 mA to 30 µA.
1.4 Output Enable OE/VPP
This multifunction pin eliminates bus connection in mul-
tiple bus microprocessor systems and the outputs go to
high impedance when:
the OE/VPP pin is high (VIH).
When a VH input is applied to this pin, it supplies the
programming voltage (VPP) to the device.
1.5 Erase Mode (UV Windowed Versions)
Windowed products offer the ability to erase the mem-
ory array. The memory matrix is erased to the all “1's”
state as a result of being exposed to ultraviolet light. To
ensure complete erasure, a dose of 15 watt-second/
cm2 is required. This means that the device window
must be placed within one inch and directly underneath
an ultraviolet lamp with a wavelength of 2537 Ang-
stroms, intensity of 12,000 mW/cm2 for approximately
40 minutes.
1.6 Programming Mode
The Express algorithm must be used for best results. It
has been developed to improve programming yields
and throughput times in a production environment. Up
to 10 100-microsecond pulses are applied until the byte
is verified. A flowchart of the Express algorithm is
shown in Figure 1-3.
Programming takes place when:
a) VCC is brought to the proper voltage,
b) OE/VPP is brought to the proper VH level, and
c) CE line is low.
Since the erased state is “1” in the array, programming
of “0” is required. The address to be programmed is set
via pins A0 - A15 and the data to be programmed is pre-
sented to pins O0 - O7. When data and address are
stable, a low going pulse on the CE line programs that
location.
1.7 Verify
After the array has been programmed it must be verified
to ensure all the bits have been correctly programmed.
This mode is entered when all the following conditions
are met:
a) VCC is at the proper level,
b) the OE/VPP pin is low, and
c) the CE line is low.
1.8 Inhibit
When programming multiple devices in parallel with dif-
ferent data, only CE needs to be under separate control
to each device. By pulsing the CE line low on a partic-
ular device, that device will be programmed; all other
devices with CE held high will not be programmed with
the data (although address and data will be available on
their input pins).
1.9 Identity Mode
In this mode specific data is output which identifies the
manufacturer as Microchip Technology Inc. and the
device type. This mode is entered when Pin A9 is taken
to VH (11.5V to 12.5V). The CE and OE/VPP lines must
be at VIL. A0 is used to access any of the two non-eras-
able bytes whose data appears on O0 through O7.
Pin Input Output
Identity A0 0
7O
6O
5O
4O
3O
2O
1O
0
H
e
x
Manufacturer
Device Type* VIL
VIH 0
10
01
00
01
10
10
01
029
0D
* Code subject to change
1996 Microchip Technology Inc. DS11173E-page 7
27C512A
FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM
Start
ADDR = First Location
VCC = 6.5V
VPP = 13.0V
X = 0
Program one 100 µs pulse
Increment X
Verify
Byte Pass
Fail
X = 10 ?
No Yes Device
Failed
Last
Address?
No
Increment Address
Conditions:
Tamb = 25˚C ±5˚C
VCC = 6.5 ±0.25V
VPP = 13.0 ±0.25V
Yes
VCC = VPP = 4.5V, 5.5V
Device
Passed
All
bytes
= original
data?
Device
Failed
NoYes
27C512A
DS11173E-page 8 1996 Microchip Technology Inc.
NOTES:
1996 Microchip Technology Inc. DS11173E-page 9
27C512A
NOTES:
27C512A
DS11173E-page 10 1996 Microchip Technology Inc.
NOTES:
27C512A
1996 Microchip Technology Inc. DS11173E-page 11
27C512A Product Identification System
To order or to obtain information (e.g., on pricing or delivery),, please use listed part numbers, and refer to factory or listed sales offices.
Package: L = Plastic Leaded Chip Carrier
P = Plastic DIP (600 Mil)
SO = Plastic SOIC (300 Mil)
TS = Thin Small Outline Package(TSOP) 8x20mm
VS = Very Small Outline Package(VSOP) 8x13.4mm
Temperature Blank = 0˚C to +70˚C
Range: I= -40˚C to +85˚C
E = -40˚C to +125˚C
Access 90 = 90 ns
Time: 10 = 100 ns
12 = 120 ns
15 = 150 ns
Device: 27C512A 512K (64K x 8) CMOS EPROM
27C512A 70 I /P
DS11173E-page 12 1996 Microchip Technology Inc.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. No repre-
sentation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement
of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not autho-
rized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and
name are registered trademarks of Microchip Technology Inc. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.
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