32-bit high performance
ARM7TDMI RISC processor
Integral 10/100BaseT
Ethernet MAC
4KB unified instruction/data
cache
Large 2KB Rx buffer for
reliable network performance
Patented 10-channel DMA
controller
Includes complete, production-
ready NET+Works networking
software and comprehensive
development support
Complete scalability through-
out the product line with pin
and software compatibility
Run-time binary license for
NetSilicon’s NET+OSor
Wind River’s pSOS+RTOS
included at no additional cost
Complete software and
hardware for networking
electronic devices
Dramatic time to market
reductions
Reduce your product unit costs
Save your engineering
resources
No networking development
No long-term support
needed
Performance tuned
Fully integrated solution
Production ready now
MII
Interface
• 8 Internal
• 2 External
Asynchronous
and
Synchronous
Serial Data
and Control
1284
Interface
Crystal
General Purpose
TTL Input/Output
• 28-Bit Address
• 32-Bit Data
• 8, 16 and 32-Bit Support
NET+40 Processor Block Diagram
Shared 64K RAM Interface for Use
in Dual Processor Applications
Supports:
• ROM
• Flash
• EEPROM
• SRAM
• SDRAM
• FP/EDO DRAM
• 256MByte Address Space
32-Bit
ARM7TDMI
RISC
Processor
with
4KB Cache
NetSilicon, Inc. • 411 Waverley Oaks Road #227 • Waltham, MA 02452 • (800) 243-2333 • Tel: (781) 647-1234 • Fax: (781) 893-1338 • info@netsilicon.com • www.netsilicon.com
24 General
Purpose
I/O Pins
External
Bus
Interface
10 Channel
DMA
Controller
2 Serial
Ports
1284
Ports
Timers/
Counters
Programmable
Memory
Controller
Interrupt
Controller
Clock
Generator
Integral
10/100
Ethernet MAC
Features
Benefits
ENI
Co-Processor
Interface
!
Embedded Ethernet/Internet-Ready Processor
NET+40 !
The NetSilicon NET+40is a high-performance,
highly integrated 32-bit microprocessor designed for use
in intelligent networked devices and Internet appliances.
It includes an ARM7TDMI core, integral 10/100BaseT
Ethernet MAC with an MII interface, patented
10-channel DMA controller and a sophisticated
memory controller supporting all of the popular
memory devices in use today.
The NET+40 is part of the award-winning NET+ARM
family of networked microprocessors. This family
provides scalability and pin-for-pin compatibility over
a broad performance range. NET+ARM microprocessors
are the hardware core of the NET+Worksplatform
of highly integrated and tested solutions for adding
intelligence and connectivity to electronic devices.
NetSilicon has made every effort to ensure that the information contained herein is accurate, and is not responsible for inadvertent
errors. Specifications are subject to change without notice. The NetSilicon logo, NET+40, NET+Works and NET+OS are trademarks
of NetSilicon, Inc. NET+ARM is a trademark of ARM Limited and is exclusively sublicensed to NetSilicon, Inc. pSOS+ and pRISM+
are trademarks and VxWorks is a registered trademark of Wind River Systems, Inc. All other trademarks are the property of their
respective owners. © 2000 NetSilicon, Inc. 1000/M224
www.netsilicon.com
32-Bit ARM7TDMI RISC Processor
Full 32-bit ARM mode
15 general-purpose 32-bit registers
32-bit program counter and status
register
5 supervisor modes, 1 user mode
One-Chip Cache
4K unified instruction/data cache
4-way set associative
Lockable entries
Write through/copy back
Integral 10/100 Ethernet MAC
10/100Mbit MII based PHY interface
10Mbit ENDEC interface
Supports TP-PMD and fiber-PMD
devices
Full duplex
Optional 4B/5B scrambling
Full statistics gathering (SNMP and
RMON)
Station, broadcast, multicast address
detection and filtering
128 byte transmit FIFO
2K byte receive FIFO
Intelligent receive side buffer selection
External CAM filtering
10-Channel DMA Controller
2 dedicated to Ethernet
transmit/receive
4 dedicated to serial transmit/receive
2 dedicated to P1284 interface
Flexible buffer management
2 channels configurable for external
peripherals
Serial Ports
2 fully independent HDLC/UART/SPI
serial ports
32 byte transmit/receive FIFOs
Internal programmable bit-rate
generators
Bit rates from 75 – 230400: 16X mode
Bit rates from 1200 – 4Mbps: 1X mode
Odd, even, or no parity
5,6,7 or 8 bits
1 or 2 stop bits
Both internal & external clock support
Receive side character and buffer gap
timers
4 receive side data match detectors
Bus Interface
5 independent programmable chip
selects
Supports 8-, 16-, 32-bit peripherals
Supports external address decoding
and cycle termination
Supports dynamic bus sizing
Supports ASYNC and SYNC
peripheral timing
All chip selects support SRAM,
FP/EDO DRAM, SDRAM, Flash,
EEPROM without external glue logic
Internal DRAM address multiplexing
Internal refresh controller (CAS before
RAS)
256Mbyte addressing per chip select
Burst-mode support
0-15 wait states per chip select
Bootstrap support
External bus master support
Internal or external bus arbiters
P1284/ENI Interface
4 IEEE 1284 parallel ports
64K shared RAM ENI interface
(8 or 16-bit)
Full duplex FIFO mode interface
(8 or 16-bit)
32 byte transmit/receive FIFOs
Timers
Two independent 26-bit
programmable timers
Programmable watch-dog timer
(interrupt or reset on expiration)
Programmable bus timer
General Purpose I/O
Up to 24 programmable I/O pins
4 pins with programmable interrupt
Clock Generator
Simple external crystal
On-board programmable phase lock
loop
Supports direct external clock input
Package
208-pin PQFP, 0.020 inch (0.5 mm)
pitch
Other
Operating voltage:
3.0 – 3.6V
Industrial temperature range
(-40ºC – 85ºC)
Development Support
Hardware Specifications
NET+Works Development Systems
NET+ARM microprocessors are the
hardware core of the NET+Works
platform of highly integrated and tested
solutions for adding intelligence and
connectivity to electronic devices.
NetSilicon offers a variety of options
to support different application
environments.
NET+OS Complete Development
System
For deeply embedded applications
requiring real-time performance
and small code footprints. Includes:
Thread-X RTOS
Green HillsMULTI 2000 IDE
NET+Works suite of drivers, protocols
and services
NET+ARM Drivers (10/100 BaseT
Ethernet MAC, Serial – UART,
HDLC, DMA, Interrupt Controller,
FLASH memory)
Networking Protocols (TCP/IP,
UDP, PING, RARP, PPP, IGMP,
Telnet)
Networking Services, with APIs
(HTTP v1.1 Client and Server,
POP3 and SMTP Email, FTP
Client and Server, SNMP MIBII
and proxy agent, BOOTP, DHCP
& DNS)
NET+ARM-based software
development board
NetSilicon-supplied utilities
Compile and load HTML into C
and firmware
Network downloading of on-board
FLASH memory
Automated build environment
NVRAM device manager
Raven hardware debugger
1 year software maintenance and
technical support
Hardware design review
Development System training at
NetSilicon
NET+Lx Embedded Linux Development
System
A complete embedded Linux platform for
Internet Appliances. The system includes:
uClinux kernel
Networking protocols (IP, UDP, TCP)
Certified networking applications
(HTTPD Web Server, Pump DHCP
Client, SMTP Client, Telnet Server,
Anonymous FTP Server, FTP Client)
NET+ARM-based software
development board
GNU Compiler Collection (GCC)
toolset, including:
gcc GNU Compiler Collection
gdb – GNU Debugger
ddd – Data Display Debugger
binutils – Binary Utilities
NET+Works Standard Development
System
Offers BSP-level support for Wind River’s
pSOS+and VxWorks®real-time RTOSs.
The system includes:
NET+Works networking software suite
NET+ARM-based software
development board
1 year software maintenance and
technical support
Hardware design review
Development System training at
NetSilicon
Third Party Tools
Wind River’s pRISM+graphical
development environment for pSOS+
Wind River’s Tornado development
environment for VxWorks
JTAG port In Circuit Emulation (ICE)