Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M High-Speed 10 MBit/s Logic Gate Optocouplers Features Description The 6N137M, HCPL2601M, HCPL2611M single-channel and HCPL2630M, HCPL2631M dual-channel optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output. This output features an open collector, thereby permitting wired OR outputs. The switching parameters are guaranteed over the temperature range of -40C to +85C. A maximum input signal of 5 mA will provide a minimum output sink current of 13 mA (fan out of 8). Very High Speed - 10 MBit/s Superior CMR - 10 kV/s Fan-out of 8 Over -40C to +85C Logic Gate Output Strobable Output Wired OR-open Collector U.L. Recognized (File # E90700, Vol. 2) Applications Ground Loop Elimination LSTTL to TTL, LSTTL or 5 V CMOS Line Receiver, Data Transmission Data Multiplexing Switching Power Supplies Pulse Transformer Replacement Computer-peripheral Interface An internal noise shield provides superior common mode rejection of typically 10 kV/s. The HCPL2601M and HCPL2631M has a minimum CMR of 5 kV/s. The HCPL2611M has a minimum CMR of 10 kV/s. Schematics Package Outlines 8 VCC N/C 1 8 8 8 VCC + 1 1 1 VF1 + 2 7 VE _ 2 6 VO _ 7 V01 VF _ 8 3 V 5 GND N/C 4 6 V02 3 1 Figure 2. Package Options F2 5 GND + 4 6N137M HCPL2601M HCPL2611M 8 1 HCPL2630M HCPL2631M (Preliminary) Truth Table (Positive Logic) Input Enable Output H H L L H H H L H A 0.1F bypass capacitor must be connected between pins 8 and 5(1). L L H H NC L Figure 1. Schematics L NC H (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers April 2013 As per DIN_EN/IEC 60747-5-2. This optocoupler is suitable for "safe electrical insulation" only within the safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits. Symbol Parameter Min. Typ. Max. Unit Installation Classifications per DIN VDE 0110/1.89 Table 1 For Rated Mains Voltage < 150 VRMS I-IV For Rated Mains Voltage < 300 VRMS I-IV For Rated Mains Voltage < 450 VRMS I-III For Rated Mains Voltage < 600 VRMS I-III Climatic Classification 40/100/21 Pollution Degree (DIN VDE 0110/1.89) 2 CTI Comparative Tracking Index 175 VPR Input to Output Test Voltage, Method b, VIORM x 1.875 = VPR, 100% Production Test with tm = 1 s, Partial Discharge < 5 pC 1,669 Input to Output Test Voltage, Method a, VIORM x 1.5 = VPR, Type and Sample Test with tm = 60 s, Partial Discharge < 5 pC 1,335 VIORM Max Working Insulation Voltage 890 VPEAK VIOTM Highest Allowable Over Voltage 6,000 VPEAK 8.0 mm External Creepage External Clearance 7.4 mm 10.16 mm 0.5 mm Case Temperature 150 C Input Current 200 mA Output Power (Duty Factor 2.7%) 300 mW Insulation Resistance at TS, VIO = 500 V 109 External Clearance (for Option T, 0.4" Lead Spacing) Insulation Thickness Safety Limit Values, Maximum Values Allowed in the Event of a Failure TS IS,INPUT PS,OUTPUT RIO (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 2 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Safety and Insulation Ratings for 8-Pin DIP White Symbol Parameter Value Units TSTG Storage Temperature -40 to +125 C TOPR Operating Temperature -40 to +100 C TSOL Lead Solder Temperature 260 for 10 s C mA Emitter IF DC/Average Forward Single Channel 50 Input Current Dual Channel (Each Channel) 30 VE Enable Input Voltage Not to Exceed VCC by more than 500 mV Single Channel 5.5 V VR Reverse Input Voltage Each Channel 5.0 V PI Power Dissipation Single Channel 100 mW Dual Channel (Each Channel) 45 Detector Supply Voltage VCC (1 minute max) 7.0 V 50 mA IO Output Current Dual Channel (Each Channel) 50 VO Output Voltage Each Channel 7.0 V PO Collector Output Single Channel 85 mW Power Dissipation Dual Channel (Each Channel) 60 Single Channel Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Units IFL Input Current, Low Level 0 250 A IFH Input Current, High Level *6.3 15 mA VCC Supply Voltage, Output 4.5 5.5 V VEL Enable Voltage, Low Level 0 0.8 V VEH Enable Voltage, High Level 2.0 VCC V TA Ambient Operating Temperature -40 +85 C N Fan Out (TTL load) 8 *6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less. (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 3 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25C unless otherwise specified. Individual Component Characteristics Symbol Parameter Test Conditions Min. Typ.* Max. Unit 1.8 V EMITTER VF Input Forward Voltage IF = 10 mA BVR Input Reverse Breakdown Voltage IR = 10 A CIN Input Capacitance VF = 0, f = 1 MHz Input Diode Temperature Coefficient IF = 10 mA ICCH High Level Supply Current VCC = 5.5 V, IF = 0 mA, VE = 0.5 V Single Channel 6 10 Dual Channel 10 15 ICCL Low Level Supply Current Single Channel VCC = 5.5 V, IF = 10 mA 8 13 Dual Channel VE = 0.5 V IEL Low Level Enable Current VCC = 5.5 V, VE = 0.5 V IEH High Level Enable Current VCC = 5.5 V, VE = 2.0 V VEH High Level Enable Voltage VCC = 5.5 V, IF = 10 mA TA = 25C VF / TA 1.4 1.75 5.0 V 60 pF -1.4 mV/C DETECTOR VEL Low Level Enable Voltage VCC = 5.5 V, IF = 10 mA mA mA 14 21 -0.7 -1.6 mA -0.5 -1.6 mA 2.0 V (3) 0.8 V Switching Characteristics (TA = -40C to +85C, VCC = 5 V, IF = 7.5 mA unless otherwise specified) Symbol TPLH TPHL AC Characteristics Test Conditions Propagation Delay Time to Output HIGH Level RL = 350 , CL = 15 pF(4) (Fig. 14) Propagation Delay Time to Output LOW Level TA = 25C(5) |TPHL-TPLH| Pulse Width Distortion TA = 25C Min. Typ.* 20 40 Max. Unit 75 ns 100 25 40 RL = 350 , CL = 15 pF (Fig. 14) RL = 350 , CL = 15 pF (Fig. 14) (6) 75 ns 100 1 35 ns tr Output Rise Time (10% to 90%) RL = 350 , CL = 15 pF (Fig. 14) 30 ns tf Output Rise Time (90% to 10%) RL = 350 , CL = 15 pF(7) (Fig. 14) 10 ns tELH Enable Propagation Delay Time to Output HIGH Level IF = 7.5 mA, VEH = 3.5 V, RL = 350 , CL = 15 pF(8) (Fig. 15) 15 ns tEHL Enable Propagation Delay Time to Output LOW Level IF = 7.5 mA, VEH = 3.5 V, RL = 350 , CL = 15 pF(9) (Fig. 15) 15 ns Common Mode Transient Immunity (at Output HIGH Level) TA = 25C, |VCM| = 50 V 6N137M, HCPL2630M (Peak), IF = 0 mA, HCPL2601M, VOH (Min.) = 2.0 V, HCPL2631M RL = 350 (10) (Fig. 16) 10,000 V/s Common Mode Transient Immunity (at Output LOW Level) RL = 350 , IF = 7.5 mA, 6N137M, HCPL2630M VOL (Max.) = 0.8 V, HCPL2601M, TA = 25C(11) (Fig. 16) HCPL2631M |CMH| |VCM| = 400 V |CML| HCPL2611M |VCM| = 400 V (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 HCPL2611M 5000 10,000 10,000 15,000 V/s 10,000 5000 10,000 10,000 15,000 www.fairchildsemi.com 4 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Electrical Characteristics (TA = 0 to 70C unless otherwise specified) Transfer Characteristics (TA = -40 to +85C unless otherwise specified) Symbol DC Characteristics Test Conditions Min. Typ.* Max. Unit 100 A IOH HIGH Level Output Current VCC = 5.5 V, VO = 5.5 V, IF = 250 A, VE = 2.0 V(2) VOL LOW Level Output Current VCC = 5.5 V, IF = 5 mA, VE = 2.0 V, ICL = 13 mA(2) 0.4 0.6 V IFT Input Threshold Current VCC = 5.5 V, VO = 0.6 V, VE = 2.0 V, IOL = 13 mA 3 5 mA Max. Unit 1.0* A Isolation Characteristics (TA = -40C to +85C unless otherwise specified.) Symbol II-O Characteristics Test Conditions Input-Output Insulation Leakage Current Relative humidity = 45%, TA = 25C, t = 5 s, VI-O = 3000 VDC(12) VISO Withstand Insulation Test Voltage RH < 50%, TA = 25C, II-O 10 A, t = 1 min.(12) RI-O Resistance (Input to Output) VI-O = 500 V(12) CI-O Capacitance (Input to Output) f=1 MHz(12) Min. Typ.* 5000 VRMS 1011 1 pF *All Typicals at VCC = 5 V, TA = 25C Notes: 1. The VCC supply to each optoisolator must be bypassed by a 0.1 F capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins of each device. 2. Each channel. 3. Enable Input - No pull up resistor required as the device has an internal pull up resistor. 4. tPLH - Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. 5. tPHL - Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. 6. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 7. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 8. tELH - Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. 9. tEHL - Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. 10. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the HIGH state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/s). 11. CML - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the LOW output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/s). 12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted together. (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 5 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Electrical Characteristics (Continued) For Single-Channel Devices: 6N137M, HCPL2601M, and HCPL2611M IF = 5 mA VE = 2 V VCC = 5.5 V 0.7 IF - FORWARD CURRENT (mA) VOL - LOW LEVEL OUTPUT VOLTAGE (V) 0.8 0.6 IOL = 12.8 mA 0.5 IOL = 16 mA 0.4 0.3 IOL = 6.4 mA IOL = 9.6 mA 0.2 10 1 0.100 0.010 0.1 0.0 -40 -20 0 20 40 60 80 0.001 0.9 100 1.0 1.1 TA - AMBIENT TEMPERATURE (C) Figure 3. Low Level Output Voltage vs. Ambient Temperature 1.4 1.5 1.6 50 IOL - LOW LEVEL OUTPUT CURRENT (mA) VCC = 5 V TA = 25C TP - PROPAGATION DELAY (ns) 1.3 Figure 4. Input Diode Forward Voltage vs. Forward Current 120 100 80 RL = 4 k (tPLH) RL = 350 (tPLH) 60 RL = 1 k (tPLH) 40 RL = 4 k (tPHL) RL = 1 k (tPHL) RL = 350 (tPHL) 20 0 5 7 9 11 13 45 IF = 15 mA 40 IF = 10 mA 35 IF = 5 mA 30 VCC = 5 V VE = 2 V VOL = 0.6 V 25 20 -40 15 -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) IF - FORWARD CURRENT (mA) Figure 5. Switching Time vs. Forward Current Figure 6. Low Level Output vs. Ambient Temperature 6 4.0 VCC = 5 V VE = 2 V VOL = 0.6 V 3.5 5 3.0 VO - OUTPUT VOLTAGE (V) IFT - INPUT THRESHOLD CURRENT (mA) 1.2 VF - FORWARD VOLTAGE (V) RL = 350 2.5 RL = 1 k 2.0 RL = 4 k 1.5 4 RL = 1 k 3 RL = 350 2 RL = 4 k 1 1.0 -40 -20 0 20 40 60 80 0 100 TA - AMBIENT TEMPERATURE (C) 1 2 3 4 5 6 IF - FORWARD CURRENT (mA) Figure 7. Input Threshold Current vs. Ambient Temperature (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 0 Figure 8. Output Voltage vs. Input Forward Current www.fairchildsemi.com 6 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Typical Performance Curves (For Single-Channel Devices: 6N137M, HCPL2601M, HCPL2611M) 500 50 IF = 7.5 mA VCC = 5 V tR / tF - RISE AND FALL TIME (ns) PWD - PULSE WIDTH DISTORTION (ns) 60 40 RL = 4 k 30 20 10 RL = 1 k 0 -10 -40 400 IF = 7.5 mA VCC = 5 V RL = 4 k (tR) 300 200 RL = 1 k (tR) 100 RL = 350 (tR) 0 RL = 4 k (tF) RL = 1 k (tF) RL = 350 (tF) RL = 350 -20 0 20 40 60 80 -100 -40 100 -20 TA - AMBIENT TEMPERATURE (C) 20 40 60 80 100 Figure 10. Rise and Fall Time vs. Temperature 100 100 IF = 7.5 mA VCC = 5 V 90 80 TP - PROPAGATION DELAY (ns) TE - ENABLE PROPAGATION DELAY (ns) Figure 9. Pulse Width Distortion vs. Temperature RL = 4 k (tELH) 60 40 RL = 1 k (tELH) RL = 350 (tELH) 20 RL = 4 k / 1 k / 350 (tEHL) 0 -40 0 TA - AMBIENT TEMPERATURE (C) -20 0 20 40 60 80 RL = 4 k (tPLH) 80 70 60 RL = 1 k (tPLH) 50 RL = 350 (tPLH) 40 RL = 4 k (tPHL) RL = 1 k (tPHL) RL = 350 (tPHL) 30 20 -40 100 IF = 7.5 mA VCC = 5 V -20 TA - AMBIENT TEMPERATURE (C) 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) Figure 11. Enable Propagation Delay vs. Temperature Figure 12. Switching Time vs. Temperature IOH - HIGH LEVEL OUTPUT CURRENT (A) 1.6 1.4 1.2 VCC = 5 V VO = 5.5 V VE = 2 V IF = 250 A 1.0 0.8 0.6 0.4 0.2 0 -40 -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) Figure 13. High Level Output Current vs. Temperature (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 7 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Typical Performance Curves (Continued) 0.8 100 IF = 5 mA VCC = 5.5 V 0.7 IF - FORWARD CURRENT (mA) VOL - LOW LEVEL OUTPUT VOLTAGE (V) For Dual-Channel Devices: HCPL2630M and HCPL2631M 0.6 IOL = 16 mA IOL = 12.8 mA 0.5 0.4 IOL = 9.6 mA IOL = 6.4 mA 0.3 0.2 0.1 0.0 -40 -20 0 20 40 60 80 10 1 0.1 0.01 0.001 0.9 100 1.0 1.1 TA - AMBIENT TEMPERATURE (C) Figure 14. Low Level Output Voltage vs. Ambient Temperature IOL - LOW LEVEL OUTPUT CURRENT (mA) TP - PROPAGATION DELAY (ns) VCC = 5 V TA = 25C RL = 4 k (TPLH) 80 60 RL = 1 k (TPLH) RL = 350 (TPLH ) 40 RL = 1 k RL = 4 k (TPHL) RL = 350 20 0 5 7 9 1.4 1.5 1.6 11 13 15 80 100 50 45 IF = 15 mA IF = 10 mA 40 IF = 5 mA 35 30 VCC = 5 V VOL = 0.6 V 25 20 -40 -20 IF - FORWARD CURRENT (mA) 0 20 40 60 TA - AMBIENT TEMPERATURE (C) Figure 17. Low Level Output Current vs. Ambient Temperature Figure 16. Switching Time vs. Forward Current 6 4 VCC = 5.0 V VOL = 0.6 V VO - OUTPUT VOLTAGE (V) IFT - INPUT THRESHOLD CURRENT (mA) 1.3 Figure 15. Input Diode Forward Voltage vs. Forward Current 120 100 1.2 VF - FORWARD VOLTAGE (V) RL = 350 3 RL = 1 k RL = 4 k 2 5 4 RL = 350 RL = 4 k 3 2 RL = 1 k 1 1 -40 0 -20 0 20 40 60 80 0 100 2 3 4 5 6 Figure 19. Output Voltage vs. Input Forward Current Figure 18. Input Threshold Current vs. Ambient Temperature (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 1 IF - FORWARD CURRENT (mA) TA - AMBIENT TEMPERATURE (C) www.fairchildsemi.com 8 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Typical Performance Curves (Continued) For Dual-Channel Devices: HCPL2630M and HCPL2631M 600 Tr/Tf - RISE AND FALL TIME (ns) PWD - PULSE WIDTH DISTORTION (ns) 80 RL = 4 k 60 IF = 7.5 mA VCC = 5 V 40 20 RL = 1 k 500 IF = 7.5 mA VCC = 5 V 400 RL = 4 k (tr) 300 RL = 1 k RL = 4 k (tf) RL = 350 200 RL = 1 k (tr) 100 RL = 350 (tr) RL = 350 0 -60 -40 -20 0 20 40 60 80 0 -60 100 -40 -20 TA - TEMPERATURE (C) IOH - HIGH LEVEL OUTPUT CURRENT (A) 120 TP - PROPAGATION DELAY (ns) RL = 4 k (TPLH) 100 IF = 7.5 mA VCC = 5 V 80 RL = 1 k (TPLH) RL = 350 (TPLH) 40 20 -60 RL = 1 k RL = 4 k (TPHL) RL = 350 -40 -20 0 20 40 60 80 100 40 60 80 100 1.8 1.6 1.4 VCC = 5.5 V VO = 5.5 V IF = 250 A 1.2 1.0 0.8 0.6 0.4 0.2 0 -60 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE (C) TA - TEMPERATURE (C) Figure 23. High Level Output Current vs. Temperature Figure 22. Switching Time vs. Temperature (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 20 Figure 21. Rise and Fall Time vs. Temperature Figure 20. Pulse Width Distortion vs. Temperature 60 0 TA - TEMPERATURE (C) www.fairchildsemi.com 9 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Typical Performance Curves (Continued) Pulse Generator tr = 5 ns Z O = 50 +5 V IF = 7.5 mA VCC 1 IF = 3.75 mA 8 Input (IF ) 7 Output (VO ) t PHL 2 Input Monitor (I F) .1 F bypass RL Output (VO ) 6 3 CL 47 4 GND tPLH 1.5 V 90% Output (VO ) 10% 5 tf tr Figure 24. Test Circuit and Waveforms for tPLH, tPHL, tr and tf Pulse Generator tr = 5 ns Z O = 50 Input Monitor (V E) +5 V 3.0 V Input (VE ) VCC 1 8 1.5 V t EHL 7.5 mA 7 2 .1 F bypass RL 1.5 V Output (VO ) 6 3 t ELH Output (VO ) CL 4 GND 5 Figure 25. Test Circuit tEHL and tELH (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 10 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Test Circuits VCC IF A 1 8 2 7 3 6 +5 V .1 F bypass 350 B VFF 4 GND Output (VO) 5 VCM Pulse Gen Peak VCM 0V CM H 5V Switching Pos. (A), IF = 0 VO VO (Min) VO (Max) Switching Pos. (B), I F = 7.5 mA VO 0.5 V CM L Figure 26. Test Circuit Common Mode Transient Immunity (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 11 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Test Circuits (Continued) Through Hole 0.4" Lead Spacing (Option TV) (Pending) PIN 1 ID. 4 3 2 PIN 1 ID. 1 4 3 2 1 0.270 (6.86) 0.250 (6.35) 5 6 7 0.270 (6.86) 0.250 (6.35) 8 5 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 7 8 0.390 (9.91) 0.370 (9.40) 0.020 (0.51) MIN 0.200 (5.08) MAX 6 0.156 (3.94) 0.144 (3.68) 0.070 (1.78) 0.045 (1.14) SEATING PLANE SEATING PLANE 0.390 (9.91) 0.370 (9.40) 0.156 (3.94) 0.070 (1.78) 0.144 (3.68) 0.045 (1.14) 0.020 (0.51) MIN 0.200 (5.08) MAX 15 MAX 0.016 (0.40) 0.008 (0.20) 0.154 (3.90) 0.120 (3.05) 0.300 (7.62) TYP 0.100 (2.54) TYP 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 0.031 (0.78) Surface Mount - 0.3" Lead Spacing (Option S) 8-Pin Surface Mount DIP - Land Pattern (Option S) 0.390 (9.91) 0.370 (9.40) 4 3 2 0.070 (1.78) PIN 1 ID. 1 0.060 (1.52) 0.270 (6.86) 0.250 (6.35) 5 6 7 0 to 15 0.400 (10.16) TYP 0.100 (2.54) 8 0.295 (7.49) 0.156 (3.94) 0.144 (3.68) 0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN 0.200 (5.08) MAX 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.415 (10.54) 0.300 (7.62) TYP 0.030 (0.76) 0.016 (0.40) 0.008 (0.20) 0.015 (0.40) MIN Both Sides 0.315 (8.00) MIN 0.405 (10.30) MAX. Note: All dimensions are in inches (millimeters) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 12 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Package Dimensions Option Example Part Number No Suffix 6N137M S 6N137SM SD 6N137SDM Surface Mount; Tape and Reel V 6N137VM DIN_EN/IEC60747-5-2 (VDE) TV 6N137TVM DIN_EN/IEC60747-5-2 (VDE), 0.4" lead spacing SV 6N137SVM DIN_EN/IEC60747-5-2 (VDE), surface mount SDV 6N137SDVM TS 6N137TSM TSV 6N137TSVM TSR2 6N137TSR2M TSR2V 6N137TSR2VM Description Standard Through Hole Device, 50 pcs per tube Surface Mount Lead Bend DIN_EN/IEC60747-5-2 (VDE), surface mount, tape and reel Surface Mount, 0.4" lead spacing Surface Mount, 0.4" lead spacing, IEC60747-5-2 approval pending (VDE) Surface Mount, Tape and Reel, 0.4" lead spacing Surface Mount, Tape and Reel, 0.4" lead spacing, IEC60747-5-2 approval pending (VDE) Marking Information 1 6N137 V 3 XX YY 4 B 2 6 5 Definitions 1 Fairchild logo 2 Device number 3 DIN_EN/IEC60747-5-2 (VDE) mark (Note: Only appears on parts ordered with VDE option - See order entry table) 4 Two digit year code, e.g., `13' 5 Two digit work week ranging from `01' to `53' 6 Assembly package code Note: `HCPL' devices are marked only with the numerical characters (for example, HCPL2630 is marked as `2630'). The `M' suffix on the part number is an order identifier only. It is used to identify orders for the white package version. The `M' does not appear on the device's top mark. (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 www.fairchildsemi.com 13 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Ordering Information D0 P0 t K0 P2 E F A0 W1 d t P User Direction of Feed Symbol W W B0 Description D1 Dimension in mm Tape Width 16.0 0.3 Tape Thickness 0.30 0.05 P0 Sprocket Hole Pitch 4.0 0.1 D0 Sprocket Hole Diameter 1.55 0.05 E Sprocket Hole Location 1.75 0.10 F Pocket Location 7.5 0.1 2.0 0.1 P2 P Pocket Pitch A0 Pocket Dimensions 12.0 0.1 10.30 0.20 B0 10.30 0.20 K0 4.90 0.20 W1 d R (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 Cover Tape Width 13.2 0.2 Cover Tape Thickness 0.1 maximum Max. Component Rotation or Tilt 10 Min. Bending Radius 30 www.fairchildsemi.com 14 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Carrier Tape Specifications (Option SD) Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers Reflow Profile Temperature (C) TP 260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 Max. Ramp-up Rate = 3C/S Max. Ramp-down Rate = 6C/S tP Tsmax tL Preheat Area Tsmin ts 120 240 360 Time 25C to Peak Time (seconds) Profile Freature Pb-Free Assembly Profile Temperature Minimum (Tsmin) 150C Temperature Maximum (Tsmax) 200C Time (tS) from (Tsmin to Tsmax) 60 to 120 seconds Ramp-up Rate (tL to tP) 3C/second maximum Liquidous Temperature (TL) 217C Time (tL) Maintained Above (TL) 60 to 150 seconds Peak Body Package Temperature 260C +0C / -5C Time (tP) within 5C of 260C 30 seconds Ramp-down Rate (TP to TL) 6C/second maximum Time 25C to Peak Temperature (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7 8 minutes maximum www.fairchildsemi.com 15 Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M -- High Speed 10MBit/s Logic Gate Optocouplers 16 www.fairchildsemi.com (c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL26XXM Rev. 1.0.7