34 .80 7IRELESS IMPORTANT NOTICE Dear customer, As from August 2nd 2008, the wireless operations of NXP have moved to a new company, ST-NXP Wireless. As a result, the following changes are applicable to the attached document. Company name - Philips Semiconductors is replaced with ST-NXP Wireless. Copyright - the copyright notice at the bottom of each page "(c) Koninklijke Philips Electronics N.V. 200x. All rights reserved", shall now read: "(c) ST-NXP Wireless 200x All rights reserved". Web site - http://www.semiconductors.philips.com is replaced with http://www.stnwireless.com Contact information - the list of sales offices previously obtained by sending an email to sales.addresses@www.semiconductors.philips.com, is now found at http://www.stnwireless.com under Contacts. If you have any questions related to the document, please contact our nearest sales office. Thank you for your cooperation and understanding. ST-NXP Wireless 34 .80 7IRELESS www.stnwireless.com ISP1109 Universal Serial Bus transceiver with carkit support Rev. 01 -- 14 July 2005 Product data sheet 1. General description The ISP1109 is a Universal Serial Bus (USB) transceiver device that supports CEA-936-A, Mini-USB Analog Carkit Interface. It is fully compliant with Universal Serial Bus Specification Rev. 2.0. The ISP1109 can transmit and receive serial data at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) data rates. The ISP1109 is available in HVQFN32 package. 2. Features Fully complies with Universal Serial Bus Specification Rev. 2.0 Supports CEA-936-A, Mini-USB Analog Carkit Interface Can transmit and receive serial data at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) data rates Supports Serial Parallel Interface (SPI) (up to 26 MHz) and I2C-bus (up to 400 kHz) serial interface to access control and status registers Supports Universal Asynchronous Receiver-Transmitter (UART) pass-through on the DP and DM lines Built-in analog switches to support analog audio signals multiplexed on the DP and DM lines Supports On-The-Go (OTG) Session Request Protocol (SRP) Supports Power-down mode, in which the whole chip consumes less than 20 A power current 3.0 V to 5.25 V power supply input range (VCC) Supports wide range digital interfacing I/O voltage (VCC(I/O)) of 1.65 V to 3.6 V 12 kV ESD protection at pins DP, DM, ID, VBUS, VCC, GNDA and GNDD Supports charger current switching (ISET) detection Full industrial grade operation from -40 C to +85 C Available in a small HVQFN32 (5 x 5 mm2) halogen-free and lead-free package. 3. Applications Mobile phones. ISP1109 Philips Semiconductors USB transceiver with carkit support 4. Ordering information Table 1: Ordering information Type number ISP1109BS Package Name Description Version HVQFN32 plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm SOT617-1 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 2 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 5. Block diagram VCC(I/O) 8, 19 CLOCK AND TIMER RESET_N SPI_I2C_SEL SPI_MISO ISP1109 3 5 9 10 POWER BLOCK SPI INTERFACE 21 30 31 SPI_MOSI/ I2C_SDA 11 SPI_CLK/ I2C_SCL 12 SPI_CS/ I2C_ADR 13 INT_N REGISTERS ID DET 28 29 I2C-BUS INTERFACE VCC REG3V3 VBUS VREF ID_PU ID DP_PU/ DP_INT DETECTOR 4 SERIAL CONTROLLER LEVEL SHIFTER UART_TXD 25 UART_RXD 26 ISET CONTROL 27 23 DIF TX DAT/VP 18 SE0/VM 17 OE_N 20 + RCV 16 DIF RX - VP 15 VM 14 SPEED 6 SUSPEND 7 SE DETECTOR 32 SE D+ AUDIO SWITCH SE D- GNDD 22 die pad 1 ISET DP DM MIC SPKR_R 2 SPKR_L 24 GNDA 004aaa486 Fig 1. Block diagram. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 3 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 6. Pinning information 25 UART_TXD 26 UART_RXD 27 ISET 28 ID_PU 29 ID 30 VBUS terminal 1 index area 31 VREF 32 MIC 6.1 Pinning SPKR_R 1 24 GNDA SPKR_L 2 23 DP VCC 3 22 DM INT_N 4 RESET_N 5 SPEED 6 SUSPEND 7 19 VCC(I/O) 18 DAT/VP VCC(I/O) 8 17 SE0/VM 21 REG3V3 RCV 16 20 OE_N VP 15 VM 14 SPI_CS/I2C_ADR 13 SPI_CLK/I2C_SCL 12 SPI_MOSI/I2C_SDA 11 9 SPI_I2C_SEL SPI_MISO 10 ISP1109BS 004aaa487 Transparent top view 16 RCV 15 VP 14 VM 13 SPI_CS/I2C_ADR 12 SPI_CLK/I2C_SCL 11 SPI_MOSI/I2C_SDA SPI_I2C_SEL 9 10 SPI_MISO Fig 2. Pin configuration HVQFN32; top view. VCC(I/O) 8 SUSPEND 7 SPEED 6 RESET_N 5 INT_N 4 VCC 3 22 DM SPKR_L 2 23 DP SPKR_R 1 24 GNDA 18 DAT/VP 19 VCC(I/O) 20 OE_N UART_TXD 25 21 REG3V3 UART_RXD 26 ISET 27 ID_PU 28 ID 29 VBUS 30 MIC 32 ISP1109BS VREF 31 terminal 1 index area 17 SE0/VM GNDD (exposed die pad) 004aaa703 Bottom view Fig 3. Pin configuration HVQFN32; bottom view. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 4 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 6.2 Pin description Table 2: Pin description Symbol [1] [2] Pin Type [3] Reset state Description SPKR_R 1 AI - analog audio input signal for the right speaker channel SPKR_L 2 AI - analog audio input signal for the left speaker channel VCC 3 P - supply voltage; operates when 3.0 V < VCC < 5.25 V INT_N 4 OD high-Z interrupt output; active LOW; connect to VCC(I/O) through a 3.3 k resistor RESET_N 5 I - open-drain output asynchronous reset input, active LOW input SPEED 6 I - speed selection input for the USB transceiver: * * LOW: USB low-speed HIGH: USB full-speed. when not in use, connect to VCC(I/O) through a 10 k resistor input SUSPEND 7 I - suspend selection input for the USB transceiver: * * LOW: normal operation HIGH: suspend mode. when not in use, connect to ground through a 10 k resistor input VCC(I/O) 8 P - supply voltage for I/O interface logic signals (1.65 V to 3.6 V) SPI_I2C_ SEL 9 I - selection of SPI or I2C-bus serial interface to access internal registers: * * LOW: SPI slave interface is selected HIGH: I2C-bus slave interface is selected. The I2C-bus device address is 010 110Xb; here X is determined by pin 13 (I2C_ADR). input SPI_MISO 10 O - SPI_MOSI/ I2C_SDA 11 I/OD high-Z SPI slave data output; leave this pin open when I2C-bus is selected push-pull output SPI_MOSI input -- SPI slave data input I2C_SDA input and output -- serial I2C-bus data; when used as an I2C-bus data, the pad is open-drain; connect to VCC(I/O) through a 3.3 k resistor. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 5 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 2: Pin description...continued Symbol [1] [2] Pin Type [3] Reset state Description SPI_CLK/ I2C_SCL 12 I/OD high-Z SPI_CLK input -- SPI clock input SPI_CS/ I2C_ADR 13 I2C_SCL input and output -- serial I2C-bus clock; when used as an I2C-bus clock, the pad is open-drain; connect to VCC(I/O) through a 3.3 k resistor. I - SPI_CS input -- SPI chip select input I2C_ADR input -- LSB address offset of the I2C-bus slave address. input VM 14 O - single-ended DM receiver output; leave this pin open when not in use push-pull output VP 15 O - single-ended DP receiver output; leave this pin open when not in use push-pull output RCV 16 O 0 differential receiver output; leave this pin open when not in use push-pull output SE0/VM 17 I/O high-Z SE0 input and output -- SE0 functions in DAT_SE0 USB mode VM input and output -- VM functions in VP_VM USB mode. bidirectional pad DAT/VP 18 I/O high-Z DAT input and output -- DAT functions in DAT_SE0 USB mode VP input and output -- VP functions in VP_VM USB mode. bidirectional pad VCC(I/O) 19 P - supply voltage for the I/O interface logic signals (1.65 V to 3.6 V) OE_N 20 I - enable differential transmitter input REG3V3 21 P - regulated output voltage 3.3 V; a 0.1 F external capacitor is required DM 22 AI/O high-Z this pin can be programmed as: input * * * DP 23 AI/O high-Z 24 P - transparent audio SPKR_L. USB D+ (data plus pin) transparent UART TxD or transparent audio SPKR_R or MIC. analog ground 9397 750 13355 Product data sheet transparent UART RxD or this pin can be programmed as: * * * GNDA USB D- (data minus pin) (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 6 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 2: Pin description...continued Symbol [1] [2] Pin Type [3] Reset state Description UART_TXD 25 I - connect to TxD of the UART controller; when not in use, connect to VCC(I/O) through a 10 k resistor input UART_RXD 26 O 27 O [4] - connect to RxD of the UART controller; leave this pin open when not in use push-pull output ISET - output indicating detection of the carkit, charger or factory mode to enable high current mode of the phone charger; leave this pin open when not in use push-pull output ID_PU 28 AI - an external resistor is connected between the ID and ID_PU pins ID 29 AI - identification detector input of the USB mini connector VBUS 30 AI - VBUS line input supply voltage of the USB connector [5] VREF 31 P - supply voltage for audio circuits; 2.775 V 0.1 V MIC 32 AO - audio output signal for the microphone channel GNDD exposed die pad P - digital ground [1] Symbol names ending with underscore N--for example, NAME_N--indicate active LOW signals. [2] Use a decoupling capacitor of 0.1 F on all VCC(I/O), VREF and VCC pins. [3] I = input; O = output; I/O = digital input/output; OD = open-drain output; AI/O = analog input/output; P = power or ground. [4] The ISET pin is powered by REG3V3. All other digital pins are powered by VCC(I/O). [5] For the decoupling capacitor requirement, refer to Table 7-7 of Universal Serial Bus Specification Rev. 2.0. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 7 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 7. Functional description 7.1 Serial controller The serial controller includes the following functions: * * * * * Serial Controller interface (SPI or I2C-bus) Device Identification registers Control registers Interrupt registers Interrupt generator. The serial controller acts as an SPI slave or I2C-bus slave. All the registers are the same as that in SPI or I2C-bus mode. In I2C-bus mode, the registers are accessed in 8-bit width (bits 0 to 7) for each address. In SPI mode, there are 25 bits for each address, only bits 0 to 7 are useful while bits 8 to 24 are don't cares. At hardware reset including power-on reset, the level on pin SPI_I2C_SEL will determine whether the SPI or I2C-bus interface is active. If SPI_I2C_SEL = LOW, the SPI interface is selected. If SPI_I2C_SEL = HIGH, the I2C-bus interface is selected. 7.2 VBUS detector The VBUS detector provides voltage level detection on VBUS. If VBUS is above the VBUS session valid comparator threshold voltage (Vth(svc)), logic 1 will be stored in bit VBUS_DET of the Interrupt Source register. If VBUS is below Vth(svc), logic 0 will be stored. 7.3 ID detector In normal power mode, that is, when both VCC and VCC(I/O) are present, the ID detector senses the condition of the ID line and can differentiate between the following three conditions: * ID pin is floating (bit ID_FLOAT = 1) * ID pin is shorted to ground (bit ID_GND = 1) * ID pin is connected to ground through resistor RDN(ID) (bits ID_FLOAT and ID_GND are logic 0). The recommended procedure to detect the status of ID using software is: 1. When nothing is connected, ID is in the ID_FLOAT state. Enable the ID_FLOAT interrupt (falling edge). 2. If an interrupt occurs, read the Interrupt Latch register. If ID changes, bit ID_FLOAT is set. 3. The software waits for sometime, for example: 100 ms, to allow mechanical debounce. 4. The software reads the Interrupt Source register, and checks bits ID_FLOAT and ID_GND. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 8 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support The ID detector has a switch that can be used to ground pin ID. This switch is controlled by bit ID_PULLDN of the Resistor Control register, and bits PH_ID_INT and PH_ID_ACK of the Audio Control register. See Table 3. Table 3: ID pull-down control ID_PULLDN PH_ID_ACK PH_ID_INT Switch between ID and GND 0 0 0 off 0 0 1 on for time tWint(ID) then off; bit PH_ID_INT auto-clears to 0 0 1 0 wait for time tint(ID), turn on the switch for tWint(ID) then off; bit PH_ID_ACK auto-clears to 0 0 1 1 not defined 1 X X on The ID detector also has a switch that is connected between the ID_PU and VREF pins. If the voltage on the ID pin is higher than the voltage on the VREF pin, the switch will be turned off. Otherwise, the switch will remain on. 7.4 Pull-up and pull-down resistors The DP pull-up resistor can be enabled or disabled (default enabled) using register bit DP_PULLUP, if VBUS is above Vth(svc). The pull-up resistance on pin DP (RUP(DP)) must be enabled, if VCC > Vth(ISET) and VBUS > Vth(svc). To support DP Session Request Protocol (SRP), it is required that a B-device can perform DP pulsing when VBUS is below the session end threshold (0.2 V to 0.8 V). If register bit DP_SRP_EN is set, the DP pull-up resistor will be enabled irrespective of the status of VBUS. Table 4: DP pull-up resistor (RUP(DP)) control Bit VBUS > Vth(svc) DP_SRP_EN DP_PULLUP 0 0 0 0 Pin DP pull-up resistor (SW1) VCC(I/O) HIGH RESET_N X X X off 1 no X X off 1 X LOW X off 0 1 X X LOW off 0 1 yes HIGH HIGH on 1 X X X HIGH on The pull-up resistor is context variable, as described in document ECN_27%_Resistor. The value of the pull-up resistor depends on the condition of the USB bus: * When the bus is idle, the value of the resistor is 900 to 1575 (SW2 = on). * When the bus is transmitting or receiving, the value of the resistor is 1425 to 3090 (SW2 = off). DP also implements a weak pull-up resistor (RweakUP(DP)) that is controlled by bit DP_WKPU_EN of the Resistor Control register; see Figure 4. RweakUP(DP) will be connected to the DP pin (SW3 = on), if bit DP_WKPU_EN = 1 and the voltage on VBUS is greater than Vth(svc). 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 9 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support The DP pull-down resistor (RDN(DP)) is connected to the DP line, if bit DP_PULLDOWN in the Resistor Control register is set. The DM pull-down resistor (RDN(DM)) is connected to the DM line, if bit DM_PULLDOWN in the Resistor Control register is set. REG3V3 0.525 k to 1.515 k SW2 RweakUP(DP) SW1 130 k 30 % SW3 0.9 k to 1.575 k DP DM DM_PULLDOWN DP_PULLDOWN 15 k (14.3 k to 24.8 k) RDN(DP) RDN(DM) 15 k (14.3 k to 24.8 k) 004aaa520 Fig 4. DP and DM pull-up and pull-down resistors. 7.5 Power block The built-in DC-DC regulator conditions the input power supply (VCC) for use in the core of the ISP1109. When VCC is greater than 3.6 V, the regulator will output 3.3 V 10 %. When VCC is less than 3.6 V, the regulator will be bypassed and pin REG3V3 will be shorted to pin VCC. The output of the regulator can be monitored on pin REG3V3. A capacitor (0.1 F) will be connected to pin REG3V3. 7.6 Carkit DP interrupt detector The carkit DP interrupt detector is a comparator that detects the carkit interrupt signal on the DP line in analog audio mode. Bit DP_INT will be cleared (set to logic 0), if the voltage level on the DP line is below the carkit interrupt threshold VthPH(DP)L (0.4 V to 0.6 V). The carkit interrupt detector is enabled in audio mode only (bit AUDIO_EN = 1). 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 10 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 7.7 Audio switches The audio switches provide low impedance path for analog audio signals to be multiplexed on the DP and DM lines, or loopback between the MIC and SPKR lines. There are five analog switches that are controlled by register bits. The impedance of the switches will be between 50 and 150 . Table 5 shows the relation between the control bits and the switches. Figure 5 shows the audio switches. Table 5: Audio switch control AUDIO_EN AUDIO_MONO S1 S2 S3 0 X off off off 1 0 on off on 1 1 off on off S1 SPKR_R DP S2 SW_MIC_ SPKR_R MIC SW_MIC_ SPKR_L S3 DM SPKR_L 004aaa518 Fig 5. Audio switches. 7.8 ISET detector The ISET detector will set the ISET pin HIGH when either of the following conditions is met: * ID > Vth(ID_FM), VCC > Vth(ISET) and VBUS > Vth(svc) * DP and DM SE1 detected, VCC > Vth(ISET) and VBUS > Vth(svc). The DP and DM SE1 detector will time the length of the SE1 condition. The timer value is programmable using register bit TMR_SE1. The timer ranges from 0 ms to 15 ms, with 1 ms interval. The ID > Vth(ID_FM) detector, and the SE1 detector (with timer) requires bias current. In Power-down mode, the bias current is turned off to minimize current ICC. The bias current needs to be enabled so that the ISET detector can function as described earlier. * If the Power-down is because VCC(I/O) is disconnected, the bias will be enabled if the VBUS voltage goes above the SESS_VLD threshold. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 11 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support * If the Power-down is because of the setting of register bit PWR_DN in the Mode Control register, the bias will be enabled if the VBUS voltage goes above the SESS_VLD threshold. Note: In this case, make sure bit SESS_VLD_IEH in the Interrupt Enable High register is set to logic 1 before the PWR_DN bit is set. The recommended sequences for software is: a. Set bit SESS_VLD_IEH to logic 1 b. Set bit PWR_DN to logic 1 c. Wait for interrupt from the ISP1109 d. If INT_N is asserted, read the Interrupt Latch register e. If bit SESS_VLD_INT is logic 1, clear bit PWR_DN (Note: Software must clear bit PWR_DN within 5 ms from the time pin INT_N is asserted. For details, see Section 10). Pin ISET will remain LOW when VCC is below Vth(ISET). Pin ISET can also be controlled by software through register bits. If bit ISET_DRV_EN is set to logic 1, the status of the ISET pin will be determined by bit ISET_STATE. 7.9 USB transceiver 7.9.1 Differential driver The operation of the driver is described in Table 6. Table 6: Transceiver driver operating setting Pin Pin or bit SUSPEND Bit DAT_SE0 Differential driver RESET_N [1] OE_N HIGH LOW 0 0 output value from DAT/VP to DP and SE0/VM to DM HIGH LOW 0 1 output value from DAT/VP to DP and DM, if SE0/VM is LOW; otherwise, drive both DP and DM LOW HIGH LOW 1 X output value from DAT/VP to DP and DM HIGH HIGH X X high-Z LOW X X X high-Z [1] Include the internal power-on-reset pulse (active HIGH). Table 7 shows the behavior of the transmit operation in detail. Table 7: USB mode USB functional mode: transmit operation Inputs Outputs DAT/VP SE0/VM DP DM DAT_SE0 LOW LOW LOW HIGH DAT_SE0 HIGH LOW HIGH LOW DAT_SE0 LOW HIGH LOW LOW DAT_SE0 HIGH HIGH LOW LOW VP_VM LOW LOW LOW LOW 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 12 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 7: USB functional mode: transmit operation...continued USB mode Inputs Outputs DAT/VP SE0/VM DP DM VP_VM HIGH LOW HIGH LOW VP_VM LOW HIGH LOW HIGH VP_VM HIGH HIGH HIGH HIGH 7.9.2 Differential receiver The operation of the differential receiver is described in Table 8. Table 8: Differential receiver operation settings Pin or bit SUSPEND Pin OE_N 0 Bit Differential receiver DAT_SE0 BI_DI HIGH 1 0 output differential value from DP and DM to RCV 0 HIGH 1 1 output differential value from DP and DM to DAT/VP and RCV 0 HIGH 0 X output differential value from DP and DM to RCV X LOW X X 0 1 X X X X The detailed behavior of the receive transceiver operation is shown in Table 9. Table 9: USB functional mode: receive operation USB mode Pin or bit SUSPEND Inputs DP DM DAT/VP [1] SE0/VM [1] RCV DAT_SE0 0 LOW LOW RCV HIGH last value of RCV DAT_SE0 0 HIGH LOW HIGH LOW HIGH DAT_SE0 0 LOW HIGH LOW LOW LOW DAT_SE0 0 HIGH HIGH RCV LOW last value of RCV DAT_SE0 1 LOW LOW LOW HIGH X DAT_SE0 1 HIGH LOW HIGH LOW X DAT_SE0 1 LOW HIGH LOW LOW X DAT_SE0 1 HIGH HIGH HIGH LOW X VP_VM 0 LOW LOW LOW LOW last value of RCV VP_VM 0 HIGH LOW HIGH LOW HIGH VP_VM 0 LOW HIGH LOW HIGH LOW VP_VM 0 HIGH HIGH HIGH HIGH last value of RCV VP_VM 1 LOW LOW LOW LOW X VP_VM 1 HIGH LOW HIGH LOW X VP_VM 1 LOW HIGH LOW HIGH X VP_VM 1 HIGH HIGH HIGH HIGH X [1] Outputs Applies only to bidirectional mode (bit BI_DI = 1). For unidirectional mode (bit BI_DI = 0), DAT/VP and SE0/VM are input-only pins. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 13 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 7.10 Power-On Reset (POR) When VCC(I/O) is directly connected to the RESET_N pin, the internal POR pulse width (tPORP) will be typically 800 ns. The pulse is started when VCC rises above VPOR(trip) (1.5 V to 2.5 V). To give a better view of the functionality, Figure 6 shows a possible curve of VCC with dips at t2 to t3 and t4 to t5. If the dip at t4 to t5 is too short (that is, < 11 s), the internal POR pulse will not react and will remain LOW. The internal POR starts with a 1 at t0. At t1, the detector will see the passing of the trip level and a delay element will add another tPORP before it drops to 0. The internal POR pulse will be generated whenever VCC drops below VPOR(trip) for more than 11 s. VCC VPOR(trip) t0 t1 t2 t3 t4 tPORP tPORP t5 PORP(1) 004aaa582 (1) PORP = Power-On Reset Pulse. Fig 6. Internal power-on reset timing. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 14 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 8. Modes of operation The ISP1109 supports four types of modes: * * * * Power modes Serial control modes USB modes Transparent modes. 8.1 Power modes 8.1.1 Normal mode In this mode, both VCC and VCC(I/O) are connected and their voltage levels are within the operation range (VCC 3.0 V, VCC(I/O) 1.65 V, VCC(I/O) VCC). There are three levels of power saving schemes in the ISP1109: * Active power mode: Power is on; all circuits are active. * USB suspend mode: To reduce power consumption, the USB differential receiver is powered off. * Power-down mode: Set by writing logic 1 to bit PWR_DN of the Mode Control 2 register. The clock generator and all biasing circuits are turned off to reduce power consumption to the minimum possible; typically ICC is less than 20 A. For details on waking up the clock, see Section 10. 8.1.2 Disable mode In disable mode, VCC(I/O) is cut-off and VCC is powered. In this mode, the ISP1109 is in Power-down state, if VBUS is below SESS_VLD threshold (0.8 V to 2.0 V). When VCC is below threshold Vth(ISET), pin ISET will remain at the LOW level. When VBUS > Vth(svc) and VCC rises above Vth(ISET), the ISP1109 will output HIGH on pin ISET, if any of the following conditions is detected: * Voltage on pin ID is greater than Vth(ID_FM) * DP and DM are single-ended one (SE1). If the preceding condition is detected, pin ISET will be asserted within 1.5 ms when VCC rises above Vth(ISET). The USB differential driver will be set in three-state as long as VCC(I/O) is lost. The DP pull-up resistor (RUP(DP)) will be disconnected from the DP line. The DP weak pull-up resistor (RweakUP(DP)) will be connected if the VBUS voltage is above Vth(svc). 8.1.3 Isolate mode In isolate mode, VCC is cut-off and VCC(I/O) is powered. In this mode, the ISP1109 will drive stable level to all digital output pins, and all bidirectional digital pins will be set in three-state. Table 10 shows a summary of power modes. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 15 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 10: ISP1109 power modes: summary VCC VCC(I/O) VBUS PWR_DN (bit) ICC < 20 A ISET (pin) Comment off off X X yes high-Z power off off on X X yes high-Z isolate mode on off <Vth(svc) X yes LOW disable mode (Power-down) on off >Vth(svc) X no LOW or HIGH disable mode (ISET operation) on on X 0 no LOW or HIGH normal mode (full operation) on on X 1 yes LOW or HIGH normal mode (Power-down) Table 11 shows the pin states in disable or isolate mode. Table 11: ISP1109 pin states in disable or isolate mode Pin name Disable mode (VCC = on, VCC(I/O) = off) Isolate mode (VCC = off, VCC(I/O) = on) VCC, REG3V3 powered not present VCC(I/O), VREF not present powered ISET drive HIGH or LOW high-Z DP high-Z high-Z DM 15 k pull-down enabled high-Z RCV high-Z drive LOW VP, VM, SPI_MISO, UART_RXD high-Z drive HIGH high-Z RESET_N, SPEED, SUSPEND, SPI_I2C_SEL, SPI_MOSI/I2C_SDA, SPI_CLK/I2C_CLK, SPI_CS/I2C_ADR, SE0/VM, DAT/VP, UART_TXD, INT_N high-Z MIC, SPKR_R, SPKR_L, ID, VBUS high-Z high-Z ID_PU VREF (high-Z, if voltage on pin ID > VREF) VREF (high-Z, if voltage on pin ID > VREF) 8.2 Serial control modes 8.2.1 I2C-bus mode In I2C-bus mode, an external System-on-a-Chip (SoC) directly communicates with the serial controller through the SCL and SDA lines. The serial controller has a built-in I2C-bus slave function. An external I2C-bus master can access the internal registers of the ISP1109 through the I2C-bus interface. The supported I2C-bus bit rate is up to 400 kbit/s. The I2C-bus device address is 010 110Xb, where X is determined by pin 13. 8.2.2 SPI mode In this mode, an external SoC directly communicates with the serial controller through the SPI interface: SPI_MOSI, SPI_MISO, SPI_CLK, SPI_CS. The serial controller has a built-in SPI slave function. An external SPI master can access the internal registers of the ISP1109 through the SPI interface. The maximum SPI clock rate is 26 MHz. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 16 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 8.3 USB modes The four USB modes of the ISP1109 are: * * * * VP_VM unidirectional mode VP_VM bidirectional mode DAT_SE0 unidirectional mode (default) DAT_SE0 bidirectional mode. In VP_VM USB mode, pin DAT/VP is used for the VP function, pin SE0/VM is used for the VM function, and pin RCV is used for the RCV function. In DAT_SE0 USB mode, pin DAT/VP is used for the DAT function, pin SE0/VM is used for the SE0 function, and pin RCV is not used. In unidirectional mode, pins DAT/VP and SE0/VM are always input. In bidirectional mode, the direction of these signals depends on input OE_N. Table 12 specifies the functionality of the device during the four USB modes. Table 12: USB functional modes: I/O values USB mode [1] Bit DAT_SE0 VP_VM unidirectional 0 bidirectional DAT_SE0 unidirectional bidirectional 1 Pin BI_DI OE_N DAT/VP SE0/VM VP VM RCV 0 X TxD+ [2] TxD- [2] RxD+ [6] RxD- [6] RxD [6] 1 LOW TxD+ [2] TxD- [2] HIGH RxD+ [3] RxD- [3] 0 X TxD [4] FSE0 [5] 1 LOW TxD [4] FSE0 [5] HIGH RxD [6] RSE0 [7] [1] Some of the modes and signals are provided to achieve backward compatibility with IP cores. [2] TxD+ and TxD- are single-ended inputs to drive the DP and DM outputs, respectively, in single-ended mode. [3] RxD+ and RxD- are the outputs of the single-ended receivers connected to DP and DM, respectively. [4] TxD is the input to drive DP and DM in DAT_SE0 mode. [5] FSE0 is to force an SE0 on the DP and DM lines in DAT_SE0 mode. [6] RxD is the output of the differential receiver. [7] RSE0 is an output, indicating that an SE0 is received on the DP and DM lines. 8.4 Transparent modes 8.4.1 Transparent UART mode When in transparent UART mode, an SoC (with the UART controller) communicates through the ISP1109 to another UART device that is connected to its DP and DM lines. The ISP1109 operates as logic level translator between the following pins, depending on the setting of register bit UART_PIN_SEL. * If UART_PIN_SEL = 0 (default): - For the TxD signal: From UART_TXD (VCC(I/O) level) to DM (REG3V3 level) - For the RxD signal: From DP (REG3V3 level) to UART_RXD (REG3V3 level). 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 17 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support * If UART_PIN_SEL = 1: - For the TxD signal: From SE0/VM (VCC(I/O) level) to DM (REG3V3 level) - For the RxD signal: From DP (REG3V3 level) to DAT/VP (REG3V3 level). The ISP1109 is in transparent UART mode, if bit UART_EN of the Mode Control 1 register is set. 8.4.2 Transparent audio mode In transparent audio mode, the ISP1109 will disable its DP and DM driver. The carkit interrupt detector is enabled. The built-in analog switches will be tuned based on the selection of carkit audio mode: * Stereo mode: SPKR_L on DM and SPKR_R on DP * Mono and MIC mode: SPKR_L on DM and MIC on DP. The ISP1109 is in transparent audio mode, if bit UART_EN of the Mode Control 1 register is cleared, and bit AUDIO_EN of the Audio Control register is set. 8.4.3 Transparent general-purpose buffer mode In transparent general-purpose buffer mode, the DAT/VP and SE0/VM pins are connected to the DP and DM pins, respectively. Using bits TRANSP_BDIR1 and TRANSP_BDIR0 of the Mode Control 2 register as specified in Table 14, you can control the direction of data transfer. The ISP1109 is in transparent general-purpose buffer mode if bit UART_EN = 0, bit AUDIO_EN = 0, and bit TRANSP_EN = 1. Table 13 provides a summary of the device operating modes. Table 13: Summary of device operating modes Mode Bit Description UART_EN UART_PIN_SEL AUDIO_EN AUDIO_MONO TRANSP_EN USB mode 0 X 0 X 0 USB ATX enabled Transparent general purpose buffer mode 0 X 0 X 1 USB ATX disabled. SE0/VM DM DAT/VP DP See Table 14 Transparent Audio 0 mode (stereo) X 1 0 X USB ATX disabled. SPKR_L DM SPKR_R DP Transparent Audio 0 mode (mono) X 1 1 X USB ATX disabled. SPKR_L DM MIC DP Transparent UART 1 mode (mode 1) 0 Transparent UART 1 mode (mode 2) 1 X X X USB ATX disabled. UART_TXD DM UART_RXD DP X X X USB ATX disabled. SE0/VM DM DAT/VP DP 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 18 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 14: Transparent general-purpose buffer mode Bit TRANSP_BDIR[1:0] Direction of the data flow 00 DAT/VP DP SE0/VM DM 01 DAT/VP DP SE0/VM DM 10 DAT/VP DP SE0/VM DM 11 DAT/VP DP SE0/VM DM 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 19 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 9. Serial controller 9.1 Register map Table 15 provides an overview of the serial controller registers. Table 15: Register overview Register Width (bits) Access Memory address [1] Functionality Reference Vendor ID 16 R 00h to 01h Section 9.1.1 on page 20 Product ID 16 R 02h to 03h device identification registers Version ID 16 R 14h to 15h Mode Control 1 8 R/S/C Set -- 04h control registers Section 9.1.2 on page 21 interrupt registers Section 9.1.3 on page 24 Clear -- 05h Mode Control 2 8 R/S/C Set -- 12h Clear -- 13h Audio Control 8 R/S/C Set -- 16h Clear -- 17h Timer Control 8 R/S/C Resistor Control 8 R/S/C Set -- 18h Clear -- 19h Set -- 06h Clear -- 07h Interrupt Source 8 R Read -- 08h Interrupt Latch 8 R/S/C Set -- 0Ah Clear -- 0Bh Interrupt Enable Low 8 R/S/C Set -- 0Ch Clear -- 0Dh Interrupt Enable High 8 R/S/C Set -- 0Eh Clear -- 0Fh [1] The R/S/C access type represents a field that can be read, set or cleared (set to 0). A register can be read from either of the indicated addresses--set or clear. Writing logic 1 to the set address causes the associated bit to be set. Writing logic 1 to the clear address causes the associated bit to be cleared. Writing logic 0 to an address has no effect. 9.1.1 Device identification registers 9.1.1.1 Vendor ID register Table 16 provides the bit description of the Vendor ID register. Table 16: VENDORID - Vendor ID register (address 00h to 01h) bit description Legend: * reset value 9.1.1.2 Bit Symbol Access Value Description 15 to 0 VENDORID[15:0] R 04CCh* Philips Semiconductors' Vendor ID Product ID register The bit description of the Product ID register is given in Table 17. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 20 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 17: PRODUCTID - Product ID register (address 02h to 03h) bit description Legend: * reset value 9.1.1.3 Bit Symbol Access Value Description 15 to 0 PRODUCTID[15:0] R 1109h* Product ID of the ISP1109 Version ID register Table 18 shows the bit description of the register. Table 18: VERSIONID - Version ID register (address 14h to 15h) bit description Legend: * reset value Bit Symbol Access Value Description 15 to 0 VERSIONID[15:0] R 0110h* Version number of the ISP1109 9.1.2 Control registers 9.1.2.1 Mode Control 1 register The bit allocation of the Mode Control 1 register is given in Table 19. Table 19: Mode Control 1 register (address Set = 04h, Clear = 05h) bit allocation Bit Symbol 7 6 UART_PIN _SEL UART_EN Reset Access 5 4 reserved 3 2 1 0 TRANSP_ EN DAT_SE0 SUSPEND SPEED 0 0 0 0 0 1 0 0 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C Table 20: Mode Control 1 register (address Set = 04h, Clear = 05h) bit description Bit Symbol Description 7 UART_PIN_ SEL Select UART interface pins for transparent UART mode. UART_EN When asserted, the ATX is in transparent UART mode. 0 -- UART_TXD DM; UART_RXD DP 1 -- DAT/VP DP; SE0/VM DM. 6 0 -- UART mode is not enabled 1 -- UART mode is enabled. 5 to 4 - reserved; cleared (set to 0) 3 TRANSP_EN When set, the ATX is in transparent mode. 2 DAT_SE0 0 -- VP_VM mode 1 -- DAT_SE0 mode. 1 SUSPEND Sets the transceiver in low power mode. 0 -- Active power mode 1 -- Low power mode (differential receiver is disabled if SPEED = 1). 0 SPEED Set the rise time and the fall time of the transmit driver in USB modes. 0 -- Low-speed mode 1 -- Full-speed mode. 9.1.2.2 Mode Control 2 register For the bit allocation of this register, see Table 21. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 21 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 21: Mode Control 2 register (address Set = 12h, Clear = 13h) bit allocation Bit 7 Symbol reserved Reset Access 6 5 4 3 2 1 0 AUDIO_EN TRANSP_ BDIR1 TRANSP_ BDIR0 BI_DI SPD_SUSP _CTRL PWR_DN 0 0 0 0 0 0 0 0 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C Table 22: Mode Control 2 register (address Set = 12h, Clear = 13h) bit description Bit Symbol Description 7 to 6 - reserved; cleared (set to 0) 5 AUDIO_EN Enables the ISP1109 in carkit audio mode. 0 -- Audio disable: analog switches are turned off, DP_INT detector is turned off, and single-ended receivers are turned on 1 -- Audio enable: analog switches are turned on, DP_INT detector is turned on, and single-ended receivers are turned off. 4 to 3 TRANSP_ BDIR[1:0] Controls the direction of data transfer in transparent general-purpose buffer mode; see Table 14 2 BI_DI 0 -- Direction of DAT/VP and SE0/VM are fixed (only transmit) 1 -- Direction of DAT/VP and SE0/VM are controlled by OE_N. 1 SPD_SUSP_ CTRL Controls speed and suspend in USB modes: 0 -- Controlled by pins SPEED and SUSPEND 1 -- Controlled by the Mode Control 1 register bits SPEED and SUSPEND. 0 9.1.2.3 PWR_DN Set to Power-down mode; activities on pin SPI_CLK/I2C_SCL or the interrupt event can wake-up the chip; see Section 9 Audio Control register Table 23 provides bit allocation of the register. Table 23: Audio Control register (address Set = 16h, Clear = 17h) bit allocation Bit Symbol 7 6 5 4 3 2 1 0 PH_ID_ ACK PH_ID_INT DP_SRP_ EN ISET_ STATE ISET_DRV _EN SW_MIC_ SPKR_R SW_MIC_ SPKR_L AUDIO_ MONO 0 0 0 0 0 0 0 0 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C Reset Access Table 24: Audio Control register (address Set = 16h, Clear = 17h) bit description Bit Symbol Description 7 PH_ID_ACK If set, wait for time tint(ID), turn on the ID pull-down switch for tWint(ID), then turn off. Bit PH_ID_ACK auto-clears to 0. See Table 6. 6 PH_ID_INT If set, turn on the ID pull-down switch for time tWint(ID) and then turn off. Bit PH_ID_INT auto-clears to 0. See Table 6. 5 DP_SRP_EN Enables the DP pull-up resistor (RUP(DP)). 0 -- Disable; DP pull-up can only be enabled using bit DP_PULLUP when VBUS is above Vth(svc) 1 -- Enable; DP pull-up is connected. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 22 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 24: Audio Control register (address Set = 16h, Clear = 17h) bit description...continued Bit Symbol Description 4 ISET_STATE Determines the logic level for pin ISET when bit ISET_DRV_EN is logic 1. 0 -- ISET outputs LOW 1 -- ISET outputs HIGH. 3 ISET_DRV_EN Enables software control of the state of pin ISET: 0 -- Disable; the ISET output will be controlled by hardware 1 -- Enable; the ISET output will be controlled by bit ISET_STATE. 2 SW_MIC_ SPKR_R Audio loopback test: SW_MIC_ SPKR_L Audio loopback test: 0 -- Turn off the switch between the MIC and SPKR_R pins 1 -- Turn on the switch between the MIC and SPKR_R pins. 1 0 -- Turn off the switch between the MIC and SPKR_L pins 1 -- Turn on the switch between the MIC and SPKR_L pins. 0 AUDIO_MONO Selection between stereo and mono audio modes: 0 -- Stereo mode: SPKR_L DM, SPKR_R DP 1 -- Mono mode: SPKR_L DM, MIC DP. 9.1.2.4 Timer Control register (S/C: 18h/19h) The bit allocation of the Timer Control register is given in Table 25. Table 25: Timer Control register (address Set = 18h, Clear = 19h) bit allocation Bit 7 6 Symbol 4 3 2 TMR_SE1[3:0] Reset Access 5 1 0 reserved 0 0 0 1 0 0 0 0 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C 9.1.2.5 Table 26: Timer Control register (address Set = 18h, Clear = 19h) bit description Bit Symbol Description 7 to 4 TMR_SE1[3:0] Program the timer value to detect SE1 on the DP and DM lines. The interval is 1 ms (Default value = 1 ms). 3 to 0 - reserved Resistor Control register Table 27 shows the bit allocation of the Resistor Control register. Table 27: Resistor Control register (address Set = 06h, Clear = 07h) bit allocation Bit Symbol 7 6 5 4 3 2 1 0 VBUS_ CHRG VBUS_ DISCHRG reserved ID_PULL DN DM_PULL DOWN DP_PULL DOWN DP_WKPU _EN DP_PULL UP Reset Access 0 0 0 0 0 0 1 1 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 23 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 28: Resistor Control register (address Set = 06h, Clear = 07h) bit description Bit Symbol Description 7 VBUS_CHRG Charge VBUS through a pull-up resistor (RUP(VBUS)) that is connected to REG3V3. 0 -- Disconnect the resistor 1 -- Connect the resistor. 6 VBUS_DISCHRG Discharge VBUS through a pull-down resistor (RDN(VBUS)). 0 -- Disconnect the resistor 1 -- Connect the resistor. 5 reserved reserved; cleared (set to 0) 4 ID_PULLDN Connect pin ID to ground. See Table 6. 0 -- Disconnected 1 -- Connected. 3 DM_PULLDOWN Connect the DM pull-down resistor (RDN(DM)). 0 -- DM pull-down resistor is disconnected 1 -- DM pull-down resistor is connected. 2 DP_PULLDOWN Connect the DP pull-down resistor (RDN(DP)). 0 -- DP pull-down resistor is disconnected 1 -- DP pull-down resistor is connected. 1 DP_WKPU_EN Connect the DP weak pull-up resistor (RweakUP(DP)). 0 -- DP weak pull-up resistor is disconnected 1 -- DP weak pull-up resistor is connected. 0 Connect the DP pull-up resistor (RUP(DP)). The pull-up resistor will be connected to the DP line only when VBUS > Vth(svc). DP_PULLUP 0 -- DP pull-up resistor is disconnected 1 -- DP pull-up resistor is connected, if VBUS > Vth(svc). 9.1.3 Interrupt registers 9.1.3.1 Interrupt Source register Table 29 shows the bit allocation of this register that indicates the current state of the signals that can generate an interrupt. Table 29: Interrupt Source register (address 08h) bit allocation Bit 7 6 5 4 3 2 1 0 DP_INT reserved ID_FLOAT SE1 ID_GND DP_HI SESS_VLD VBUS_ DET Reset 0 0 0 0 0 0 0 0 Access R R R R R R R R Symbol 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 24 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 30: Interrupt Source register (address 08h) bit description Bit Symbol Description 7 DP_INT Set to logic 1 when the DP voltage is higher than carkit interrupt threshold Vth(DP)L (0.4 V to 0.6 V). 0 -- Voltage on DP is below Vth(DP)L 1 -- Voltage on DP is above Vth(DP)L. 6 - reserved 5 ID_FLOAT Indicates the status of pin ID: 0 -- ID pin is not floating 1 -- ID pin is floating. 4 SE1 DP and DM SE1 detected. The period of SE1 needed is controlled by TMR_SE1 bits. 0 -- SE1 is not detected 1 -- SE1 is detected. 3 ID_GND Indicates the status of pin ID: 0 -- ID pin is not grounded 1 -- ID pin is grounded. 2 DP_HI DP single-ended receiver output: 0 -- LOW 1 -- HIGH. 1 VBUS session valid detector: SESS_VLD 0 -- VBUS is lower than Vth(svc) 1 -- VBUS is higher than Vth(svc). 0 VBUS HIGH detector: VBUS_DET 0 -- VBUS is lower than Vth(VBUS_HI) 1 -- VBUS is higher than Vth(VBUS_HI). 9.1.3.2 Interrupt Latch register This register indicates the source that generates an interrupt. For bit allocation, see Table 31. Table 31: Interrupt Latch register (address Set = 0Ah, Clear = 0Bh) bit allocation Bit Symbol 7 6 5 4 3 DP_INT_ INT reserved ID_FLOAT_ INT SE1_INT ID_GND_ INT 0 0 0 0 0 0 0 0 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C Reset Access Table 32: 2 1 DP_HI_INT SESS_VLD _INT 0 VBUS_ DET_INT Interrupt Latch register (address Set = 0Ah, Clear = 0Bh) bit description Bit Symbol Description 7 DP_INT_INT 0 -- No interrupt 1 -- Interrupt on the DP_INT status change. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 25 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 32: Interrupt Latch register (address Set = 0Ah, Clear = 0Bh) bit description...continued Bit Symbol Description 6 - reserved 5 ID_FLOAT_INT 0 -- No interrupt 4 SE1_INT 0 -- No interrupt 1 -- Interrupt on the ID_FLOAT status change. 1 -- Interrupt on the SE1 status change. 3 ID_GND_INT 0 -- No interrupt 1 -- Interrupt on the ID_GND status change. 2 DP_HI_INT 0 -- No interrupt 1 -- Interrupt on the DP_HI status change. 1 SESS_VLD_INT 0 -- No interrupt 0 VBUS_DET_INT 0 -- No interrupt 1 -- Interrupt on the SESS_VLD status change. 1 -- Interrupt on the VBUS_DET status change. 9.1.3.3 Interrupt Enable Low register The bits in this register enable interrupts when the corresponding bits in the Interrupt Source register changes from logic 1 to logic 0. Table 33 shows the bit allocation of the register. Table 33: Interrupt Enable Low register (address Set = 0Ch, Clear = 0Dh) bit allocation Bit Symbol 7 6 5 4 3 2 1 0 DP_INT_ IEL reserved ID_FLOAT_ IEL SE1_IEL ID_GND_ IEL DP_HI_IEL SESS_VLD _IEL VBUS_ DET_IEL 0 0 0 0 0 0 0 0 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C Reset Access Table 34: Interrupt Enable Low register (address Set = 0Ch, Clear = 0Dh) bit description Bit Symbol Description 7 DP_INT_IEL 0 -- Disable 1 -- Enable. 6 - reserved 5 ID_FLOAT_IEL 0 -- Disable 1 -- Enable. 4 SE1_IEL 0 -- Disable 3 ID_GND_IEL 1 -- Enable. 0 -- Disable 1 -- Enable. 2 DP_HI_IEL 0 -- Disable 1 -- Enable. 1 SESS_VLD_IEL 0 -- Disable 1 -- Enable. 0 VBUS_DET_IEL 0 -- Disable 1 -- Enable. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 26 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 9.1.3.4 Interrupt Enable High register The bit allocation of the register is given in Table 35. The bits in this register enable interrupts when the corresponding bits in the Interrupt Source register changes from logic 0 to logic 1. Table 35: Interrupt Enable High register (address Set = 0Eh, Clear = 0Fh) bit allocation Bit Symbol 7 6 5 4 3 DP_INT_ IEH reserved ID_FLOAT_ IEH SE1_IEH ID_GND_ IEH 0 0 0 0 0 0 0 0 R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C R/S/C Reset Access Table 36: 2 1 DP_HI_IEH SESS_VLD _IEH 0 VBUS_ DET_IEH Interrupt Enable High register (address Set = 0Eh, Clear = 0Fh) bit description Bit Symbol Description 7 DP_INT_IEH 0 -- Disable 1 -- Enable. 6 - reserved 5 ID_FLOAT_IEH 0 -- Disable 1 -- Enable. 4 SE1_IEH 0 -- Disable 3 ID_GND_IEH 1 -- Enable. 0 -- Disable 1 -- Enable. 2 DP_HI_IEH 0 -- Disable 1 -- Enable. 1 SESS_VLD_IEH 0 -- Disable 1 -- Enable. 0 VBUS_DET_IEH 0 -- Disable 1 -- Enable. 9.2 Interrupts Any of the Interrupt Source register signals given in Table 29 can generate an interrupt when the signal becomes either LOW or HIGH. After an interrupt is generated, the SoC can read the status of each signal and the bit that indicates whether or not that signal generated the interrupt. A bit in the Interrupt Latch register is set when any of these occurs: * Writing logic 1 to its set address causes the corresponding bit to be set. * The corresponding bit in the Interrupt Enable High register is set, and the associated signal changes from LOW-to-HIGH. * The corresponding bit in the Interrupt Enable Low register is set, and the associated signal changes from HIGH-to-LOW. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 27 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 9.3 SPI interface 9.3.1 Pinout description The SPI interface consists of four signals as given in Table 37. Table 37: SPI interface pin description Pin name Description SPI_MOSI serial data input line SPI_MISO serial data output line SPI_CLK clock input line SPI_CS clock enable line (active HIGH) 9.3.2 Interface overview The SPI interface has the following characteristics: * The maximum clock rate is 26 MHz. * Data is transmitted, most significant bit first. Each data field consists of a total of 32 bits. * The data and SPI_CLK signals are ignored, if SPI_CS is LOW. SPI_MISO is set to three-state, if SPI_CS is programmed LOW. * SPI_CS is active (HIGH) only during the serial data transmission. * All input data is sampled at the rising edge of the SPI_CLK signal. Any transition on SPI_MOSI must occur at least 5 ns before the rising edge of SPI_CLK and remain stable for at least 5 ns after the rising edge of SPI_CLK. * All output data is updated at the rising edge of the SPI_CLK signal. Any transition on SPI_MISO must occur at least 5 ns before the rising edge of SPI_CLK and remain stable for at least 19.23 ns after the rising edge of SPI_CLK. * SPI_CS must be active (HIGH) at least 5 ns before the rising edge of the first SPI_CLK signal, and must remain active (HIGH) at least 61.5 ns after the last falling edge of SPI_CLK. * Coincident rising or falling edge of SPI_CLK and SPI_CS are not allowed. * If SPI_CS goes LOW before enough bits are sent, then the data bits sent are ignored. * When SPI_CS goes LOW to complete the SPI operation, the next rising edge of SPI_CS must be delayed by at least 30 ns. 9.3.3 Interface protocol description The SPI port is configured to use 32-bit serial data words, using 1 bit for R/W, 5 bits for address, 1 bit for null, and 25 bits for data. For each SPI transfer, a one is written to pin SPI_MOSI, if this SPI transfer is to be a write. A zero is written to the pin, if this is to be a read-only command. If a zero is written, then any data sent after the address bits is ignored and the internal contents of the field addressed do not change when the 32nd SPI_CLK is sent. Next, the 5-bit address is written to pin SPI_MOSI MSB first. Finally, data bits are written to the pin MSB first. Once all the data bits are written, data is transferred to the actual registers on the 32nd SPI_CLK. SPI_CS must go LOW and return to HIGH to start the next SPI data transfer. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 28 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support To read a field of data, pin SPI_MISO will output the data field pointed to by the five address bits loaded at the beginning of the SPI sequence. Figure 7 shows the details of an SPI transfer. SPI_CS SPI_CLK write_en SPI_MOSI address 4 address 3 address 2 address 1 address 0 dead bit SPI_MISO data 24 data 24 data 23 data 0 data 23 data 0 004aaa489 Fig 7. SPI transfer. Figure 8 shows a multiple read and write by using the SPI bus. SPI_CS preamble preamble first address another address SPI_MOSI 25-bit data 25-bit data SPI_MISO 25-bit data 25-bit data 004aaa490 Fig 8. SPI multiple read and write. 9.4 I2C-bus protocol For detailed information, refer to The I2C-bus Specification; Version 2.1. 9.4.1 I2C-bus byte transfer format Table 38: S [1] I2C-bus byte transfer format Byte 1 8 bits [1] S = Start. [2] A = Acknowledge. [3] P = Stop. A [2] Byte 2 A [2] 8 bits 9397 750 13355 Product data sheet Byte 3 8 bits A [2] .. A [2] P [3] .. (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 29 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 9.4.2 I2C-bus device address Table 39: I2C-bus slave address bit allocation Bit Symbol Value [1] 7 6 5 4 3 2 1 0 A6 A5 A4 A3 A2 A1 A0 R/W_N 0 [1] X 0 1 0 1 1 Determined by logic level on pin I2C_ADR: LOW = 0, HIGH = 1. Table 40: I2C-bus slave address bit description Bit Symbol Description 7 to 1 A[6:0] Device address: The device address of the ISP1109 is: 01 0110 (A0). 0 R/W_N Read or write command. 0 -- write 1 -- read. 9.4.3 Write format A write operation can be performed as: * One-byte write to the specified register address * Multiple-byte write to N consecutive registers, starting from the specified start address. N defines the number of registers to write to. If N = 1, only the start register is written. 9.4.3.1 One-byte write Table 41 describes the transfer format for a one-byte write. Table 41: 9.4.3.2 Transfer format description for a one-byte write Byte Description S master starts with a START condition Device select master transmits device address and write command bit R/W = 0 ACK slave generates an acknowledgment Register address K master transmits address of register K ACK slave generates an acknowledgment Write data K master writes data to register K ACK slave generates an acknowledgment P master generates a STOP condition Multiple-byte write Table 42 describes the transfer format for a multiple-byte write. Table 42: Transfer format description for a multiple-byte write Byte Description S master starts with a START condition Device select master transmits device address and write command bit R/W = 0 ACK slave generates an acknowledgment 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 30 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 42: Transfer format description for a multiple-byte write...continued Byte Description Register address K master transmits address of register K. This is the start address for writing multiple data bytes to consecutive registers. After a byte is written, the register address is automatically incremented by 1. Remark: If the master writes to a nonexistent register, the slave must send a 'not ACK' and also must not increment the index address. ACK slave generates an acknowledgment Write data K master writes data to register K ACK slave generates an acknowledgment Write data K + 1 master writes data to register K + 1 ACK slave generates an acknowledgment : : Write data K + N - 1 master writes data to register K + N - 1. When the incremented address K + N - 1 becomes > 255, the register address rolls over to 0. Therefore, it is possible that some registers may be overwritten, if the transfer is not stopped before the rollover. ACK slave generates an acknowledgment P master generates a STOP condition Figure 9 illustrates the write format for a one-byte write and a multiple-byte write. ACK ACK S device select P write data K register address K wr ACK one-byte write ACK ACK S device select wr write data K register address K ACK ACK write data K + 3 write data K + 2 ACK ACK write data K + 1 ACK ACK .... maximum, rollover to 0 write data K + N - 1 P 004aaa569 multiple-byte write Fig 9. Writing data to the ISP1109 registers. 9.4.4 Read format A read operation can be performed in two ways: * Current address read: to read the register at the current address. - Single-register read. * Random address read: to read N registers starting at a specified address. N defines the number of registers to be read. If N = 1, only the start register is read. - Single-register read 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 31 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support - Multiple-register read. 9.4.4.1 Current address read The transfer format description for a current address read is given in Table 43. For illustration, see Figure 10. Table 43: Transfer format description for current address read Byte Description S master starts with a START condition Device select master transmits device address and read command bit R/W = 1 ACK slave generates an acknowledgment Read data K slave transmits and master reads data from register K. If the start address is not specified, the read operation starts from where the index register is pointing to because of a previous read or write operation. No ACK master terminates the read operation by generating a No Acknowledge P master generates a stop condition ACK S device select rd no ACK read data K current address read P 004aaa570 Fig 10. Current address read. 9.4.4.2 Random address read--Single read Table 44 describes the transfer format for a single-byte read. Figure 11 illustrates the byte sequence. Table 44: 9.4.4.3 Transfer format description for single-byte read SDA line Description S master starts with a START condition Device select master transmits device address and write command bit R/W = 0 ACK slave generates an acknowledgment Register address K master transmits (start) address of register K to be read from ACK slave generates an acknowledgment S master restarts with a START condition Device select master transmits device address and read command bit R/W = 1 ACK slave generates an acknowledgment Read data K slave transmits and master reads data from register K No ACK master terminates the read operation by generating a No Acknowledge P master generates a STOP condition Random address read--Multiple read The transfer format description for a multiple-byte read is given in Table 45. Figure 11 illustrates the byte sequence. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 32 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 45: Transfer format description for a multiple-byte read SDA line Description S master starts with a START condition Device select master transmits device address and write command bit R/W = 0 ACK slave generates an acknowledgment Register address K master transmits (start) address of register K to be read from ACK slave generates an acknowledgment S master restarts with a START condition Device select master transmits device address and read command bit R/W = 1 ACK slave generates an acknowledgment Read data K slave transmits and master reads data from register K. After a byte is read, the address is automatically incremented by 1. ACK slave generates an acknowledgment Read data K + 1 slave transmits and master reads data from register K + 1 ACK slave generates an acknowledgment : : Read data K + N - 1 slave transmits and master reads data register K + N - 1. This is the last register to read. After incrementing, the address rolls over to 0. Here, N represents the number of addresses available in the slave. No ACK master terminates the read operation by generating a No Acknowledge P master generates a STOP condition ACK ACK S device select wr S register address K no ACK ACK rd device select P read data K random address single read ACK ACK S device select wr read data K + 2 rd device select ACK ACK read data K + 1 S register address K ACK read data K ACK .... maximum, rollover to 0 random access multiple read ACK no ACK write data K + N - 1 P 004aaa571 Fig 11. Random address read. 10. Clock wake-up scheme This section explains the ISP1109 clock stop timing, events triggering the clock to wake up, and the timing of the clock wake-up. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 33 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 10.1 Power-down event If VCC(I/O) is not present and the VBUS voltage is below the SESS_VLD threshold (0.8 V to 2.0 V), the ISP1109 is in Power-down mode and internal clocks are turned off. The internal clock--LazyClock or I2C-bus clock or both--is stopped when bit PWR_DN is set. It takes approximately 8 ms for the clock to stop from the time the Power-down condition is detected. If SPI mode is selected, a register read or write access is normal, as when in Power-down mode. If I2C-bus mode is selected, the internal clock must first be woken up before any register read or write operation. 10.2 Clock wake-up event The clock wakes up when any of the following events occurs on ISP1109 pins: * Pin SPI_CLK/I2C_SCL goes LOW, if I2C-bus mode is selected (pin SPI_I2C_SEL is HIGH). * Pin VBUS goes above the session valid threshold (0.8 V to 2.0 V), provided bit SESS_VLD_IEH of the Interrupt Enable High register is set. * Status bit ID_FLOAT changes from logic 1 to logic 0, provided bit ID_FLOAT_IEL of the Interrupt Enable Low register is set. * Status bit ID_FLOAT changes from logic 0 to logic 1, provided bit ID_FLOAT_IEH of the Interrupt Enable High register is set. * Status bit SE1 changes from logic 0 to logic 1, provided bit SE1_IEH of the Interrupt Enable High register is set. The event triggers the clock to start. A stable clock is guaranteed within 100 s. When an event is triggered and the clock is started, it will remain active for approximately 8 ms. If bit PWR_DN is not cleared within this 8 ms period, the clock will stop. If the clock wakes up because of any event other than SPI_CLK/I2C_SCL going LOW, an interrupt will be generated once the clock is active. 11. Electro-Static Discharge (ESD) 11.1 ESD protection The pins that are connected to the USB connector--DP, DM, ID, VBUS, VCC, GNDA and GNDD--have a minimum of 12 kV ESD protection. The 12 kV measurement is limited by the test equipment. Capacitors of 4.7 F connected from REG3V3 to GNDA and VBUS to GNDA are required to achieve this 12 kV ESD protection. See Figure 12. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 34 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support RC 1 M RD 1500 charge current limit resistor DEVICE UNDER TEST discharge resistance VBUS A REG3V3 HIGH VOLTAGE DC SOURCE CS 100 pF storage capacitor B 4.7 F 4.7 F GND 004aaa580 Fig 12. Human Body ESD test model. 11.2 ESD test conditions A detailed report on test setup and results is available on request. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 35 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 12. Limiting values Table 46: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Voltage VCC supply voltage -0.5 +7.0 V VCC(I/O) I/O supply voltage -0.5 +4.6 V -0.5 VCC(I/O) + 0.5 V V -0.5 +7.0 V -0.5 +5.5 V -12 +12 kV -2 +2 kV - 100 mA VI input voltage VBUS VBUS input voltage VI(ID) ID input voltage Vesd electrostatic discharge voltage [1] ILI < 1 A pins DP, DM, ID, VBUS, VCC, GNDA and GNDD [2] [3] all other pins Current latch-up current Ilu [1] Input voltage on all digital pins. [2] Testing equipment limits measurement to only 12 kV. 4.7 F capacitors needed on VBUS and REG3V3 (see Section 11). [3] Equivalent to discharging a 100 pF capacitor through a 1.5 k resistor (Human Body Model). 13. Recommended operating conditions Table 47: Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit 3.0 - 5.25 V 1.65 - 3.6 V 2.65 - 3.0 V 0 - VCC(I/O) V Voltage VCC supply voltage VCC(I/O) I/O supply voltage VREF audio supply voltage [1] [2] VI input voltage VI(AI/O) input voltage on analog I/O pins DP and DM 0 - 3.6 V VO(OD) open-drain output pull-up voltage 1.65 - 3.6 V ambient temperature -40 - +85 C Temperature Tamb [1] VCC(I/O) must be less than or equal to VCC. [2] Input voltage on all digital pins. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 36 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 14. Static characteristics Table 48: Static characteristics: supply pins VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit regulated supply voltage output ILOAD 300 A [1] 3.0 3.3 3.6 V ICC operating supply current transmitting and receiving at 12 Mbit/s; CL = 50 pF on pins DP and DM [2] - 4 8 mA ICC(I/O) operating I/O supply current transmitting and receiving at 12 Mbit/s [2] - 1 2 mA ICC(I/O)(isolate) isolate mode I/O supply current VCC not connected ICC(idle) supply current during full-speed idle and SE0 idle: VDP > 2.7 V, VDM < 0.3 V; SE0: VDP < 0.3 V, VDM < 0.3 V - - 10 A - - 300 A ICC(I/O)(static) static I/O supply current idle, SE0 or suspend - - 20 A - - 20 A - - 100 A Voltage VO(REG3V3) Current ICC(pd) Power-down mode supply current IVREF supply current on pin VREF [3] [3] bit PWR_DN = 1 or VCC(I/O) = 0 V [1] In Power-down mode, the minimum voltage is 2.7 V. [2] Maximum value characterized only, not tested in production. Typical value measured at VCC = 5 V, VCC(I/O) = 1.8 V and Tamb = 25 C. [3] Excluding any load current to the 1.5 k and 15 k pull-up and pull-down resistors (200 A typical). Table 49: Static characteristics: digital pins (except for ISET) VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Input level voltage VIL LOW-level input voltage - - 0.3VCC(I/O) V VIH HIGH-level input voltage 0.6VCC(I/O) - - V IOL = 2 mA - - 0.4 V IOL = 100 A - - 0.15 V VCC(I/O) - 0.4 V - - V VCC(I/O) - 0.15 V - - V -1 - +1 A -5 - +5 A - - 10 pF Output level voltage LOW-level output voltage VOL VOH HIGH-level output voltage IOH = 2 mA [1] IOH = 100 A Leakage current [2] input leakage current ILI Open-drain output current OFF-state output current IOZ Capacitance input capacitance CIN [1] Not applicable for open-drain outputs. [2] VCC(I/O) is not greater than VO(REG3V3). pin to GND 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 37 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 50: Static characteristics: digital pin ISET VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 1.5 - 2.5 V VCC 3.0 V 2.4 - - V VCC < 3.0 V 0.8VCC - - V - - 1.5 ms Voltage Vth(ISET) VCC threshold voltage for ISET function VOH(ISET) VOH on pin ISET Timing td(ISET) time from ISET condition to the ISET pin HIGH Table 51: Static characteristics: analog I/O pins DP and DM VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Input level voltage VDI differential input sensitivity |VDP - VDM| 0.2 - - V VCM differential common mode voltage includes VDI range 0.8 - 2.5 V VIL LOW-level input voltage - - 0.8 V VIH HIGH-level input voltage 2.0 - - V Output level voltage VOL LOW-level output voltage RL of 1.5 k to +3.6 V - - 0.3 V VOH HIGH-level output voltage RL of 15 k to GND 2.8 - 3.6 V Voltage Vth(DP)L DP LOW threshold 0.4 - 0.6 V VTERM termination voltage for the upstream port pull-up resistor (RPU) 3.0 - 3.6 V -1 - +1 A - - 10 pF 14.25 - 24.8 k Leakage current OFF-state leakage current ILZ Capacitance input capacitance CIN pin to GNDA Resistance RPD pull-down resistance on pins DP and DM RUP(DP) pull-up resistance on pin DP RweakUP(DP) weak pull-up resistance on pin DP ZDRV driver output impedance ZINP input impedance [1] bus idle 900 - 1575 bus driven 1425 - 3090 91 - 169 k 34 - 44 10 - - M steady-state drive [1] Includes external series resistors of 33 1 % each on DP and DM. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 38 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 52: Static characteristics: analog I/O pins ID and ID_PU VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Voltage Vth(ID_GND) ID_GND comparator threshold 0.2 - 0.8 V Vth(ID_FLOAT) ID_FLOAT comparator threshold 2.0 - VO(REG3V3) - 0.2 V V Vth(ID_FM) ID factory mode detector threshold 3.0 - 3.8 V RPU_ID ID pull-up switch impedance between pins ID_PU and VREF - - 500 RPD_ID ID impedance to GND - - 50 Resistance bit ID_PULLDOWN = 1 Table 53: Static characteristics: analog I/O pin VBUS VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Voltage Vth(VBUS_HI) VBUS detector 3.0 - 3.8 V Vth(svc) VBUS session valid comparator threshold 0.8 - 2.0 V Vhys(svc) VBUS session valid comparator hysteresis - 200 - mV Resistance RUP(VBUS) pull-up resistance on pin VBUS connect to REG3V3 when VBUS_CHRG = 1 460 - 1000 RDN(VBUS) pull-down resistance on pin VBUS connect to GND when VBUS_DISCHRG = 1 660 - 1200 Table 54: Static characteristics: analog I/O pins SPKR_L, SPKR_R and MIC VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit input capacitance pin to GNDA - - 10 pF Zasw(on) audio switch ON state impedance 0 kHz to 20 kHz 50 - 150 Zasw(off) audio switch OFF state impedance 0 kHz to 20 kHz 2 - - M Capacitance CIN Impedance 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 39 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 15. Dynamic characteristics Table 55: Dynamic characteristics: reset and clock VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 10 - - s 70 100 130 kHz Reset tW(RESET_N) pulse width on input RESET_N Internal clock fclk clock frequency bit GLOBAL_PWR_DN = 0 Table 56: Dynamic characteristics: bus turnaround timing (USB bidirectional mode) VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; CL = 50 pF; RPU = 1.5 k on DP to VTERM; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter tTOI tTIO Conditions Min Typ Max Unit bus turnaround time output-to-input; (OE_N to DAT/VP and SE0/VM) see Figure 17 0 - 5 ns bus turnaround time input-to-output; (OE_N to DAT/VP and SE0/VM) see Figure 17 0 - 5 ns Table 57: Dynamic characteristics: analog I/O pins DP and DM VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; CL = 50 pF; RPU = 1.5 k on DP to VTERM; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Driver characteristics tFR rise time CL = 50 pF to 125 pF; 10 % to 90 % of |VOH - VOL|; see Figure 13 4 - 20 ns tFF fall time CL = 50 pF to 125 pF; 90 % to 10 % of |VOH - VOL|; see Figure 13 4 - 20 ns FRFM differential rise time and fall time matching (tFR/tFF) excluding the first transition from the idle state 90 - 111.1 % VCRS output signal crossover voltage excluding the first transition from the idle state; see Figure 14 1.3 - 2.0 V [1] Driver timing tPLH(drv) propagation delay (DAT/VP, SE0/VM to DP, DM) LOW-to-HIGH; see Figure 14 and Figure 21 - - 18 ns tPHL(drv) propagation delay (DAT/VP, SE0/VM to DP, DM) HIGH-to-LOW; see Figure 14 and Figure 21 - - 18 ns tPHZ disable delay (OE_N to DP, DM) HIGH-to-OFF; see Figure 15 and Figure 22 - - 15 ns tPLZ disable delay (OE_N to DP, DM) LOW-to-OFF; see Figure 15 and Figure 22 - - 15 ns tPZH enable delay (OE_N to DP, DM) OFF-to-HIGH; see Figure 15 and Figure 22 - - 15 ns tPZL enable delay (OE_N to DP, DM) OFF-to-LOW; see Figure 15 and Figure 22 - - 15 ns 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 40 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 57: Dynamic characteristics: analog I/O pins DP and DM...continued VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; CL = 50 pF; RPU = 1.5 k on DP to VTERM; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Receiver timing Differential receiver tPLH(rcv) propagation delay (DP, DM to RCV) LOW-to-HIGH; see Figure 16 and Figure 23 - - 15 ns tPHL(rcv) propagation delay (DP, DM to RCV) HIGH-to-LOW; see Figure 16 and Figure 23 - - 15 ns tPLH(se) propagation delay (DP, DM to VP LOW-to-HIGH; and DAT/VP, VM and SE0/VM) see Figure 16 and Figure 23 - - 18 ns tPHL(se) propagation delay (DP, DM to VP HIGH-to-LOW; and DAT/VP, VM and SE0/VM) see Figure 16 and Figure 23 - - 18 ns Single-ended receiver [1] Characterized only; not tested. Limits guaranteed by design. Table 58: Dynamic characteristics: analog I/O pin ID VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; CL = 50 pF; RPU = 1.5 k on DP to VTERM; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Parameter tWint(ID) tint(ID) Conditions Min Typ Max Unit ID interrupt pulse width 4 - 8 ms ID interrupt wait time 4 - 8 ms Table 59: Dynamic characteristics: audio switches VCC = 3.0 V to 5.25 V; VCC(I/O) = 1.65 V to 3.6 V; CL = 50 pF; RPU = 1.5 k on DP to VTERM; Tamb = -40 C to +85 C; unless otherwise specified. Symbol PSRR Parameter Power Supply Rejection Ratio; see Section 17.1 Conditions Min Typ Max Unit noise on VCC: V(p-p) = 0.5 V, f = 217 Hz, 20 Hz to 20 kHz [1] - - -80 dB noise on VREF: V(p-p) = 50 mV, f = 20 Hz to 20 kHz [1] - - -45 dB ct(audio) crosstalk audio; see Section 17.2 V(p-p) = 1 V, f = 1 kHz [1] - - -66 dB THD Total Harmonic Distortion; see Section 17.1 V(p-p) = 2.3 V, f = 1 kHz [1] - - 1 % V(p-p) = 2.0 V, f = 1 kHz [1] - - 0.3 % - - -70 dB 0.1 - 2.55 V iso(d-a) data to audio isolation; see Section 17.3 Vio(aud) audio input or output voltage range [1] USB 12 Mbit active on DP and DM, < 20 kHz signal components observed on the SPKR_L, SPKR_R or MIC pins V(p-p) indicates peak-to-peak voltage, and f indicates frequency. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 41 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 1.8 V 0.9 V logic input 0.9 V tFR, tLR VOH VOL tFF, tLF 90 % 10 % 0V tPLH(drv) 90 % differential data lines 10 % Fig 13. Rise and fall times. 004aaa573 2.0 V logic 0.9 V input differential data lines 0.9 V VCRS VCRS 0.8 V tPZH tPZL VOH VOL VCRS Fig 14. Timing of DAT/VP and SE0/VM to DP and DM. 1.8 V differential data lines VCRS VOL 004aaa572 0V tPHL(drv) VOH tPLH(rcv) tPLH(se) tPHZ tPLZ tPHL(rcv) tPHL(se) VOH VOH -0.3 V logic output VCRS VOL +0.3 V 004aaa574 Fig 15. Timing of OE_N to DP and DM. 0.9 V 0.9 V VOL 004aaa575 Fig 16. Timing of DP and DM to RCV, VP or DAT/VP and VM or SE0/VM. OE_N tTIO tTOI DAT/VP SE0/VM output input output 004aaa521 Fig 17. SIE interface bus turnaround timing. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 42 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 15.1 SPI bus characteristics t(SPI_CS)LH tW(SPI_CLK) th(SPI_CS) tr(SPI_CS) SPI_CS tW(SPI_CLK) TSPI_CLK dead bit CLK SPI_CLK tsu(SPI_MOSI) th(SPI_MOSI) SPI_MOSI tsu(SPI_MISO) th(SPI_MISO) SPI_MISO 004aaa488 Fig 18. SPI timing diagram. Table 60: SPI timing Symbol Parameter Min Max Unit TSPI_CLK SPI_CLK cycle time 38.46 - ns tW(SPI_CLK) SPI_CLK HIGH or LOW time 19.23 - ns trf(SPI_CLK) SPI_CLK rise or fall time 7.6 - ns t(SPI_CS)LH transfer delay time between queues (SPI_CS from falling edge to rising edge) 30 - ns tr(SPI_CS) SPI_CS rise time (SPI_CS setup to SPI_CLK first rise edge) 10 - ns th(SPI_CS) SP_CS hold time (SPI_CS hold after SPI_CLK last fall edge) 61.5 - ns 5 - ns 5 - ns 5 - ns 19.23 - ns tsu(SPI_MOSI) SPI_MOSI setup time (SPI_MOSI valid to SPI_CLK rise edge) th(SPI_MOSI) SPI_MOSI hold time (SPI_CLK rise edge to SPI_MOSI valid) tsu(SPI_MISO) SPI_MISO setup time (SPI_MISO valid to SPI_CLK rise edge) th(SPI_MISO) SPI_MISO hold time (SPI_CLK rise edge to SPI_MISO valid) 15.2 I2C-bus characteristics SDA tf t(SCL)L tr tSU;DAT tf tHD;STA tSP tBUF tr SCL tHD;STA S tHD;DAT t(SCL)H tSU;STA Sr tSU;STO P S 004aaa577 Fig 19. Definition of timing for standard-mode or fast-mode devices on the I2C-bus. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 43 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 61: Characteristics of I/O stages of I2C-bus lines (SDA, SCL) Symbol Parameter Conditions Standard mode Min Max Fast mode Min Unit Max fSCL SCL clock frequency 0 100 0 400 tHD;STA hold time for the START condition 4.0 - 0.6 - s t(SCL)L LOW period of the SCL clock 4.7 - 1.3 - s t(SCL)H HIGH period of the SCL clock 4.0 - 0.6 - s tSU;STA setup time for the START condition 4.7 - 0.6 - s tSU;DAT data setup time 250 - 100 - ns tHD:DAT data hold time 0 - 0 0.9 s tr rise time SDA and SCL signals - 1000 20 + 0.1 Cb [1] 300 ns tf fall time SDA and SCL signals - 300 20 + 0.1 Cb [1] 300 ns tSU;STO setup time for the STOP condition 4.0 - 0.6 - s tBUF bus free time between a STOP and START condition 4.7 - 1.3 - s [1] kHz Cb is the capacitive load for each bus line in pF. If mixed with high-speed mode devices, faster fall times are allowed. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 44 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 16. Application information 0.1 F VCC(I/O) (1.65 V to 3.6 V) VREF (2.65 V to 3.0 V) 0.1 F 0.01 F 0.1 F B+ (3.0 V to 4.5 V) 0.1 F VCC(I/O) VCC(I/O) VCC VREF REG3V3 8 SPI_CLK/I2C_SCL 4 28 ID_PU 9 221 k 1 % 13 12 29 SPI_MOSI/I2C_SDA 11 SPI_MISO 10 23 22 ISP1109 UART_TXD ISET 30 ID 33 1 % DP 33 1 % DM USB 100 k 5% 6 7 8 9 32 1 2 MIC SPKR_R SPKR_L VCC(I/O) 6 SUSPEND 7 10 k 5 % + 004aaa581 17 VM 14 SPEED 4.7 F, 16 V 18 RCV 16 VP 15 10 k 5 % 1 25 OE_N 20 SE0/VM D+ 3 USB MINI-AB RECEPTACLE D- 2 VBUS VBUS UART_RXD 26 DAT/VP GND 5 ID 4 SHIELD SPI_CS/I2C_ADR 27 SHIELD INT_N SPI_I2C_SEL 5 SHIELD RESET_N UART CHARGER 21 31 SYS_RST PHONE PROCESSOR SPI 3 SHIELD 10 k 5 % 19 GNDD (exposed die pad) AUDIO CODEC 24 GNDA Fig 20. Application diagram. 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 45 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 17. Test information VTERM REG3V3 D.U.T. 1.5 k DP or 004aaa522 DM test point 33 CL 15 k Load capacitance CL = 50 pF (minimum or maximum timing). Fig 21. Load on pins DP and DM. test point 33 D.U.T. 500 DP or DM 50 pF V 004aaa517 V = 0 V for tPZH and tPHZ. V = VO(REG3V3) for tPZL and tPLZ. Fig 22. Load on pins DP and DM for enable time and disable time. test point D.U.T. 25 pF 004aaa576 Fig 23. Load on pins VM, SE0/VM, VP, DAT/VP and RCV. 17.1 Test configurations Table 62: Test configurations Parameter Pins or switches Configuration 1 Configuration 2 Termination impedances DP 60 k 200 , 1.4 V DC DM 60 k 60 k SPKR_R 200 200 , 1.4 V DC SPKR_L 200 200 , 1.4 V DC MIC 10 k 10 k S1 on off S2 off on S3 on on Switch positions [1] 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 46 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 62: Test configurations...continued Parameter Pins or switches Measured ports [1] Configuration 1 Configuration 2 DP MIC DM DM For details on switches S1, S2 and S3, see Figure 5. 4.6 ms 577 s Vmax = 3.4 V to 4.2 V 500 mV Vmin = 2.9 V to 3.7 V 30 s 004aaa519 Fig 24. VCC with 217 Hz noise. 17.2 Audio crosstalk test conditions VCC sweeps from 2.9 V to 4.2 V (DC waveform). 17.2.1 Test 1 * * * * S2 = on, S3 = on DP is terminated using a 200 ; DM is terminated using a 60 k MIC is terminated using a 10 k; SPKR_L is terminated using a 200 , 1.4 V DC Drive f = 1 kHz, V(p-p) = 1 V to DP; signal on DM must be 66 dB below; where f represents frequency and V(p-p) represents peak-to-peak voltage. 17.2.2 Test 2 * * * * S1 = on, S3 = on DP and DM are terminated using a 60 k SPKR_L and SPKR_R are terminated using a 200 , 1.4 V DC Drive f = 1 kHz, V(p-p) = 1 V to SPKR_R; signal on DM must be 66 dB below; where f represents frequency and V(p-p) represents peak-to-peak voltage. 17.2.3 Test 3 * * * * S1 = on, S3 = on DP and DM are terminated using a 60 k SPKR_L and SPKR_R are terminated using a 200 , 1.4 V DC Drive f = 1 kHz, V(p-p) = 1 V to SPKR_L; signal on DP must be 66 dB below; where f represents frequency and V(p-p) represents peak-to-peak voltage. 17.3 Data to audio isolation test conditions * VCC is swept from 2.9 V to 4.2 V (DC waveform) 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 47 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support * * * * * 12 Mbit USB data must be active on the DP and DM pins All audio switches must be left open MIC must be terminated using a 10 k SPKR_L and SPKR_R are each terminated using a 200 Taking an FFT on the SPKR_R, MIC and SPKR_L pins, the USB data components below 20 kHz will be < -70 dB below the USB data level (3.6 V). 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 48 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 18. Package outline HVQFN32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 5 x 5 x 0.85 mm A B D SOT617-1 terminal 1 index area A A1 E c detail X C e1 e 1/2 e 16 y y1 C v M C A B w M C b 9 L 17 8 e e2 Eh 1/2 e 1 terminal 1 index area 24 32 25 X Dh 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 e2 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 5.1 4.9 3.25 2.95 5.1 4.9 3.25 2.95 0.5 3.5 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT617-1 --- MO-220 --- EUROPEAN PROJECTION ISSUE DATE 01-08-08 02-10-18 Fig 25. Package outline SOT617-1 (HVQFN32). 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 49 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 19. Soldering 19.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 19.2 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 C to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: * below 225 C (SnPb process) or below 245 C (Pb-free process) - for all BGA, HTSSON..T and SSOP..T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages. * below 240 C (SnPb process) or below 260 C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. 19.3 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 50 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 19.4 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 C and 320 C. 19.5 Package related soldering information Table 63: Suitability of surface mount IC packages for wave and reflow soldering methods Package [1] Soldering method Wave Reflow [2] BGA, HTSSON..T [3], LBGA, LFBGA, SQFP, SSOP..T [3], TFBGA, VFBGA, XSON not suitable suitable DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS not suitable [4] suitable PLCC [5], SO, SOJ suitable suitable not recommended [5] [6] suitable SSOP, TSSOP, VSO, VSSOP not recommended [7] suitable CWQCCN..L [8], PMFP [9], WQCCN..L [8] not suitable LQFP, QFP, TQFP [1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. [2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. 9397 750 13355 Product data sheet not suitable (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 51 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. [5] If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. [6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. [7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. [8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. [9] Hot bar soldering or manual soldering is suitable for PMFP packages. 20. Abbreviations Table 64: Abbreviations Acronym Description ATX Analog USB transceiver DC Direct Current ESD Electro-Static Discharge I2C-bus Inter IC-bus LSB Least Significant Bit MIC Microphone MSB Most Significant Bit OTG On-The-Go POR Power-On Reset PORP Power-On Reset Pulse RxD Receive Data SE1 Single-Ended One SoC System-on-a-Chip SPI Serial Parallel Interface SRP Session Request Protocol TxD Transmit Data UART Universal Asynchronous Receiver-Transmitter USB Universal Serial Bus 21. References [1] Universal Serial Bus Specification Rev. 2.0 [2] CEA-936-A, Mini-USB Analog Carkit Interface [3] The I2C-bus Specification; Version 2.1 [4] ECN_27%_ Resistor (http://www.usb.org/developers/docs). 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 52 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 22. Revision history Table 65: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes ISP1109_1 20050714 Product data sheet - 9397 750 13355 - 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 53 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 23. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 24. Definitions customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 25. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 26. Trademarks Notice -- All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- wordmark and logo are trademarks of Koninklijke Philips Electronics N.V. 27. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 54 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 28. Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Table 14: Table 15: Table 16: Table 17: Table 18: Table 19: Table 20: Table 21: Table 22: Table 23: Table 24: Table 25: Table 26: Table 27: Table 28: Table 29: Table 30: Table 31: Table 32: Ordering information . . . . . . . . . . . . . . . . . . . . .2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .5 ID pull-down control . . . . . . . . . . . . . . . . . . . . . .9 DP pull-up resistor (RUP(DP)) control . . . . . . . . .9 Audio switch control . . . . . . . . . . . . . . . . . . . . .11 Transceiver driver operating setting . . . . . . . . .12 USB functional mode: transmit operation . . . .12 Differential receiver operation settings . . . . . . .13 USB functional mode: receive operation . . . . .13 ISP1109 power modes: summary . . . . . . . . . .16 ISP1109 pin states in disable or isolate mode .16 USB functional modes: I/O values . . . . . . . . . .17 Summary of device operating modes . . . . . . .18 Transparent general-purpose buffer mode . . . .19 Register overview . . . . . . . . . . . . . . . . . . . . . .20 VENDORID - Vendor ID register (address 00h to 01h) bit description . . . . . . . . . . . . . . . .20 PRODUCTID - Product ID register (address 02h to 03h) bit description . . . . . . . . . . . . . . . .21 VERSIONID - Version ID register (address 14h to 15h) bit description . . . . . . . . . . . . . . . .21 Mode Control 1 register (address Set = 04h, Clear = 05h) bit allocation . . . . . . . . . . . . . . . .21 Mode Control 1 register (address Set = 04h, Clear = 05h) bit description . . . . . . . . . . . . . . .21 Mode Control 2 register (address Set = 12h, Clear = 13h) bit allocation . . . . . . . . . . . . . . . .22 Mode Control 2 register (address Set = 12h, Clear = 13h) bit description . . . . . . . . . . . . . . .22 Audio Control register (address Set = 16h, Clear = 17h) bit allocation . . . . . . . . . . . . . . . .22 Audio Control register (address Set = 16h, Clear = 17h) bit description . . . . . . . . . . . . . . .22 Timer Control register (address Set = 18h, Clear = 19h) bit allocation . . . . . . . . . . . . . . . .23 Timer Control register (address Set = 18h, Clear = 19h) bit description . . . . . . . . . . . . . . .23 Resistor Control register (address Set = 06h, Clear = 07h) bit allocation . . . . . . . . . . . . . . . .23 Resistor Control register (address Set = 06h, Clear = 07h) bit description . . . . . . . . . . . . . . .24 Interrupt Source register (address 08h) bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Interrupt Source register (address 08h) bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Interrupt Latch register (address Set = 0Ah, Clear = 0Bh) bit allocation . . . . . . . . . . . . . . . .25 Interrupt Latch register (address Set = 0Ah, Clear = 0Bh) bit description . . . . . . . . . . . . . . . 25 Table 33: Interrupt Enable Low register (address Set = 0Ch, Clear = 0Dh) bit allocation . . . . . . . 26 Table 34: Interrupt Enable Low register (address Set = 0Ch, Clear = 0Dh) bit description . . . . . 26 Table 35: Interrupt Enable High register (address Set = 0Eh, Clear = 0Fh) bit allocation . . . . . . . 27 Table 36: Interrupt Enable High register (address Set = 0Eh, Clear = 0Fh) bit description . . . . . . 27 Table 37: SPI interface pin description . . . . . . . . . . . . . . 28 Table 38: I2C-bus byte transfer format . . . . . . . . . . . . . . 29 Table 39: I2C-bus slave address bit allocation . . . . . . . . 30 Table 40: I2C-bus slave address bit description . . . . . . . 30 Table 41: Transfer format description for a one-byte write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 42: Transfer format description for a multiple-byte write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 43: Transfer format description for current address read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 44: Transfer format description for single-byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 45: Transfer format description for a multiplebyte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 46: Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 47: Recommended operating conditions . . . . . . . . 36 Table 48: Static characteristics: supply pins . . . . . . . . . . 37 Table 49: Static characteristics: digital pins (except for ISET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 50: Static characteristics: digital pin ISET . . . . . . . 38 Table 51: Static characteristics: analog I/O pins DP and DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 52: Static characteristics: analog I/O pins ID and ID_PU . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 53: Static characteristics: analog I/O pin VBUS . . . 39 Table 54: Static characteristics: analog I/O pins SPKR_L, SPKR_R and MIC . . . . . . . . . . . . . . 39 Table 55: Dynamic characteristics: reset and clock . . . . 40 Table 56: Dynamic characteristics: bus turnaround timing (USB bidirectional mode) . . . . . . . . . . . 40 Table 57: Dynamic characteristics: analog I/O pins DP and DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 58: Dynamic characteristics: analog I/O pin ID . . . 41 Table 59: Dynamic characteristics: audio switches . . . . . 41 Table 60: SPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 61: Characteristics of I/O stages of I2C-bus lines (SDA, SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 62: Test configurations . . . . . . . . . . . . . . . . . . . . . 46 continued >> 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 55 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support Table 63: Suitability of surface mount IC packages for wave and reflow soldering methods . . . . . . . . . . . . .51 Table 64: Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .52 Table 65: Revision history . . . . . . . . . . . . . . . . . . . . . . . .53 continued >> 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 56 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 29. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Pin configuration HVQFN32; top view.. . . . . . . . . .4 Pin configuration HVQFN32; bottom view.. . . . . . .4 DP and DM pull-up and pull-down resistors. . . . .10 Audio switches. . . . . . . . . . . . . . . . . . . . . . . . . . .11 Internal power-on reset timing. . . . . . . . . . . . . . .14 SPI transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 SPI multiple read and write. . . . . . . . . . . . . . . . . .29 Writing data to the ISP1109 registers. . . . . . . . . .31 Current address read. . . . . . . . . . . . . . . . . . . . . .32 Random address read. . . . . . . . . . . . . . . . . . . . .33 Human Body ESD test model. . . . . . . . . . . . . . . .35 Rise and fall times.. . . . . . . . . . . . . . . . . . . . . . . .42 Timing of DAT/VP and SE0/VM to DP and DM. . .42 Timing of OE_N to DP and DM.. . . . . . . . . . . . . .42 Timing of DP and DM to RCV, VP or DAT/VP and VM or SE0/VM. . . . . . . . . . . . . . . . . . . . . . . .42 SIE interface bus turnaround timing. . . . . . . . . . .42 SPI timing diagram. . . . . . . . . . . . . . . . . . . . . . . .43 Definition of timing for standard-mode or fast-mode devices on the I2C-bus. . . . . . . . . . . . .43 Application diagram. . . . . . . . . . . . . . . . . . . . . . .45 Load on pins DP and DM. . . . . . . . . . . . . . . . . . .46 Load on pins DP and DM for enable time and disable time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 Load on pins VM, SE0/VM, VP, DAT/VP and RCV.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 VCC with 217 Hz noise. . . . . . . . . . . . . . . . . . . . .47 Package outline SOT617-1 (HVQFN32). . . . . . . .49 continued >> 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 57 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 30. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.9.1 7.9.2 7.10 8 8.1 8.1.1 8.1.2 8.1.3 8.2 8.2.1 8.2.2 8.3 8.4 8.4.1 8.4.2 8.4.3 9 9.1 9.1.1 9.1.1.1 9.1.1.2 9.1.1.3 9.1.2 9.1.2.1 9.1.2.2 9.1.2.3 9.1.2.4 9.1.2.5 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 8 Serial controller. . . . . . . . . . . . . . . . . . . . . . . . . 8 VBUS detector . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ID detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pull-up and pull-down resistors. . . . . . . . . . . . . 9 Power block. . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Carkit DP interrupt detector . . . . . . . . . . . . . . 10 Audio switches . . . . . . . . . . . . . . . . . . . . . . . . 11 ISET detector . . . . . . . . . . . . . . . . . . . . . . . . . 11 USB transceiver . . . . . . . . . . . . . . . . . . . . . . . 12 Differential driver. . . . . . . . . . . . . . . . . . . . . . . 12 Differential receiver . . . . . . . . . . . . . . . . . . . . . 13 Power-On Reset (POR) . . . . . . . . . . . . . . . . . 14 Modes of operation . . . . . . . . . . . . . . . . . . . . . 15 Power modes . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disable mode . . . . . . . . . . . . . . . . . . . . . . . . . 15 Isolate mode . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Serial control modes . . . . . . . . . . . . . . . . . . . . 16 I2C-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . 16 SPI mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 USB modes. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Transparent modes . . . . . . . . . . . . . . . . . . . . . 17 Transparent UART mode . . . . . . . . . . . . . . . . 17 Transparent audio mode . . . . . . . . . . . . . . . . . 18 Transparent general-purpose buffer mode . . . 18 Serial controller . . . . . . . . . . . . . . . . . . . . . . . . 20 Register map . . . . . . . . . . . . . . . . . . . . . . . . . 20 Device identification registers . . . . . . . . . . . . . 20 Vendor ID register. . . . . . . . . . . . . . . . . . . . . . 20 Product ID register . . . . . . . . . . . . . . . . . . . . . 20 Version ID register . . . . . . . . . . . . . . . . . . . . . 21 Control registers . . . . . . . . . . . . . . . . . . . . . . . 21 Mode Control 1 register . . . . . . . . . . . . . . . . . 21 Mode Control 2 register . . . . . . . . . . . . . . . . . 21 Audio Control register . . . . . . . . . . . . . . . . . . . 22 Timer Control register (S/C: 18h/19h). . . . . . . 23 Resistor Control register . . . . . . . . . . . . . . . . . 23 9.1.3 9.1.3.1 9.1.3.2 9.1.3.3 9.1.3.4 9.2 9.3 9.3.1 9.3.2 9.3.3 9.4 9.4.1 9.4.2 9.4.3 9.4.3.1 9.4.3.2 9.4.4 9.4.4.1 9.4.4.2 9.4.4.3 10 10.1 10.2 11 11.1 11.2 12 13 14 15 15.1 15.2 16 17 17.1 17.2 17.2.1 17.2.2 17.2.3 17.3 18 19 19.1 19.2 19.3 Interrupt registers . . . . . . . . . . . . . . . . . . . . . . Interrupt Source register . . . . . . . . . . . . . . . . Interrupt Latch register . . . . . . . . . . . . . . . . . . Interrupt Enable Low register . . . . . . . . . . . . . Interrupt Enable High register . . . . . . . . . . . . Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . SPI interface. . . . . . . . . . . . . . . . . . . . . . . . . . Pinout description. . . . . . . . . . . . . . . . . . . . . . Interface overview . . . . . . . . . . . . . . . . . . . . . Interface protocol description . . . . . . . . . . . . . I2C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . I2C-bus byte transfer format . . . . . . . . . . . . . . I2C-bus device address . . . . . . . . . . . . . . . . . Write format . . . . . . . . . . . . . . . . . . . . . . . . . . One-byte write . . . . . . . . . . . . . . . . . . . . . . . . Multiple-byte write . . . . . . . . . . . . . . . . . . . . . Read format . . . . . . . . . . . . . . . . . . . . . . . . . . Current address read . . . . . . . . . . . . . . . . . . . Random address read--Single read . . . . . . . Random address read--Multiple read . . . . . . Clock wake-up scheme . . . . . . . . . . . . . . . . . . Power-down event . . . . . . . . . . . . . . . . . . . . . Clock wake-up event . . . . . . . . . . . . . . . . . . . Electro-Static Discharge (ESD) . . . . . . . . . . . ESD protection . . . . . . . . . . . . . . . . . . . . . . . . ESD test conditions . . . . . . . . . . . . . . . . . . . . Limiting values . . . . . . . . . . . . . . . . . . . . . . . . Recommended operating conditions . . . . . . Static characteristics . . . . . . . . . . . . . . . . . . . Dynamic characteristics . . . . . . . . . . . . . . . . . SPI bus characteristics. . . . . . . . . . . . . . . . . . I2C-bus characteristics . . . . . . . . . . . . . . . . . . Application information . . . . . . . . . . . . . . . . . Test information. . . . . . . . . . . . . . . . . . . . . . . . Test configurations . . . . . . . . . . . . . . . . . . . . . Audio crosstalk test conditions . . . . . . . . . . . . Test 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Test 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Test 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data to audio isolation test conditions . . . . . . Package outline . . . . . . . . . . . . . . . . . . . . . . . . Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 24 24 25 26 27 27 28 28 28 28 29 29 30 30 30 30 31 32 32 32 33 34 34 34 34 35 36 36 37 40 43 43 45 46 46 47 47 47 47 47 49 50 50 50 50 continued >> 9397 750 13355 Product data sheet (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 01 -- 14 July 2005 58 of 59 ISP1109 Philips Semiconductors USB transceiver with carkit support 19.4 19.5 20 21 22 23 24 25 26 27 Manual soldering . . . . . . . . . . . . . . . . . . . . . . Package related soldering information . . . . . . Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . References . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information . . . . . . . . . . . . . . . . . . . . 51 51 52 52 53 54 54 54 54 54 (c) Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 14 July 2005 Document number: 9397 750 13355 Published in The Netherlands